Van der Waals Layer Transfer of 2D Materials for Monolithic 3D Electronic System Integration: Review and Outlook

Two-Dimensional Semiconductors for State-of-the-Art Complementary Field-Effect Transistors and Integrated Circuits

As the trajectory of transistor scaling defined by Moore's law encounters challenges, the paradigm of ever-evolving integrated circuit technology shifts to explore unconventional materials and architectures to sustain progress. Two-dimensional (2D) semiconductors, characterized by their atomic-scale thickness and exceptional electronic properties, have emerged as a beacon of promise in this quest for the continued advancement of field-effect transistor (FET) technology. The energy-efficient complementary circuit integration necessitates strategic engineering of both n-channel and p-channel 2D FETs to achieve symmetrical high performance. This intricate process mandates the realization of demanding device characteristics, including low contact resistance, precisely controlled doping schemes, high mobility, and seamless incorporation of high- κ dielectrics. Furthermore, the uniform growth of wafer-scale 2D film is imperative to mitigate defect density, minimize device-to-device variation, and establish pristine interfaces within the integrated circuits. This review examines the latest breakthroughs with a focus on the preparation of 2D channel materials and device engineering in advanced FET structures. It also extensively summarizes critical aspects such as the scalability and compatibility of 2D FET devices with existing manufacturing technologies, elucidating the synergistic relationships crucial for realizing efficient and high-performance 2D FETs. These findings extend to potential integrated circuit applications in diverse functionalities.

Wafer-Scale Transfer of MXene Films with Enhanced Device Performance via 2D Liquid Intercalation

Wafer-scale transfer processes of 2D materials significantly expand their application space in scalable microelectronic devices with excellent and tunable properties through van der Waals (vdW) stacking. Unlike many 2D materials, wafer-scale transfer of MXene films for vdW contact engineering has not yet been reported. With their rich surface chemistry and tunable properties, the transfer of MXenes can enable enormous possibilities in electronic devices using interface engineering. Taking advantage of the MXene hydrophilic surface, a straightforward, green, and fast process for the transfer of MXene films at the wafer scale (4-inch) is developed. Uniform vdW stacking of several types of large-area heterojunctions including MXene/MXene (Ti3C2Tx, Nb2CTx, and V2CTx), MXene/MoS2, and MXene/Au is further demonstrated. Multilayer support is applied to minimize damage or deformation in the transfer process of patterned Ti3C2Tx film. It allows us to fabricate thin film transistors and manipulate the MXene/MoS2 interface through the intercalation of various 2D liquids. Particularly noteworthy is the significant enhancement of the interfacial carrier transfer efficiency by ≈2 orders of magnitude using hydrogen iodide (HI) intercalation. This finding indicates a wide range of possibilities for interface engineering by transferring MXene films and employing liquid-assisted interfacial intercalation.

Mixed-Dimensional Integration of 3D-on-2D Heterostructures for Advanced Electronics

Two-dimensional (2D) materials have garnered significant attention due to their exceptional properties requisite for next-generation electronics, including ultrahigh carrier mobility, superior mechanical flexibility, and unusual optical characteristics. Despite their great potential, one of the major technical difficulties toward lab-to-fab transition exists in the seamless integration of 2D materials with classic material systems, typically composed of three-dimensional (3D) materials. Owing to the self-passivated nature of 2D surfaces, it is particularly challenging to achieve well-defined interfaces when forming 3D materials on 2D materials (3D-on-2D) heterostructures. Here, we comprehensively review recent progress in 3D-on-2D incorporation strategies, ranging from direct-growth- to layer-transfer-based approaches and from non-epitaxial to epitaxial integration methods. Their technological advances and obstacles are rigorously discussed to explore optimal, yet viable, integration strategies of 3D-on-2D heterostructures. We conclude with an outlook on mixed-dimensional integration processes, identifying key challenges in state-of-the-art technology and suggesting potential opportunities for future innovation.

Transfer of 2D Films: From Imperfection to Perfection

Atomically thin 2D films and their van der Waals heterostructures have demonstrated immense potential for breakthroughs and innovations in science and technology. Integrating 2D films into electronics and optoelectronics devices and their applications in electronics and optoelectronics can lead to improve device efficiencies and tunability. Consequently, there has been steady progress in large-area 2D films for both front- and back-end technologies, with a keen interest in optimizing different growth and synthetic techniques. Parallelly, a significant amount of attention has been directed toward efficient transfer techniques of 2D films on different substrates. Current methods for synthesizing 2D films often involve high-temperature synthesis, precursors, and growth stimulants with highly chemical reactivity. This limitation hinders the widespread applications of 2D films. As a result, reports concerning transfer strategies of 2D films from bare substrates to target substrates have proliferated, showcasing varying degrees of cleanliness, surface damage, and material uniformity. This review aims to evaluate, discuss, and provide an overview of the most advanced transfer methods to date, encompassing wet, dry, and quasi-dry transfer methods. The processes, mechanisms, and pros and cons of each transfer method are critically summarized. Furthermore, we discuss the feasibility of these 2D film transfer methods, concerning their applications in devices and various technology platforms.

Strong Covalent Coupling in Vertically Layered SnSe2/PTAA Heterojunctions Enabled High Performance Inorganic-Organic Hybrid Photodetectors

Controllable large-scale integration of two-dimensional (2D) materials with organic semiconductors and the realization of strong coupling between them still remain challenging. Herein, we demonstrate a wafer-scale, vertically layered SnSe2/PTAA heterojunction array with high light-trapping ability via a low-temperature molecular beam epitaxy method and a facile spin-coating process. Conductive probe atomic force microscopy (CP-AFM) measurements reveal strong rectification and photoresponse behavior in the individual SnSe2 nanosheet/PTAA heterojunction. Theoretical analysis demonstrates that vertically layered SnSe2/PTAA heterojunctions exhibit stronger C-Se covalent coupling than that of the conventional tiled type, which could facilitate more efficient charge transfer. Benefiting from these advantages, the SnSe2/PTAA heterojunction photodetectors with an optimized PTAA concentration show high performance, including a responsivity of 41.02 A/W, an external quantum efficiency of 1.31 × 104%, and high uniformity. The proposed approach for constructing large-scale 2D inorganic-organic heterostructures represents an effective route to fabricate high-performance broadband photodetectors for integrated optoelectronic systems.

Monolithic three-dimensional tier-by-tier integration via van der Waals lamination

Two-dimensional (2D) semiconductors have shown great potential for monolithic three-dimensional (M3D) integration due to their dangling-bonds-free surface and the ability to integrate to various substrates without the conventional constraint of lattice matching1-10. However, with atomically thin body thickness, 2D semiconductors are not compatible with various high-energy processes in microelectronics11-13, where the M3D integration of multiple 2D circuit tiers is challenging. Here we report an alternative low-temperature M3D integration approach by van der Waals (vdW) lamination of entire prefabricated circuit tiers, where the processing temperature is controlled to 120 °C. By further repeating the vdW lamination process tier by tier, an M3D integrated system is achieved with 10 circuit tiers in the vertical direction, overcoming previous thermal budget limitations. Detailed electrical characterization demonstrates the bottom 2D transistor is not impacted after repetitively laminating vdW circuit tiers on top. Furthermore, by vertically connecting devices within different tiers through vdW inter-tier vias, various logic and heterogeneous structures are realized with desired system functions. Our demonstration provides a low-temperature route towards fabricating M3D circuits with increased numbers of tiers.

Pick-up and assembling of chemically sensitive van der Waals heterostructures using dry cryogenic exfoliation

Assembling atomic layers of van der Waals materials (vdW) combines the physics of two materials, offering opportunities for novel functional devices. Realization of this has been possible because of advancements in nanofabrication processes which often involve chemical processing of the materials under study; this can be detrimental to device performance. To address this issue, we have developed a modified micro-manipulator setup for cryogenic exfoliation, pick up, and transfer of vdW materials to assemble heterostructures. We use the glass transition of a polymer PDMS to cleave a flake into two, followed by its pick-up and drop to form pristine twisted junctions. To demonstrate the potential of the technique, we fabricated twisted heterostructure of Bi2Sr2CaCu2O8+x (BSCCO), a van der Waals high-temperature cuprate superconductor. We also employed this method to re-exfoliate NbSe2 and make twisted heterostructure. Transport measurements of the fabricated devices indicate the high quality of the artificial twisted interface. In addition, we extend this cryogenic exfoliation method for other vdW materials, offering an effective way of assembling heterostructures and twisted junctions with pristine interfaces.

Can 2D Semiconductors Be Game-Changers for Nanoelectronics and Photonics?

2D semiconductors have interesting physical and chemical attributes that have led them to become one of the most intensely investigated semiconductor families in recent history. They may play a crucial role in the next technological revolution in electronics as well as optoelectronics or photonics. In this Perspective, we explore the fundamental principles and significant advancements in electronic and photonic devices comprising 2D semiconductors. We focus on strategies aimed at enhancing the performance of conventional devices and exploiting important properties of 2D semiconductors that allow fundamentally interesting device functionalities for future applications. Approaches for the realization of emerging logic transistors and memory devices as well as photovoltaics, photodetectors, electro-optical modulators, and nonlinear optics based on 2D semiconductors are discussed. We also provide a forward-looking perspective on critical remaining challenges and opportunities for basic science and technology level applications of 2D semiconductors.

Two-Dimensional Semiconductors and Transistors for Future Integrated Circuits

Silicon transistors are approaching their physical limit, calling for the emergence of a technological revolution. As the acknowledged ultimate version of transistor channels, 2D semiconductors are of interest for the development of post-Moore electronics due to their useful properties and all-in-one potentials. Here, the promise and current status of 2D semiconductors and transistors are reviewed, from materials and devices to integrated applications. First, we outline the evolution and challenges of silicon-based integrated circuits, followed by a detailed discussion on the properties and preparation strategies of 2D semiconductors and van der Waals heterostructures. Subsequently, the significant progress of 2D transistors, including device optimization, large-scale integration, and unconventional devices, are presented. We also examine 2D semiconductors for advanced heterogeneous and multifunctional integration beyond CMOS. Finally, the key technical challenges and potential strategies for 2D transistors and integrated circuits are also discussed. We envision that the field of 2D semiconductors and transistors could yield substantial progress in the upcoming years and hope this review will trigger the interest of scientists planning their next experiment.

Stacking Order Engineering of Two-Dimensional Materials and Device Applications

Stacking orders in 2D van der Waals (vdW) materials dictate the relative sliding (lateral displacement) and twisting (rotation) between atomically thin layers. By altering the stacking order, many new ferroic, strongly correlated and topological orderings emerge with exotic electrical, optical and magnetic properties. Thanks to the weak vdW interlayer bonding, such highly flexible and energy-efficient stacking order engineering has transformed the design of quantum properties in 2D vdW materials, unleashing the potential for miniaturized high-performance device applications in electronics, spintronics, photonics, and surface chemistry. This Review provides a comprehensive overview of stacking order engineering in 2D vdW materials and their device applications, ranging from the typical fabrication and characterization methods to the novel physical properties and the emergent slidetronics and twistronics device prototyping. The main emphasis is on the critical role of stacking orders affecting the interlayer charge transfer, orbital coupling and flat band formation for the design of innovative materials with on-demand quantum properties and surface potentials. By demonstrating a correlation between the stacking configurations and device functionality, we highlight their implications for next-generation electronic, photonic and chemical energy conversion devices. We conclude with our perspective of this exciting field including challenges and opportunities for future stacking order engineering research.

The Roadmap of 2D Materials and Devices Toward Chips

Due to the constraints imposed by physical effects and performance degradation, silicon-based chip technology is facing certain limitations in sustaining the advancement of Moore's law. Two-dimensional (2D) materials have emerged as highly promising candidates for the post-Moore era, offering significant potential in domains such as integrated circuits and next-generation computing. Here, in this review, the progress of 2D semiconductors in process engineering and various electronic applications are summarized. A careful introduction of material synthesis, transistor engineering focused on device configuration, dielectric engineering, contact engineering, and material integration are given first. Then 2D transistors for certain electronic applications including digital and analog circuits, heterogeneous integration chips, and sensing circuits are discussed. Moreover, several promising applications (artificial intelligence chips and quantum chips) based on specific mechanism devices are introduced. Finally, the challenges for 2D materials encountered in achieving circuit-level or system-level applications are analyzed, and potential development pathways or roadmaps are further speculated and outlooked.

Low-dimensional nanostructures for monolithic 3D-integrated flexible and stretchable electronics

Flexible/stretchable electronics, which are characterized by their ultrathin design, lightweight structure, and excellent mechanical robustness and conformability, have garnered significant attention due to their unprecedented potential in healthcare, advanced robotics, and human-machine interface technologies. An increasing number of low-dimensional nanostructures with exceptional mechanical, electronic, and/or optical properties are being developed for flexible/stretchable electronics to fulfill the functional and application requirements of information sensing, processing, and interactive loops. Compared to the traditional single-layer format, which has a restricted design space, a monolithic three-dimensional (M3D) integrated device architecture offers greater flexibility and stretchability for electronic devices, achieving a high-level of integration to accommodate the state-of-the-art design targets, such as skin-comfort, miniaturization, and multi-functionality. Low-dimensional nanostructures possess small size, unique characteristics, flexible/elastic adaptability, and effective vertical stacking capability, boosting the advancement of M3D-integrated flexible/stretchable systems. In this review, we provide a summary of the typical low-dimensional nanostructures found in semiconductor, interconnect, and substrate materials, and discuss the design rules of flexible/stretchable devices for intelligent sensing and data processing. Furthermore, artificial sensory systems in 3D integration have been reviewed, highlighting the advancements in flexible/stretchable electronics that are deployed with high-density, energy-efficiency, and multi-functionalities. Finally, we discuss the technical challenges and advanced methodologies involved in the design and optimization of low-dimensional nanostructures, to achieve monolithic 3D-integrated flexible/stretchable multi-sensory systems.

Volatile and Nonvolatile Resistive Switching Coexistence in Conductive Point Hexagonal Boron Nitride Monolayer

Recently, we demonstrated the nonvolatile resistive switching effects of metal-insulator-metal (MIM) atomristor structures based on two-dimensional (2D) monolayers. However, there are many remaining combinations between 2D monolayers and metal electrodes; hence, there is a need to further explore 2D resistance switching devices from material selections to future perspectives. This study investigated the volatile and nonvolatile switching coexistence of monolayer hexagonal boron nitride (h-BN) atomristors using top and bottom silver (Ag) metal electrodes. Utilizing an h-BN monolayer and Ag electrodes, we found that the transition between volatile and nonvolatile switching is attributed to the thickness/stiffness of chain-like conductive bridges between h-BN and Ag surfaces based on the current compliance and atomristor area. Computations indicate a "weak" bridge is responsible for volatile switching, while a "strong" bridge is formed for nonvolatile switching. The current compliance determines the number of Ag atoms that undergo dissociation at the electrode, while the atomristor area determines the degree of electric field localization that forms more stable conductive bridges. The findings of this study suggest that the h-BN atomristor using Ag electrodes shows promise as a potential solution to integrate both volatile neurons and nonvolatile synapses in a single neuromorphic crossbar array structure through electrical and dimensional designs.

Controlled Synthesis and Accurate Doping of Wafer-Scale 2D Semiconducting Transition Metal Dichalcogenides

2D semiconducting transition metal dichalcogenide (TMDCs) possess atomically thin thickness, a dangling-bond-free surface, flexible band structure, and silicon-compatible feature, making them one of the most promising channels for constructing state-of-the-art field-effect transistors in the post-Moore's era. However, the existing 2D semiconducting TMDCs fall short of meeting the industry criteria for practical applications in electronics due to their small domain size and the lack of an effective approach to modulate intrinsic physical properties. Therefore, it is crucial to prepare and dope 2D semiconducting TMDCs single crystals with wafer size. In this review, the up-to-date progress regarding the wafer-scale growth of 2D semiconducting TMDC polycrystalline and single-crystal films is systematically summarized. The domain orientation control of 2D TMDCs and the seamless stitching of unidirectionally aligned 2D islands by means of substrate design are proposed. In addition, the accurate and uniform doping of 2D semiconducting TMDCs and the effect on electronic device performances are also discussed. Finally, the dominating challenges pertaining to the enhancement of the electronic device performances of TMDCs are emphasized, and further development directions are put forward. This review provides a systematic and in-depth summary of high-performance device applications of 2D semiconducting TMDCs.