Contact and injection engineering for low SS reconfigurable FETs and high gain complementary inverters

Giant tunnel electroresistance through a Van der Waals junction by external ferroelectric polarization

The burgeoning interest in two-dimensional semiconductors stems from their potential as ultrathin platforms for next-generation transistors. Nonetheless, there persist formidable challenges in fully obtaining high-performance complementary logic components and the underlying mechanisms for the polarity modulation of transistors are not yet fully understood. Here, we exploit both ferroelectric domain-based nonvolatile modulation of Fermi level in transitional metal dichalcogenides (MoS2) and quantum tunneling through nanoscale hexagonal boron nitride (h-BN). Our prototype devices, termed as vertical tunneling ferroelectric field-effect transistor, utilizes a Van der Waals MoS2/h-BN/metal tunnel junction as the channel. The Fermi level of MoS2 is bipolarly tuned by ferroelectric domains and sensitively detected by the direct quantum tunneling strength across the junction, demonstrating an impressive electroresistance ratio of up to 109 in the vertical tunneling ferroelectric field-effect transistor. It consumes only 0.16 fJ of energy to open a ratio window exceeding 104. This work not only validates the effectiveness of tailored tunnel barriers in manipulating electronic flow but also highlights a new avenue for the design flexibility and functional versatility of advanced ferroelectric memory technology.

Reconfigurable Artificial Synapse Based on Ambipolar Floating Gate Memory

Artificial synapse networks capable of massively parallel computing and mimicking biological neural networks can potentially improve the processing efficiency of existing information technologies. Semiconductor devices functioning as excitatory and inhibitory synapses are crucial for developing intelligence systems, such as traffic control systems. However, achieving reconfigurability between two working modes (inhibitory and excitatory) and bilingual synaptic behavior in a single transistor remains challenging. This study successfully mimics a bilingual synaptic response using an artificial synapse based on an ambipolar floating gate memory comprising tungsten selenide (WSe₂)/hexagonal boron nitride (h-BN)/ molybdenum telluride (MoTe₂). In this WSe₂/h-BN/MoTe₂ structure, ambipolar semiconductors WSe₂ and MoTe₂ are inserted as channel and floating gates, respectively, and h-BN serves as the tunneling barrier layer. Using either positive or negative pulse amplitude modulations at the control gate, this device with bipolar channel conduction produced eight distinct resistance states. Based on this, we experimentally projected that we could achieve 490 memory states (210 hole-resistance states + 280 electron-resistance states). Using the bipolar charge transport and multistorage states of WSe₂/h-BN/MoTe₂ floating gate memory, we mimicked reconfigurable excitatory and inhibitory synaptic plasticity in a single device. Furthermore, the convolution neural network formed by these synaptic devices can recognize handwritten digits with an accuracy of >92%. This study identifies the unique properties of heterostructure devices based on two-dimensional materials as well as predicts their applicability in advanced recognition of neuromorphic computing.

Reconfigurable Two-Dimensional Air-Gap Barristors

Reconfigurable logic circuits implemented by two-dimensional (2D) ambipolar semiconductors provide a prospective solution for the post-Moore era. It is still a challenge for ambipolar nanomaterials to realize reconfigurable polarity control and rectification with a simplified device structure. Here, an air-gap barristor based on an asymmetric stacking sequence of the electrode contacts was developed to resolve these issues. For the 2D ambipolar channel of WSe₂, the barristor can not only be reconfigured as an n- or p-type unipolar transistor but also work as a switchable diode. The air gap around the bottom electrode dominates the reconfigurable behaviors by widening the Schottky barrier here, thus blocking the injection of both electrons and holes. The electrical performances can be improved by optimizing the electrode materials, which achieve an on/off ratio of 10⁴ for the transistor and a rectifying ratio of 10⁵ for the diode. A complementary inverter and a switchable AND/OR logic gate were constructed by using the air-gap barristors as building blocks. This work provides an efficient approach with great potential for low-dimensional reconfigurable electronics.

Perspective of 2D Integrated Electronic Circuits: Scientific Pipe Dream or Disruptive Technology?

Within the last decade, considerable efforts have been devoted to fabricating transistors utilizing 2D semiconductors. Also, small circuits consisting of a few transistors have been demonstrated, including inverters, ring oscillators, and static random access memory cells. However, for industrial applications, both time-zero and time-dependent variability in the performance of the transistors appear critical. While time-zero variability is primarily related to immature processing, time-dependent drifts are dominated by charge trapping at defects located at the channel/insulator interface and in the insulator itself, which can substantially degrade the stability of circuits. At the current state of the art, 2D transistors typically exhibit a few orders of magnitude higher trap densities than silicon devices, which considerably increases their time-dependent variability, resulting in stability and yield issues. Here, the stability of currently available 2D electronics is carefully evaluated using circuit simulations to determine the impact of transistor-related issues on the overall circuit performance. The results suggest that while the performance parameters of transistors based on certain material combinations are already getting close to being competitive with Si technologies, a reduction in variability and defect densities is required. Overall, the criteria for parameter variability serve as guidance for evaluating the future development of 2D technologies.

Double-Gate MoS2 Field-Effect Transistors with Full-Range Tunable Threshold Voltage for Multifunctional Logic Circuits

Multifunctional reconfigurable devices, with higher information capacity, smaller size, and more functions, are urgently needed and draw most attention in frontiers in information technology. 2D semiconductors, ascribing to ultrathin body and easy electrostatic control, show great potential in developing reconfigurable functional units. This work proposes a novel double-gate field-effect transistor architecture with equal top and bottom gate (TG and BG) and realizes flexible optimization of the subthreshold swing (SS) and threshold voltage (V_TH ). While the TG and BG are used simultaneously, as a single gate to drive the transistor, ultralow average SS value of 65.5 mV dec^-1 can be obtained in a large current range over 10⁴ , enabling the application in high gain inverter. While one gate is used to initialize the channel doping, full logic swing inverter circuit with high noise margin (over 90%) is demonstrated. Such device prototype is further extended for designing reconfigurable logic applications and can be dynamically switched and well maintained between binary and ternary logics. This study provides important concept and device prototype for future multifunctional logic applications.