Level Spectrum and Charge Relaxation in a Silicon Double Quantum Dot Probed by Dual-Gate Reflectometry

Pulse-controlled qubit in semiconductor double quantum dots

We present a numerically-optimized multipulse framework for the quantum control of a single-electron double quantum dot qubit. Our framework defines a set of pulse sequences, necessary for the manipulation of the ideal qubit basis, that avoids errors associated with excitations outside the computational subspace. A novel control scheme manipulates the qubit adiabatically, while also retaining high speed and ability to perform a general single-qubit rotation. This basis generates spatially localized logical qubit states, making readout straightforward. We consider experimentally realistic semiconductor qubits with finite pulse rise and fall times and determine the fastest pulse sequence yielding the highest fidelity. We show that our protocol leads to improved control of a qubit. We present simulations of a double quantum dot in a semiconductor device to visualize and verify our protocol. These results can be generalized to other physical systems since they depend only on pulse rise and fall times and the energy gap between the two lowest eigenstates.

Multi-Dimensional Quantum Capacitance of the Two-Site Hubbard Model: The Role of Tunable Interdot Tunneling

Few-electron states confined in quantum-dot arrays are key objects in quantum computing. The discrimination between these states is essential for the readout of a (multi-)qubit state, and can be achieved through a measurement of the quantum capacitance within the gate-reflectometry approach. For a system controlled by several gates, the dependence of the measured capacitance on the direction of the oscillations in the voltage space is captured by the quantum capacitance matrix. Herein, we apply this tool to study a double quantum dot coupled to three gates, which enable the tuning of both the bias and the tunneling between the two dots. Analytical solutions for the two-electron case are derived within a Hubbard model, showing the overall dependence of the quantum capacitance matrix on the applied gate voltages. In particular, we investigate the role of the tunneling gate and reveal the possibility of exploiting interdot coherences in addition to charge displacements between the dots. Our results can be directly applied to double-dot experimental setups, and pave the way for further applications to larger arrays of quantum dots.

Gate reflectometry of single-electron box arrays using calibrated low temperature matching networks

Sensitive dispersive readouts of single-electron devices (“gate reflectometry”) rely on one-port radio-frequency (RF) reflectometry to read out the state of the sensor. A standard practice in reflectometry measurements is to design an impedance transformer to match the impedance of the load to the characteristic impedance of the transmission line and thus obtain the best sensitivity and signal-to-noise ratio. This is particularly important for measuring large impedances, typical for dispersive readouts of single-electron devices because even a small mismatch will cause a strong signal degradation. When performing RF measurements, a calibration and error correction of the measurement apparatus must be performed in order to remove errors caused by unavoidable non-idealities of the measurement system. Lack of calibration makes optimizing a matching network difficult and ambiguous, and it also prevents a direct quantitative comparison between measurements taken of different devices or on different systems. We propose and demonstrate a simple straightforward method to design and optimize a pi matching network for readouts of devices with large impedance, \documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$Z \ge 1\hbox {M}\Omega$$\end{document}Z≥1MΩ. It is based on a single low temperature calibrated measurement of an unadjusted network composed of a single L-section followed by a simple calculation to determine a value of the “balancing” capacitor needed to achieve matching conditions for a pi network. We demonstrate that the proposed calibration/error correction technique can be directly applied at low temperature using inexpensive calibration standards. Using proper modeling of the matching networks adjusted for low temperature operation the measurement system can be easily optimized to achieve the best conditions for energy transfer and targeted bandwidth, and can be used for quantitative measurements of the device impedance. In this work we use gate reflectometry to readout the signal generated by arrays of parallel-connected Al-AlOx single-electron boxes. Such arrays can be used as a fast nanoscale voltage sensor for scanning probe applications. We perform measurements of sensitivity and bandwidth for various settings of the matching network connected to arrays and obtain strong agreement with the simulations.

Gate-reflectometry dispersive readout and coherent control of a spin qubit in silicon

Silicon spin qubits have emerged as a promising path to large-scale quantum processors. In this prospect, the development of scalable qubit readout schemes involving a minimal device overhead is a compelling step. Here we report the implementation of gate-coupled rf reflectometry for the dispersive readout of a fully functional spin qubit device. We use a p-type double-gate transistor made using industry-standard silicon technology. The first gate confines a hole quantum dot encoding the spin qubit, the second one a helper dot enabling readout. The qubit state is measured through the phase response of a lumped-element resonator to spin-selective interdot tunneling. The demonstrated qubit readout scheme requires no coupling to a Fermi reservoir, thereby offering a compact and potentially scalable solution whose operation may be extended above 1 K.