Analysis of Interface Phenomena for High-Performance Dual-Stacked Oxide Thin-Film Transistors via Equivalent Circuit Modeling

Machine Learning Strategy for Optimizing Multiple Electrical Characteristics in Dual-Layer Oxide Thin Film Transistors

A machine learning (ML) strategy is suggested to optimize dual-layer oxide thin film transistor (TFTs) performance. In this study, Bayesian optimization (BO), an algorithm recognized for its efficiency in optimizing material design, is applied to guide the design of a channel layer composed of IZO and IGZO. The sputtering fabrication process, which has attracted attention as an oxide semiconductor channel layer deposition method, is fine-tuned using ML to enhance multiple electrical characteristics of transistors: field-effect mobility, threshold voltage, and subthreshold swing. Using BO, the sputtering conditions─plasma power, pressure, and gas ratio, which intricately influence device performance─were modified using 19 data sets of 84 scenarios. It reveals that the modulated process conditions improve field-effect mobility up to 46.7 cm2V-1s-1, achieving more than double the performance of conventional IGZO TFTs. Furthermore, it was observed that threshold voltage is optimized to zero voltage, and the subthreshold swing is considerably improved, contributing to reduced power consumption. This study demonstrates that leveraging ML to optimize TFTs design not only accelerates the design process but also improves device performance dramatically. Overall, this ML strategy manages complex correlations among process parameters, properties, and performance and sets a precedent for the expeditious optimization of semiconductor devices.

Efficient Ionovoltaic Energy Harvesting via Water-Induced p-n Junction in Reduced Graphene Oxide

Water motion-induced energy harvesting has emerged as a prominent means of facilitating renewable electricity from the interaction between nanostructured materials and water over the past decade. Despite the growing interest, comprehension of the intricate solid-liquid interfacial phenomena related to solid state physics remains elusive and serves as a hindrance to enhancing energy harvesting efficiency up to the practical level. Herein, the study introduces the energy harvester by utilizing inversion on the majority charge carrier in graphene materials upon interaction with water molecules. Specifically, various metal electrode configurations are employed on reduced graphene oxide (rGO) to unravel its distinctive charge carriers that experience the inversion in semiconductor type upon water contact, and exploit this characteristic to leverage the efficacy of generated electricity. Through the strategic arrangement of the metal electrodes on rGO membrane, the open-circuit voltage (Voc) and short-circuit current (Isc) have exhibited a remarkable augmentation, reaching 1.05 V and 31.6 µA, respectively. The demonstration of effectively tailoring carrier dynamics via electrode configuration expands the practicality by achieving high power density and elucidating how the water-induced carrier density modulation occurs in 2D nanomaterials.

Machine Learning Driven Channel Thickness Optimization in Dual-Layer Oxide Thin-Film Transistors for Advanced Electrical Performance

Machine learning (ML) provides temporal advantage and performance improvement in practical electronic device design by adaptive learning. Herein, Bayesian optimization (BO) is successfully applied to the design of optimal dual-layer oxide semiconductor thin film transistors (OS TFTs). This approach effectively manages the complex correlation and interdependency between two oxide semiconductor layers, resulting in the efficient design of experiment (DoE) and reducing the trial-and-error. Considering field effect mobility (𝜇) and threshold voltage (Vth ) simultaneously, the dual-layer structure designed by the BO model allows to produce OS TFTs with remarkable electrical performance while significantly saving an amount of experimental trial (only 15 data sets are required). The optimized dual-layer OS TFTs achieve the enhanced field effect mobility of 36.1 cm2  V-1  s-1 and show good stability under bias stress with negligible difference in its threshold voltage compared to conventional IGZO TFTs. Moreover, the BO algorithm is successfully customized to the individual preferences by applying the weight factors assigned to both field effect mobility (𝜇) and threshold voltage (Vth ).

Surface Oxygen Vacancy Inducing Li-Ion-Conducting Percolation Network in Composite Solid Electrolytes for All-Solid-State Lithium-Metal Batteries

Composite solid electrolytes (CSEs) are newly emerging components for all-solid-state Li-metal batteries owing to their excellent processability and compatibility with the electrodes. Moreover, the ionic conductivity of the CSEs is one order of magnitude higher than the solid polymer electrolytes (SPEs) by incorporation of inorganic fillers into SPEs. However, their advancement has come to a standstill owing to unclear Li-ion conduction mechanism and pathway. Herein, the dominating effect of the oxygen vacancy (O_vac ) in the inorganic filler on the ionic conductivity of CSEs is demonstrated via Li-ion-conducting percolation network model. Based on density functional theory, indium tin oxide nanoparticles (ITO NPs) are selected as inorganic filler to determine the effect of O_vac on the ionic conductivity of the CSEs. Owing to the fast Li-ion conduction through the O_vac inducing percolation network on ITO NP-polymer interface, LiFePO₄ /CSE/Li cells using CSEs exhibit a remarkable capacity in long-term cycling (154 mAh g^-1 at 0.5C after 700 cycles). Moreover, by modifying the O_vac concentration of ITO NPs via UV-ozone oxygen-vacancy modification, the ionic conductivity dependence of the CSEs on the surface O_vac from the inorganic filler is directly verified.

AMOLED Pixel Circuit Using LTPO Technology Supporting Variable Frame Rate from 1 to 120 Hz for Portable Displays

This paper proposes a new 6T1C pixel circuit based on low-temperature polycrystalline oxide (LTPO) technology for portable active-matrix organic light-emitting diode (AMOLED) displays with variable refresh rates ranging from 1 to 120 Hz. The proposed circuit has a simple structure and is based on the design of sharing lines of switch-controlling signals. It also provides low-voltage driving and immunity to OLED degeneration issues. The calculation and analysis of programming time are discussed, and the optimal storage capacitor for the proposed circuit's high-speed driving is selected. The results of the simulation reveal that threshold voltage variations in driving thin-film transistors of ±0.33 V can be well sensed and compensated with a 1.8% average shift of OLED currents in high-frame-rate operation (120 Hz), while the maximum variation in OLED currents within all gray levels is only 3.56 nA in low-frame-rate operation (1 Hz). As a result, the proposed 6T1C pixel circuit is a good candidate for use in portable AMOLED displays.