Atomistic study on dopant-distributions in realistically sized, highly P-doped Si nanowires

Role of Quantum Confinement in 10 nm Scale Perovskite Optoelectronics

Quantum confinement-driven band structure engineering of metal halide perovskites (MHPs) is examined for realistically sized structures that consist of up to 10⁵ atoms. The structural and compositional effects on band gap energies are simulated for crystalline CH₃NH₃PbX₃ (X = I/Br/Cl) with a tight-binding approach that has been well-established for electronic structure calculations of multimillion atomic systems. Solid maps of band gap energies achievable with quantum dots, nanowires, and nanoplatelets concerning sizes, shapes, and halide compositions are presented, which should be informative to experimentalists for band gap designs. The pathway to suppress band gap instability that appeared in mixed halide perovskites is proposed, revealing that the red shift induced by halide phase separation can be hugely diminished by reducing sizes and adopting halides of lower electronegativity. Our modeling results on finite MHP structures of over 10 nm dimensions show a blueprint for designs of stable light-emitting sources with precisely controlled wavelengths.

A multi-subband Monte Carlo study on dominance of scattering mechanisms over carrier transport in sub-10-nm Si nanowire FETs

Dominance of various scattering mechanisms in determination of the carrier mobility is examined for silicon (Si) nanowires of sub-10-nm cross-sections. With a focus on p-type channels, the steady-state hole mobility is studied with multi-subband Monte Carlo simulations to consider quantum effects in nanoscale channels. Electronic structures of gate-all-around nanowires are described with a 6-band k · p model. Channel bandstructures and electrostatics under gate biases are determined self-consistently with Schrödinger-Poisson simulations. Modeling results not only indicate that the hole mobility is severely degraded as channels have smaller cross-sections and are inverted more strongly but also confirm that the surface roughness scattering degrades the mobility more severely than the phonon scattering does. The surface roughness scattering affects carrier transport more strongly in narrower channels, showing ∼90 % dominance in determination of the mobility. At the same channel population, [110] channels suffer from the surface roughness scattering more severely than [100] channels do, due to the stronger corner effect and larger population of carriers residing near channel surfaces. With a sound theoretical framework coupled to the spatial distribution of channel carriers, this work may present a useful guideline for understanding hole transport in ultra-narrow Si nanowires.

Valley-engineered ultra-thin silicon for high-performance junctionless transistors

Extremely thin silicon show good mechanical flexibility because of their 2-D like structure and enhanced performance by the quantum confinement effect. In this paper, we demonstrate a junctionless FET which reveals a room temperature quantum confinement effect (RTQCE) achieved by a valley-engineering of the silicon. The strain-induced band splitting and a quantum confinement effect induced from ultra-thin-body silicon are the two main mechanisms for valley engineering. These were obtained from the extremely well-controlled silicon surface roughness and high tensile strain in silicon, thereupon demonstrating a device mobility increase of ~500% in a 2.5 nm thick silicon channel device.