A Bidirectional Neural Interface SoC With Adaptive IIR Stimulation Artifact Cancelers

Epidural spinal cord recordings (ESRs): sources of neural-appearing artifact in stimulation evoked compound action potentials

Objective. Evoked compound action potentials (ECAPs) measured during epidural spinal cord stimulation (SCS) can help elucidate fundamental mechanisms for the treatment of pain and inform closed-loop control of SCS. Previous studies have used ECAPs to characterize neural responses to various neuromodulation therapies and have demonstrated that ECAPs are highly prone to multiple sources of artifact, including post-stimulus pulse capacitive artifact, electromyography (EMG) bleed-through, and motion artifact. However, a thorough characterization has yet to be performed for how these sources of artifact may contaminate recordings within the temporal window commonly used to determine activation of A-beta fibers in a large animal model.Approach. We characterized sources of artifacts that can contaminate the recording of ECAPs in an epidural SCS swine model using the Abbott Octrode™ lead.Main results. Spinal ECAP recordings can be contaminated by capacitive artifact, short latency EMG from nearby muscles of the back, and motion artifact. The capacitive artifact can appear nearly identical in duration and waveshape to evoked A-beta responses. EMG bleed-through can have phase shifts across the electrode array, similar to the phase shift anticipated by propagation of an evoked A-beta fiber response. The short latency EMG is often evident at currents similar to those needed to activate A-beta fibers associated with the treatment of pain. Changes in CSF between the cord and dura, and motion induced during breathing created a cyclic oscillation in all evoked components of recorded ECAPs.Significance. Controls must be implemented to separate neural signal from sources of artifact in SCS ECAPs. We suggest experimental procedures and reporting requirements necessary to disambiguate underlying neural response from these confounds. These data are important to better understand the framework for epidural spinal recordings (ESRs), with components such as ECAPs, EMG, and artifacts, and have important implications for closed-loop control algorithms to account for transient motion such as postural changes and cough.

Anti-artifacts techniques for neural recording front-ends in closed-loop brain-machine interface ICs

In recent years, thanks to the development of integrated circuits, clinical medicine has witnessed significant advancements, enabling more efficient and intelligent treatment approaches. Particularly in the field of neuromedical, the utilization of brain-machine interfaces (BMI) has revolutionized the treatment of neurological diseases such as amyotrophic lateral sclerosis, cerebral palsy, stroke, or spinal cord injury. The BMI acquires neural signals via recording circuits and analyze them to regulate neural stimulator circuits for effective neurological treatment. However, traditional BMI designs, which are often isolated, have given way to closed-loop brain-machine interfaces (CL-BMI) as a contemporary development trend. CL-BMI offers increased integration and accelerated response speed, marking a significant leap forward in neuromedicine. Nonetheless, this advancement comes with its challenges, notably the stimulation artifacts (SA) problem inherent to the structural characteristics of CL-BMI, which poses significant challenges on the neural recording front-ends (NRFE) site. This paper aims to provide a comprehensive overview of technologies addressing artifacts in the NRFE site within CL-BMI. Topics covered will include: (1) understanding and assessing artifacts; (2) exploring the impact of artifacts on traditional neural recording front-ends; (3) reviewing recent technological advancements aimed at addressing artifact-related issues; (4) summarizing and classifying the aforementioned technologies, along with an analysis of future trends.

A High Precision, Wide Dynamic Range Closed-Loop Neuromodulation IC With Rapid Stimulation Artifact Recovery

This article presents a high precision, wide dynamic range (DR) closed-loop neuromodulation (CLNM) system that can completely reject stimulation artifacts (SA) and achieve rapid SA recovery. In the recorder, a novel SA quick-blanking scheme is proposed for rail-to-rail SA rejection while minimizing SA recovery time. Besides, a new analog front-end (AFE) architecture based on a frequency-shaping (FS) technique is developed to extend DR intrinsically. In the stimulator, a stimulation driver implemented with a proposed redundant crossfire (RXF) technique is incorporated to improve the effective resolution of the stimulation current. The designed CLNM system is implemented in a 180 nm Bipolar-CMOS-DMOS (BCD) process. Measurement results show that the system is capable of tolerating rail-to-rail (5 V) SA and reducing the SA recovery time from 12 ms to 0.15 ms. The FS recorder extends the DR at low frequencies (LF) to 17.5 bits to enhance tolerance to LF interferences. The proposed stimulator adopting the 4-way RXF topology improves the effective resolution to 12.75 bits without consuming much extra area and power. Animal experiments demonstrate that the designed system can acquire high-fidelity neural signals immediately after stimulation onsets, thus supporting concurrent recording and stimulation.

In-ear integrated sensor array for the continuous monitoring of brain activity and of lactate in sweat

Owing to the proximity of the ear canal to the central nervous system, in-ear electrophysiological systems can be used to unobtrusively monitor brain states. Here, by taking advantage of the ear's exocrine sweat glands, we describe an in-ear integrated array of electrochemical and electrophysiological sensors placed on a flexible substrate surrounding a user-generic earphone for the simultaneous monitoring of lactate concentration and brain states via electroencephalography, electrooculography and electrodermal activity. In volunteers performing an acute bout of exercise, the device detected elevated lactate levels in sweat concurrently with the modulation of brain activity across all electroencephalography frequency bands. Simultaneous and continuous unobtrusive in-ear monitoring of metabolic biomarkers and brain electrophysiology may allow for the discovery of dynamic and synergetic interactions between brain and body biomarkers in real-world settings for long-term health monitoring or for the detection or monitoring of neurodegenerative diseases.

A Wireless Headstage System Based on Neural-Recording Chip Featuring 315 nW Kickback-Reduction SAR ADC

Wireless neural-recording instruments eliminate the bulky cables in multi-channel signal transmission, while the system size should be reduced to mitigate the impact on freely-moving animals. As the battery usually dominates the system size, the neural-recording chip should be low power to minimize the battery in long-termly monitoring. In general, a neural-recording chip consists of an analog front end (AFE) and an 8 bit -10 bit analog-to-digital converter (ADC), while it's challenging to design an ADC with an 8 -10 effective number of bits (ENOB) and sub- μ W power consumption due to the kickback noise. In this work, we propose a kickback-reduction technique for a successive-approximation-register (SAR) ADC based on neural-recording chip. Fabricated in 65 nm CMOS process, the proposed technique reduce the ADC power to 315 nW, resulting in an 8-channel neural-recording chip with 249 μW in total. Measured results show that the chip achieves an ADC ENOB of 9.73 bits, as well as an AFE gain of 43.3 dB and input-referred noise (IRN) of 9.68 μV_rms in a bandwidth of 0.9 Hz -7.2 kHz. Combined with a BLE chip and a PCB antenna, the chip is implemented into a 2.6 g wireless headstage system (w/o battery), and an in-vivo demonstration is conducted on a male Sprague-Dawley rat with Parkinson's disease. The headstage system transfers the in-vivo neural signals to a commodity smartphone through BLE, and the miniature size induces little impact on freely-moving activities.

Power-efficientin vivobrain-machine interfaces via brain-state estimation

Objective.Advances in brain-machine interfaces (BMIs) can potentially improve the quality of life of millions of users with spinal cord injury or other neurological disorders by allowing them to interact with the physical environment at their will.Approach.To reduce the power consumption of the brain-implanted interface, this article presents the first hardware realization of anin vivointention-aware interface via brain-state estimation.Main Results.It is shown that incorporating brain-state estimation reduces thein vivopower consumption and reduces total energy dissipation by over 1.8× compared to those of the current systems, enabling longer better life for implanted circuits. The synthesized application-specific integrated circuit (ASIC) of the designed intention-aware multi-unit spike detection system in a standard 180 nm CMOS process occupies 0.03 mm²of silicon area and consumes 0.63 µW of power per channel, which is the least power consumption among the currentin vivoASIC realizations.Significance.The proposed interface is the first practical approach towards realizing asynchronous BMIs while reducing the power consumption of the BMI interface and enhancing neural decoding performance compared to those of the conventional synchronous BMIs.

Adaptively Clock-Boosted Auto-Ranging Neural-Interface for Emerging Neuromodulation Applications

Responsive deep brain stimulation (DBS) requires recruiting deep brain structures without affecting the superficial neuronal population. Neurosurgeons widely use implanted electrodes, which are highly localized but invasive, to stimulate the deep brain. Temporally interfering stimulation (TIS) excites the deep brain non-invasively. This neuromodulation technique utilizes two high-frequency sinusoidal electric fields that do not recruit superficial neural structures but have a small frequency differential. The small differential causes a low-frequency interference envelope that stimulates deep regions and is steerable by changing the intensity of the electric fields without physically moving the electrodes. Using TIS as a non-invasive DBS method generates high-frequency stimulation artifacts at recording sites, which may saturate a conventional recording front-end. This paper presents a low-power bidirectional 64-channel CMOS neural-ADC that is immune to artifacts such as those in the TIS techniques or conventional biphasic stimulation. The presented DC-coupled chopped analog front-end leverages delta-spectrum shaping to remove electrode DC offset voltage and maintain the input impedance higher than 250 MΩ, which is sufficient for interfacing with non-invasive scalp electrodes. The AFE operates on the input signal difference to detect large and rapid stimulation artifacts. It incorporates both exponential tracking and boosted-rate sampling to recover within 100 μs. Upon recovery, the neural-ADC range and speed are reduced to achieve noise and power efficiency factors of 2.98 and 10.6, respectively. In vivo recordings from anesthetized mice demonstrate the unique capabilities of the presented architecture in resolving local field potentials from the surface and epidural electrodes.

Highly Configurable 100 Channel Recording and Stimulating Integrated Circuit for Biomedical Experiments

This paper presents the design results of a 100-channel integrated circuit dedicated to various biomedical experiments requiring both electrical stimulation and recording ability. The main design motivation was to develop an architecture that would comprise not only the recording and stimulation, but would also block allowing to meet different experimental requirements. Therefore, both the controllability and programmability were prime concerns, as well as the main chip parameters uniformity. The recording stage allows one to set their parameters independently from channel to channel, i.e., the frequency bandwidth can be controlled in the (0.3 Hz-1 kHz)-(20 Hz-3 kHz) (slow signal path) or (0.3 Hz-1 kHz)-4.7 kHz (fast signal path) range, while the voltage gain can be set individually either to 43.5 dB or 52 dB. Importantly, thanks to in-pixel circuitry, main system parameters may be controlled individually allowing to mitigate the circuitry components spread, i.e., lower corner frequency can be tuned in the 54 dB range with approximately 5% precision, and the upper corner frequency spread is only 4.2%, while the voltage gain spread is only 0.62%. The current stimulator may also be controlled in the broad range (69 dB) with its current setting precision being no worse than 2.6%. The recording channels' input-referred noise is equal to 8.5 µVRMS in the 10 Hz-4.7 kHz bandwidth. The single-pixel occupies 0.16 mm2 and consumes 12 µW (recording part) and 22 µW (stimulation blocks).

Advances in Neural Recording and Stimulation Integrated Circuits

In the past few decades, driven by the increasing demands in the biomedical field aiming to cure neurological diseases and improve the quality of daily lives of the patients, researchers began to take advantage of the semiconductor technology to develop miniaturized and power-efficient chips for implantable applications. The emergence of the integrated circuits for neural prosthesis improves the treatment process of epilepsy, hearing loss, retinal damage, and other neurological diseases, which brings benefits to many patients. However, considering the safety and accuracy in the neural prosthesis process, there are many research directions. In the process of chip design, designers need to carefully analyze various parameters, and investigate different design techniques. This article presents the advances in neural recording and stimulation integrated circuits, including (1) a brief introduction of the basics of neural prosthesis circuits and the repair process in the bionic neural link, (2) a systematic introduction of the basic architecture and the latest technology of neural recording and stimulation integrated circuits, (3) a summary of the key issues of neural recording and stimulation integrated circuits, and (4) a discussion about the considerations of neural recording and stimulation circuit architecture selection and a discussion of future trends. The overview would help the designers to understand the latest performances in many aspects and to meet the design requirements better.