Application of Event Cameras and Neuromorphic Computing to VSLAM: A Survey

Simultaneous Localization and Mapping (SLAM) is a crucial function for most autonomous systems, allowing them to both navigate through and create maps of unfamiliar surroundings. Traditional Visual SLAM, also commonly known as VSLAM, relies on frame-based cameras and structured processing pipelines, which face challenges in dynamic or low-light environments. However, recent advancements in event camera technology and neuromorphic processing offer promising opportunities to overcome these limitations. Event cameras inspired by biological vision systems capture the scenes asynchronously, consuming minimal power but with higher temporal resolution. Neuromorphic processors, which are designed to mimic the parallel processing capabilities of the human brain, offer efficient computation for real-time data processing of event-based data streams. This paper provides a comprehensive overview of recent research efforts in integrating event cameras and neuromorphic processors into VSLAM systems. It discusses the principles behind event cameras and neuromorphic processors, highlighting their advantages over traditional sensing and processing methods. Furthermore, an in-depth survey was conducted on state-of-the-art approaches in event-based SLAM, including feature extraction, motion estimation, and map reconstruction techniques. Additionally, the integration of event cameras with neuromorphic processors, focusing on their synergistic benefits in terms of energy efficiency, robustness, and real-time performance, was explored. The paper also discusses the challenges and open research questions in this emerging field, such as sensor calibration, data fusion, and algorithmic development. Finally, the potential applications and future directions for event-based SLAM systems are outlined, ranging from robotics and autonomous vehicles to augmented reality.

Artificial Neuron Devices

Efforts to design devices emulating complex cognitive abilities and response processes of biological systems have long been a coveted goal. Recent advancements in flexible electronics, mirroring human tissue's mechanical properties, hold significant promise. Artificial neuron devices, hinging on flexible artificial synapses, bioinspired sensors, and actuators, are meticulously engineered to mimic the biological systems. However, this field is in its infancy, requiring substantial groundwork to achieve autonomous systems with intelligent feedback, adaptability, and tangible problem-solving capabilities. This review provides a comprehensive overview of recent advancements in artificial neuron devices. It starts with fundamental principles of artificial synaptic devices and explores artificial sensory systems, integrating artificial synapses and bioinspired sensors to replicate all five human senses. A systematic presentation of artificial nervous systems follows, designed to emulate fundamental human nervous system functions. The review also discusses potential applications and outlines existing challenges, offering insights into future prospects. We aim for this review to illuminate the burgeoning field of artificial neuron devices, inspiring further innovation in this captivating area of research.

Energy-efficient and noise-tolerant neuromorphic computing based on memristors and domino logic

The growing scale and complexity of artificial intelligence (AI) models has prompted several new research efforts in the area of neuromorphic computing. A key aim of neuromorphic computing is to enable advanced AI algorithms to run on energy-constrained hardware. In this work, we propose a novel energy-efficient neuromorphic architecture based on memristors and domino logic. The design uses the delay of memristor RC circuits to represent synaptic computations and a simple binary neuron activation function. Synchronization schemes are proposed for communicating information between neural network layers, and a simple linear power model is developed to estimate the design’s energy efficiency for a particular network size. Results indicate that the proposed architecture can achieve 1.26 fJ per classification per synapse and achieves high accuracy on image classification even in the presence of large noise.

Memristor Neural Networks for Linear and Quadratic Programming Problems

This article introduces a new class of memristor neural networks (NNs) for solving, in real-time, quadratic programming (QP) and linear programming (LP) problems. The networks, which are called memristor programming NNs (MPNNs), use a set of filamentary-type memristors with sharp memristance transitions for constraint satisfaction and an additional set of memristors with smooth memristance transitions for memorizing the result of a computation. The nonlinear dynamics and global optimization capabilities of MPNNs for QP and LP problems are thoroughly investigated via a recently introduced technique called the flux-charge analysis method. One main feature of MPNNs is that the processing is performed in the flux-charge domain rather than in the conventional voltage-current domain. This enables exploiting the unconventional features of memristors to obtain advantages over the traditional NNs for QP and LP problems operating in the voltage-current domain. One advantage is that operating in the flux-charge domain allows for reduced power consumption, since in an MPNN, voltages, currents, and, hence, power vanish when the quick analog transient is over. Moreover, an MPNN works in accordance with the fundamental principle of in-memory computing, that is, the nonlinearity of the memristor is used in the dynamic computation, but the same memristor is also used to memorize in a nonvolatile way the result of a computation.

Opportunities for neuromorphic computing algorithms and applications

Neuromorphic computing technologies will be important for the future of computing, but much of the work in neuromorphic computing has focused on hardware development. Here, we review recent results in neuromorphic computing algorithms and applications. We highlight characteristics of neuromorphic computing technologies that make them attractive for the future of computing and we discuss opportunities for future development of algorithms and applications on these systems.

Mixed-Precision Deep Learning Based on Computational Memory

Deep neural networks (DNNs) have revolutionized the field of artificial intelligence and have achieved unprecedented success in cognitive tasks such as image and speech recognition. Training of large DNNs, however, is computationally intensive and this has motivated the search for novel computing architectures targeting this application. A computational memory unit with nanoscale resistive memory devices organized in crossbar arrays could store the synaptic weights in their conductance states and perform the expensive weighted summations in place in a non-von Neumann manner. However, updating the conductance states in a reliable manner during the weight update process is a fundamental challenge that limits the training accuracy of such an implementation. Here, we propose a mixed-precision architecture that combines a computational memory unit performing the weighted summations and imprecise conductance updates with a digital processing unit that accumulates the weight updates in high precision. A combined hardware/software training experiment of a multilayer perceptron based on the proposed architecture using a phase-change memory (PCM) array achieves 97.73% test accuracy on the task of classifying handwritten digits (based on the MNIST dataset), within 0.6% of the software baseline. The architecture is further evaluated using accurate behavioral models of PCM on a wide class of networks, namely convolutional neural networks, long-short-term-memory networks, and generative-adversarial networks. Accuracies comparable to those of floating-point implementations are achieved without being constrained by the non-idealities associated with the PCM devices. A system-level study demonstrates 172 × improvement in energy efficiency of the architecture when used for training a multilayer perceptron compared with a dedicated fully digital 32-bit implementation.