Low-power artificial neuron networks with enhanced synaptic functionality using dual transistor and dual memristor

Artificial neurons with bio-inspired firing patterns have the potential to significantly improve the performance of neural network computing. The most significant component of an artificial neuron circuit is a large amount of energy consumption. Recent literature has proposed memristors as a promising option for synaptic implementation. In contrast, implementing memristive circuitry through neuron hardware presents significant challenges and is a relevant research topic. This paper describes an efficient circuit-level mixed CMOS memristor artificial neuron network with a memristor synapse model. From this perspective, the paper describes the design of artificial neurons in standard CMOS technology with low power utilization. The neuron circuit response is a modified version of the Morris-Lecar theoretical model. The suggested circuit employs memristor-based artificial neurons with Dual Transistor and Dual Memristor (DTDM) synapse circuit. The proposed neuron network produces a high spiking frequency and low power consumption. According to our research, a memristor-based Morris Lecar (ML) neuron with a DTDM synapse circuit consumes 12.55 pW of power, the spiking frequency is 22.72 kHz, and 2.13 fJ of energy per spike. The simulations were carried out using the Spectre tool with 45 nm CMOS technology.

Phase-change memtransistive synapses for mixed-plasticity neural computations

In the mammalian nervous system, various synaptic plasticity rules act, either individually or synergistically, over wide-ranging timescales to enable learning and memory formation. Hence, in neuromorphic computing platforms, there is a significant need for artificial synapses that can faithfully express such multi-timescale plasticity mechanisms. Although some plasticity rules have been emulated with elaborate complementary metal oxide semiconductor and memristive circuitry, device-level hardware realizations of long-term and short-term plasticity with tunable dynamics are lacking. Here we introduce a phase-change memtransistive synapse that leverages both the non-volatility of the phase configurations and the volatility of field-effect modulation for implementing tunable plasticities. We show that these mixed-plasticity synapses can enable plasticity rules such as short-term spike-timing-dependent plasticity that helps with the modelling of dynamic environments. Further, we demonstrate the efficacy of the memtransistive synapses in realizing accelerators for Hopfield neural networks for solving combinatorial optimization problems.

Chalcogenide optomemristors for multi-factor neuromorphic computation

Neuromorphic hardware that emulates biological computations is a key driver of progress in AI. For example, memristive technologies, including chalcogenide-based in-memory computing concepts, have been employed to dramatically accelerate and increase the efficiency of basic neural operations. However, powerful mechanisms such as reinforcement learning and dendritic computation require more advanced device operations involving multiple interacting signals. Here we show that nano-scaled films of chalcogenide semiconductors can perform such multi-factor in-memory computation where their tunable electronic and optical properties are jointly exploited. We demonstrate that ultrathin photoactive cavities of Ge-doped Selenide can emulate synapses with three-factor neo-Hebbian plasticity and dendrites with shunting inhibition. We apply these properties to solve a maze game through on-device reinforcement learning, as well as to provide a single-neuron solution to linearly inseparable XOR implementation.

Some types of machine learning rely on the interaction between multiple signals, which requires new devices for efficient implementation. Here, Sarwat et al demonstrate a memristor that is both optically and electronically active, enabling computational models such as three factor learning.

From Memristive Materials to Neural Networks

The information technologies have been increasing exponentially following Moore's law over the past decades. This has fundamentally changed the ways of work and life. However, further improving data process efficiency is facing great challenges because of physical and architectural limitations. More powerful computational methodologies are crucial to fulfill the technology gap in the post-Moore's law period. The memristor exhibits promising prospects in information storage, high-performance computing, and artificial intelligence. Since the memristor was theoretically predicted by L. O. Chua in 1971 and experimentally confirmed by HP Laboratories in 2008, it has attracted great attention from worldwide researchers. The intrinsic properties of memristors, such as simple structure, low power consumption, compatibility with the complementary metal oxide-semiconductor (CMOS) process, and dual functionalities of the data storage and computation, demonstrate great prospects in many applications. In this review, we cover the memristor-relevant computing technologies, from basic materials to in-memory computing and future prospects. First, the materials and mechanisms in the memristor are discussed. Then, we present the development of the memristor in the domains of the synapse simulating, in-memory logic computing, deep neural networks (DNNs) and spiking neural networks (SNNs). Finally, the existent technology challenges and outlook of the state-of-art applications are proposed.

Memory devices and applications for in-memory computing

Traditional von Neumann computing systems involve separate processing and memory units. However, data movement is costly in terms of time and energy and this problem is aggravated by the recent explosive growth in highly data-centric applications related to artificial intelligence. This calls for a radical departure from the traditional systems and one such non-von Neumann computational approach is in-memory computing. Hereby certain computational tasks are performed in place in the memory itself by exploiting the physical attributes of the memory devices. Both charge-based and resistance-based memory devices are being explored for in-memory computing. In this Review, we provide a broad overview of the key computational primitives enabled by these memory devices as well as their applications spanning scientific computing, signal processing, optimization, machine learning, deep learning and stochastic computing.

Junctionless Poly-GeSn Ferroelectric Thin-Film Transistors with Improved Reliability by Interface Engineering for Neuromorphic Computing

Ferroelectric HfZrO_x (Fe-HZO) with a larger remnant polarization (P_r) is achieved by using a poly-GeSn film as a channel material as compared with a poly-Ge film because of the lower thermal expansion that induces higher stress. Then two-stage interface engineering of junctionless poly-GeSn (Sn of ∼5.1%) ferroelectric thin-film transistors (Fe-TFTs) based on HZO was employed to improve the reliability characteristics. With stage I of NH₃ plasma treatment on poly-GeSn and subsequent stage II of Ta₂O₅ interfacial layer growth, the interfacial quality between Fe-HZO and the poly-GeSn channel is greatly improved, which in turn enhances the reliability performance in terms of negligible P_r degradation up to 10⁶ cycles (±2.7 MV/1 ms) and 96% P_r after a 10 year retention at 85 °C. Furthermore, to emulate the synapse plasticity of the human brain for neuromorphic computing, besides manifesting the capability of short-term plasticity, the devices also exhibit long-term plasticity with the characteristics of analog conductance (G) states of 80 levels (>6 bit), small linearity for potentiation and depression of -0.83 and 0.62, high symmetry, and moderate G_max/G_min of 9.6. By employing deep neural network, the neuromorphic system with poly-GeSn Fe-TFT synaptic devices achieves 91.4% pattern recognition accuracy. In addition, the learning algorithm of spike-timing-dependent plasticity based on spiking neural network is demonstrated as well. The results are promising for on-chip training, making it possible to implement neuromorphic computing by monolithic 3D ICs based on poly-GeSn Fe-TFTs.