A Low-Power Current-Reuse Analog Front-End for High-Density Neural Recording Implants

Power-to-Noise Optimization in the Design of Neural Recording Amplifier Based on Current Scaling, Source Degeneration Resistor, and Current Reuse

This article presents the design of a low-power, low-noise neural signal amplifier for neural recording. The structure reduces the current consumption of the amplifier through current scaling technology and lowers the input-referred noise of the amplifier by combining a source degeneration resistor and current reuse technologies. The amplifier was fabricated using a 0.18 μm CMOS MS RF G process. The results show the front-end amplifier exhibits a measured mid-band gain of 40 dB/46 dB and a bandwidth ranging from 0.54 Hz to 6.1 kHz; the amplifier's input-referred noise was measured to be 3.1 μVrms, consuming a current of 3.8 μA at a supply voltage of 1.8 V, with a Noise Efficiency Factor (NEF) of 2.97. The single amplifier's active silicon area is 0.082 mm2.

A High CMRR Differential Difference Amplifier Employing Combined Input Pairs for Neural Signal Recordings

This article introduces a Combined .symmetrical and complementary Input Pairs (CIP) of a Differential Difference Amplifier (DDA), to boost the total Common-Mode Rejection Ratio (CMRR) for multi-channel neural signal recording. The proposed CIP-DDA employs three input pairs (transconductors). The dc-coupled input neural signal connection, via the gate terminal of the first transconductor, yields a high input impedance. The high-pass corner frequency and dc quiescent operation point are stabilized by the second transconductor. The calibration path of differential-mode gain and Common-Mode Feedback (CMFB) is provided by the proposed third transconductor. The parallel connection has no need for extra voltage headroom of input and output. The proposed CIP-DDA is targeted at integrated circuit realization and designed in a 0.18-μm CMOS technology. The proposed CIP-DDAs with system CMFB achieve an average CMRR of 103 dB, and each channel consumes circa 3.6 μW power consumption.

A Low Noise Neural Recording Frontend IC With Power Management for Closed-Loop Brain-Machine Interface Application

Brain-machine Interface (BMI) with implantable bioelectronics systems can provide an alternative way to cure neural diseases, while a power management system plays an important role in providing a stable voltage supply for the implanted chip. a prototype system of power management integrated circuit (PMIC) with heavy load capability supplying artifacts tolerable neural recording integrated circuit (ATNR-IC) is presented in this work. A reverse nested miller compensation (RNMC) low dropout regulator (LDO) with a transient enhancer is proposed for the PMIC. The power consumption is 0.55 mW and 22.5 mW at standby (SB) and full stimulation (ST) load, respectively. For a full load transition, the overshoot and downshoot of the LDO are 110 mV and 71 mV, respectively, which help improve the load transient response during neural stimulation. With the load current peak-to-peak range is about 560 μA supplied by a 4-channel stimulator, the whole PMIC can output a stable 3.3 V supply voltage, which indicates that this PMIC can be extended for more stimulating channels' scenarios. When the ATNR-IC is supplied for presented PMIC through a voltage divider network, it can amplify the signal consisting of 1 mVpp simulated neural signal and 20 mVpp simulated artifact by 28 dB with no saturation.

Magnetoelectrics enables large power delivery to mm-sized wireless bioelectronics

To maximize the capabilities of minimally invasive implantable bioelectronic devices, we must deliver large amounts of power to small implants; however, as devices are made smaller, it becomes more difficult to transfer large amounts of power without a wired connection. Indeed, recent work has explored creative wireless power transfer (WPT) approaches to maximize power density [the amount of power transferred divided by receiver footprint area (length × width)]. Here, we analyzed a model for WPT using magnetoelectric (ME) materials that convert an alternating magnetic field into an alternating voltage. With this model, we identify the parameters that impact WPT efficiency and optimize the power density. We find that improvements in adhesion between the laminated ME layers, clamping, and selection of material thicknesses lead to a power density of 3.1 mW/mm2, which is over four times larger than previously reported for mm-sized wireless bioelectronic implants at a depth of 1 cm or more in tissue. This improved power density allows us to deliver 31 and 56 mW to 10 and 27-mm2 ME receivers, respectively. This total power delivery is over five times larger than similarly sized bioelectronic devices powered by radiofrequency electromagnetic waves, inductive coupling, ultrasound, light, capacitive coupling, or previously reported magnetoelectrics. This increased power density opens the door to more power-intensive bioelectronic applications that have previously been inaccessible using mm-sized battery-free devices.

Magnetoelectrics Enables Large Power Delivery to mm-Sized Wireless Bioelectronics

To maximize the capabilities of minimally invasive implantable bioelectronic devices, we must deliver large amounts of power to small implants; however, as devices are made smaller, it becomes more difficult to transfer large amounts of power without a wired connection. Indeed, recent work has explored creative wireless power transfer (WPT) approaches to maximize power density (the amount of power transferred divided by receiver footprint area (length × width)). Here, we analyzed a model for WPT using magnetoelectric (ME) materials that convert an alternating magnetic field into an alternating voltage. With this model, we identify the parameters that impact WPT efficiency and optimize the power density. We find that improvements in adhesion between the laminated ME layers, clamping, and selection of material thicknesses lead to a power density of 3.1 mW/mm 2 , which is over 4 times larger than previously reported for mm-sized wireless bioelectronic implants at a depth of 1 cm or more in tissue. This improved power density allows us to deliver 31 mW and 56 mW to 10-mm 2 and 27-mm 2 ME receivers, respectively. This total power delivery is over 5 times larger than similarly sized bioelectronic devices powered by radiofrequency electromagnetic waves, inductive coupling, ultrasound, light, capacitive coupling, or previously reported magnetoelectrics. This increased power density opens the door to more power-intensive bioelectronic applications that have previously been inaccessible using mm-sized battery-free devices.

Wireless and battery-free technologies for neuroengineering

Tethered and battery-powered devices that interface with neural tissues can restrict natural motions and prevent social interactions in animal models, thereby limiting the utility of these devices in behavioural neuroscience research. In this Review Article, we discuss recent progress in the development of miniaturized and ultralightweight devices as neuroengineering platforms that are wireless, battery-free and fully implantable, with capabilities that match or exceed those of wired or battery-powered alternatives. Such classes of advanced neural interfaces with optical, electrical or fluidic functionality can also combine recording and stimulation modalities for closed-loop applications in basic studies or in the practical treatment of abnormal physiological processes.

Emerging Optoelectronic Devices Based on Microscale LEDs and Their Use as Implantable Biomedical Applications

Thin-film microscale light-emitting diodes (LEDs) are efficient light sources and their integrated applications offer robust capabilities and potential strategies in biomedical science. By leveraging innovations in the design of optoelectronic semiconductor structures, advanced fabrication techniques, biocompatible encapsulation, remote control circuits, wireless power supply strategies, etc., these emerging applications provide implantable probes that differ from conventional tethering techniques such as optical fibers. This review introduces the recent advancements of thin-film microscale LEDs for biomedical applications, covering the device lift-off and transfer printing fabrication processes and the representative biomedical applications for light stimulation, therapy, and photometric biosensing. Wireless power delivery systems have been outlined and discussed to facilitate the operation of implantable probes. With such wireless, battery-free, and minimally invasive implantable light-source probes, these biomedical applications offer excellent opportunities and instruments for both biomedical sciences research and clinical diagnosis and therapy.

Design of a low-noise low-voltage amplifier for improved neural signal recording

Design of amplifier circuits with low-noise operable at low-power to be used, especially for implantable neural interfaces, remains a huge challenge. This research paper presents the design of a low-noise low-voltage neural recording amplifier suitable for amplifying local field potentials and extracellular action potentials so as to meet the end requirement of an implantable neuro-medical system. Critical performance parameters of the smaller circuit blocks of the complete neural amplifier architecture have been found with the help of detailed mathematical analysis and then verified by the simulations conducted using 0.18 µm 4M1P foundry Semi-conductor Laboratory N-well process. The neural amplifier design proposed in this paper passes neural signal of interest with a mid-band gain of 49.9 dB over a bandwidth of 5.3 Hz-8.6 kHz, draws only 11.5 µW of power from ±0.9 V supply voltage, and exhibits an input-referred noise of 2.6 µV_rms with a noise efficiency factor of 2.27. The area consumed by the proposed neural amplifier architecture is 0.192 mm². The complete circuit design carried out in this paper should prove to be useful in equipment for the diagnosis of neurological disorders.

A Multimodal Neural-Recording IC With Reconfigurable Analog Front-Ends for Improved Availability and Usability for Recording Channels

In this work, we present an 8-channel reconfigurable multimodal neural-recording IC, which provides improved availability and usability of recording channels in various experiment scenarios. Each recording channel changes its configuration depending on whether the channel is assigned to record voltage or current signal. As a result, although the total number of channels is fixed by design, the channels utilized for voltage and current recording can be set freely and optimally for given experiment targets, scenarios, and circumstances, maximizing the availability and usability of recording channels.The proposed concept was demonstrated by fabricating the IC using a standard 180-nm CMOS process.Using the IC, we successfully performed an in vivo experiment from the hippocampal area of a mouse brain. The measured input noise of the reconfigurable front-end is 4.75 μV_rms at voltage-recording mode and 7.4 pA_rms at current-recording mode while consuming 5.72 μW/channel.

Highly Configurable 100 Channel Recording and Stimulating Integrated Circuit for Biomedical Experiments

This paper presents the design results of a 100-channel integrated circuit dedicated to various biomedical experiments requiring both electrical stimulation and recording ability. The main design motivation was to develop an architecture that would comprise not only the recording and stimulation, but would also block allowing to meet different experimental requirements. Therefore, both the controllability and programmability were prime concerns, as well as the main chip parameters uniformity. The recording stage allows one to set their parameters independently from channel to channel, i.e., the frequency bandwidth can be controlled in the (0.3 Hz-1 kHz)-(20 Hz-3 kHz) (slow signal path) or (0.3 Hz-1 kHz)-4.7 kHz (fast signal path) range, while the voltage gain can be set individually either to 43.5 dB or 52 dB. Importantly, thanks to in-pixel circuitry, main system parameters may be controlled individually allowing to mitigate the circuitry components spread, i.e., lower corner frequency can be tuned in the 54 dB range with approximately 5% precision, and the upper corner frequency spread is only 4.2%, while the voltage gain spread is only 0.62%. The current stimulator may also be controlled in the broad range (69 dB) with its current setting precision being no worse than 2.6%. The recording channels' input-referred noise is equal to 8.5 µVRMS in the 10 Hz-4.7 kHz bandwidth. The single-pixel occupies 0.16 mm2 and consumes 12 µW (recording part) and 22 µW (stimulation blocks).

Impact and trends in embedding field programmable gate arrays and microcontrollers in scientific instrumentation

Microcontrollers and field-programmable gate arrays have been largely leveraged in scientific instrumentation since decades. Recent advancements in the performance of these programmable digital devices, with hundreds of I/O pins, up to millions of logic cells, >10 Gb/s connectivity, and hundreds of MHz multiple clocks, have been accelerating this trend, extending the range of functions. The diversification of devices from very low-cost 8-bit microcontrollers up to 32-bit ARM-based ones and a system of chip combining programmable logic with processors make them ubiquitous in modern electronic systems, addressing diverse challenges from ultra-low power operation, with sub-µA quiescent current in sleep mode for portable and Internet of Things applications, to high-performance computing, such as in machine vision. In this Review, the main motivations (compactness, re-configurability, parallelization, low latency for sub-ns timing, and real-time control), the possible approaches of the adoption of embedded devices, and the achievable performances are discussed. Relevant examples of applications in opto-electronics, physics experiments, impedance, vibration, and temperature sensing from the recent literature are also reviewed. From this bird-eye view, key paradigms emerge, such as the blurring of boundaries between digital platforms and the pervasiveness of machine learning algorithms, significantly fostered by the possibility to be run in embedded devices for distributing intelligence in the environment.

Challenges for Microelectronics in Non-Invasive Medical Diagnostics

Microelectronics is emerging, sometimes with changing fortunes, as a key enabling technology in diagnostics. This paper reviews some recent results and technical challenges which still need to be addressed in terms of the design of CMOS analog application specific integrated circuits (ASICs) and their integration in the surrounding systems, in order to consolidate this technological paradigm. Open issues are discussed from two, apparently distant but complementary, points of view: micro-analytical devices, combining microfluidics with affinity bio-sensing, and gamma cameras for simultaneous multi-modal imaging, namely scintigraphy and magnetic resonance imaging (MRI). The role of integrated circuits is central in both application domains. In portable analytical platforms, ASICs offer miniaturization and tackle the noise/power dissipation trade-off. The integration of CMOS chips with microfluidics poses multiple open technological issues. In multi-modal imaging, now that the compatibility of the acquisition chains (thousands of Silicon Photo-Multipliers channels) of gamma detectors with Tesla-level magnetic fields has been demonstrated, other development directions, enabled by microelectronics, can be envisioned in particular for single-photon emission tomography (SPECT): a faster and simplified operation, for instance, to allow transportable applications (bed-side) and hardware pre-processing that reduces the number of output signals and the image reconstruction time.

An Energy-Efficient CMOS Dual-Mode Array Architecture for High-Density ECoG-Based Brain-Machine Interfaces

This article presents an energy-efficient electrocorticography (ECoG) array architecture for fully-implantable brain machine interface systems. A novel dual-mode analog signal processing method is introduced that extracts neural features from high- γ band (80-160 Hz) at the early stages of signal acquisition. Initially, brain activity across the full-spectrum is momentarily observed to compute the feature weights in the digital back-end during full-band mode operation. Subsequently, these weights are fed back to the front-end and the system reverts to base-band mode to perform feature extraction. This approach utilizes a distinct optimized signal pathway based on power envelope extraction, resulting in 1.72× power reduction in the analog blocks and up to 50× potential power savings for digitization and processing (implemented off-chip in this article). A prototype incorporating a 32-channel ultra-low power signal acquisition front-end is fabricated in 180 nm CMOS process with 0.8 V supply. This chip consumes 1.05  μW (0.205  μW for feature extraction only) power and occupies 0.245 [Formula: see text] die area per channel. The chip measurement shows better than 76.5-dB common-mode rejection ratio (CMRR), 4.09 noise efficiency factor (NEF), and 10.04 power efficiency factor (PEF). In-vivo human tests have been carried out with electroencephalography and ECoG signals to validate the performance and dual-mode operation in comparison to commercial acquisition systems.