Theoretical Analysis of AM and FM Interference Robustness of Integrating DDR Receiver for Human Body Communication

A Review of Recent Innovations in Remote Health Monitoring

The development of remote health monitoring systems has focused on enhancing healthcare services' efficiency and quality, particularly in chronic disease management and elderly care. These systems employ a range of sensors and wearable devices to track patients' health status and offer real-time feedback to healthcare providers. This facilitates prompt interventions and reduces hospitalization rates. The aim of this study is to explore the latest developments in the realm of remote health monitoring systems. In this paper, we explore a wide range of domains, spanning antenna designs, small implantable antennas, on-body wearable solutions, and adaptable detection and imaging systems. Our research also delves into the methodological approaches used in monitoring systems, including the analysis of channel characteristics, advancements in wireless capsule endoscopy, and insightful investigations into sensing and imaging techniques. These advancements hold the potential to improve the accuracy and efficiency of monitoring, ultimately contributing to enhanced health outcomes for patients.

An Improved Update Rate CDR for Interference Robust Broadband Human Body Communication Receiver

Broadband Human Body Communication (HBC) enables energy efficient communication between body area network devices by utilizing the electrical conductivity property of the human body. However, environmental interference remains a primary bottleneck in its implementation. An integrating front-end receiver with resettable integration followed by periodic sampling can be utilized to enable interference robust broadband HBC. However, as required in all broadband communication systems, a Clock Data Recovery (CDR) loop is necessary to correctly sample the received data at the appropriate instant. The CDR is required to be sensitive to the clock-data phase mismatch at the receiver end and take corrective action for reducing it, similar to the CDR of a traditional receiver. In addition to that, the CDR for a broadband HBC receiver also requires to be tolerant to environmental interference. This paper analyzes the traditional Baud Rate CDR for an integrating front-end receiver and proposes a modified integrating CDR architecture with a higher update rate. Simulation results show 2.5X higher clock data frequency offset tolerance of the proposed CDR compared to the traditional Baud Rate CDR, >1.25X higher clock data frequency offset tolerance in presence of interference and >10% interference frequency offset tolerance with respect to the integration clock. The proposed CDR is also implemented in a Xilinx Spartan-3E FPGA board to validate its closed loop functionality in real time.