Integrated CMOS Amplifier for ENG Signal Recording

Implantable neurotechnologies: a review of integrated circuit neural amplifiers

Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification.

A low-noise instrumentation amplifier with DC suppression for recording ENG signals

This paper presents an AC-coupled instrumentation amplifier for electroneurogram (ENG) activity recording. For this design, we evaluate gain and noise requirements based on interference sources (electrodes, power line, EMG). The circuit has been implemented in a commercially-available 0.35μm CMOS technology with total power consumption 460μW. The amplifier achieves CMRR 107 dB and integrated input referred noise 940 nV. The gain is 63 dB and the bandwidth is 0.5 Hz- 13 kHz. The chosen topology enables to minimise on-chip capacitance (only 27 pF), with a total chip area of 0.4mm2.

Advances in Microelectronics for Implantable Medical Devices

Implantable medical devices provide therapy to treat numerous health conditions as well as monitoring and diagnosis. Over the years, the development of these devices has seen remarkable progress thanks to tremendous advances in microelectronics, electrode technology, packaging and signal processing techniques. Many of today’s implantable devices use wireless technology to supply power and provide communication. There are many challenges when creating an implantable device. Issues such as reliable and fast bidirectional data communication, efficient power delivery to the implantable circuits, low noise and low power for the recording part of the system, and delivery of safe stimulation to avoid tissue and electrode damage are some of the challenges faced by the microelectronics circuit designer. This paper provides a review of advances in microelectronics over the last decade or so for implantable medical devices and systems. The focus is on neural recording and stimulation circuits suitable for fabrication in modern silicon process technologies and biotelemetry methods for power and data transfer, with particular emphasis on methods employing radio frequency inductive coupling. The paper concludes by highlighting some of the issues that will drive future research in the field.

A power-efficient bio-potential acquisition device with DS-MDE sensors for long-term healthcare monitoring applications

This work describes a power-efficient bio-potential acquisition device for long-term healthcare applications that is implemented using novel microelectromechanical dry electrodes (MDE) and a low power bio-potential processing chip. Using micromachining technology, an attempt is also made to enhance the sensing reliability and stability by fabricating a diamond-shaped MDE (DS-MDE) that has a satisfactory self-stability capability and superior electric conductivity when attached onto skin without any extra skin tissue injury technology. To acquire differential bio-potentials such as ECG signals, the proposed processing chip fabricated in a standard CMOS process has a high common mode rejection ratio (C.M.R.R.) differential amplifier and a 12-bit analog-to-digital converter (ADC). Use of the proposed system and integrate simple peripheral commercial devices can obtain the ECG signal efficiently without additional skin tissue injury and ensure continuous monitoring more than 70 hours with a 400 mAh battery.

Analog integrated circuits design for processing physiological signals

Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

A low-noise low-power amplifier for implantable device for neural signal acquisition

This paper presents a low-noise low-power amplifier for implantable device for neural signal acquisition. By operating MOS transistors in the subthreshold region, smaller low-frequency noise and lower power consumption can be achieved. A low power, low-noise common-drain buffer and a low-noise, high-linearity, low pass filter are used for high frequency noise filtering. Post-layout simulation shows the input referred noise of the system is 2.19microVrms from 10Hz to 10 KHz, power consumption is 55.8microW, and the NEF is 2.53. The amplifier was fabricated using a TSMC 0.18microm 1P6M CMOS process. Simulation results show that this low-noise, low-power amplifier is suitable for implantable device applications.