Using the Post-traumatic Stress Disorder (PTSD) Checklist for DSM-5 to Screen for PTSD in the Chinese Context: A Pilot Study in a Psychiatric Sample

Purpose: Post-traumatic stress disorder (PTSD) is a common mental health problem but it is often unrecognized in health care and social service settings. Reliable and valid measures are important for practitioners to screen for PTSD in the Chinese context. This study developed and pilot tested a Chinese version of the PTSD Checklist for DSM-5 (PCL-5). Methods: The reliability and validity of the Chinese version of the PCL-5 were evaluated in a sample of N = 56 adult psychiatric patients in Taiwan. Online methods were used to facilitate the research process. Results: The Chinese version of the PCL-5 is internally consistent and is associated with trauma exposure and other mental health constructs. Participants with clinically diagnosed DSM-5 PTSD scored significantly higher on the PCL-5 than those without PTSD. The PCL-5 also had an acceptable discrimination performance in this sample. Discussion: Although the initial findings suggest that the PCL-5 is reliable and valid in this pilot study, caution should be taken when interpreting the results. The Chinese version of the PCL-5 may be a promising screening tool, but further psychometric evaluation is necessary.

Low Temperature Deposition of High-k/Metal Gate Stacks on High-Sn Content (Si)GeSn-Alloys

(Si)GeSn is an emerging group IV alloy system offering new exciting properties, with great potential for low power electronics due to the fundamental direct band gap and prospects as high mobility material. In this Article, we present a systematic study of HfO2/TaN high-k/metal gate stacks on (Si)GeSn ternary alloys and low temperature processes for large scale integration of Sn based alloys. Our investigations indicate that SiGeSn ternaries show enhanced thermal stability compared to GeSn binaries, allowing the use of the existing Si technology. Despite the multielemental interface and large Sn content of up to 14 atom %, the HfO2/(Si)GeSn capacitors show small frequency dispersion and stretch-out. The formed TaN/HfO2/(Si)GeSn capacitors present a low leakage current of 2 × 10(-8) A/cm(2) at -1 V and a high breakdown field of ∼8 MV/cm. For large Sn content SiGeSn/GeSn direct band gap heterostructures, process temperatures below 350 °C are required for integration. We developed an atomic vapor deposition process for TaN metal gate on HfO2 high-k dielectric and validated it by resistivity as well as temperature and frequency dependent capacitance-voltage measurements of capacitors on SiGeSn and GeSn. The densities of interface traps are deduced to be in the low 10(12) cm(-2) eV(-1) range and do not depend on the Sn-concentration. The new processes developed here are compatible with (Si)GeSn integration in large scale applications.

Emerging Applications for High K Materials in VLSI Technology

The current status of High K dielectrics in Very Large Scale Integrated circuit (VLSI) manufacturing for leading edge Dynamic Random Access Memory (DRAM) and Complementary Metal Oxide Semiconductor (CMOS) applications is summarized along with the deposition methods and general equipment types employed. Emerging applications for High K dielectrics in future CMOS are described as well for implementations in 10 nm and beyond nodes. Additional emerging applications for High K dielectrics include Resistive RAM memories, Metal-Insulator-Metal (MIM) diodes, Ferroelectric logic and memory devices, and as mask layers for patterning. Atomic Layer Deposition (ALD) is a common and proven deposition method for all of the applications discussed for use in future VLSI manufacturing.

Germanium Based Field-Effect Transistors: Challenges and Opportunities

The performance of strained silicon (Si) as the channel material for today’s metal-oxide-semiconductor field-effect transistors may be reaching a plateau. New channel materials with high carrier mobility are being investigated as alternatives and have the potential to unlock an era of ultra-low-power and high-speed microelectronic devices. Chief among these new materials is germanium (Ge). This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack. Next, Ge is compared to compound III-V materials in terms of p-channel device performance to review how it became the first choice for PMOS devices. Different Ge device architectures, including surface channel and quantum well configurations, are reviewed. Finally, state-of-the-art Ge device results and future prospects are also discussed.