Five-stage free-space optical switching network with field-effect transistor self-electro-optic-effect-device smart-pixel arrays

Design of a low-cost and compact 1 × 5 wavelength-selective switch for access networks

This paper describes the design, modeling, construction, and testing of a low-cost and compact (80  mm×50  mm) 1×5 wavelength-selective switch. The core beam-deflecting element of the switch is a nematic liquid crystal on silicon spatial light modulator. The switch is designed for coarse wavelength-division multiplexing wavelengths in order to bring the benefit of a low-cost, compact, and robust switching design toward the customer end in the access network. During the system development stage, a single optomechanical assembly was designed and prototyped using the three-dimensional printing technology. The experimental results show an insertion loss of -13.8±1.4  dB and a worst-case scenario crosstalk level of -24.8  dB. Approaches for enhancing the performance of the switch are analyzed and discussed.

Review of multiscale optical design

Multiscale optical design is an approach that has been successfully utilized for over 100 years by optical designers and engineers to overcome challenges and achieve desired optical system performance. The benefits of the design paradigm include improving light collection, creating specific symmetries that can be exploited, collecting additional information about the object space, partitioning the optical field to enable piecewise correction of aberrations, and alleviating packing constraints. The purpose of this paper is to review the historical emergence of the use of multiscale optical design and present key examples of developments that have expanded its capabilities over the years.

Simple integration technique to realize parallel optical interconnects: implementation of a pluggable two-dimensional optical data link

An assembly technique is presented to realize pluggable or fully integrated optoelectronic systems based on image relays. A method to visually align and assemble optoelectronic chips or fiber bundles to half of a relay is explained. To validate this technique, two-dimensional arrays of vertical-cavity surface-emitting lasers and photodetectors and a fiber image guide have been integrated to gradient index lenses with simple optomechanical parts. Although the connection of these modules was realized with +/-0.5 mm lateral tolerances, parallel optical interconnects were successfully achieved at 10 MHz. The lateral misalignment between chips was on average 20 microm and at worst 60 microm.

Dedicated optoelectronic stochastic parallel processor for real-time image processing: motion-detection demonstration and design of a hybrid complementary-metal-oxide semiconductor- self-electro-optic-device-based prototype

We report experimental results and performance analysis of a dedicated optoelectronic processor that implements stochastic optimization-based image-processing tasks in real time. We first show experimental results using a proof-of-principle-prototype demonstrator based on standard silicon-complementary-metal-oxide-semiconductor (CMOS) technology and liquid-crystal spatial light modulators. We then elaborate on the advantages of using a hybrid CMOS-self-electro-optic-device-based smart-pixel array to monolithically integrate photodetectors and modulators on the same chip, providing compact, high-bandwidth intrachip optoelectronic interconnects. We have modeled the operation of the monolithic processor, clearly showing system-performance improvement.

Tolerance stackup effects in free-space optical interconnects

A numerical analysis indicates that tolerance stackup effects in free-space optical interconnects are significant even for short systems containing few components. Results prove that worst-case or root-sum-square analyses are not adequate to predict probable performance accurately. A Monte Carlo analysis must be performed.

Scalability analysis of diffractive optical element-based free-space photonic circuits for interoptoelectronic chip interconnections

An interchip free-space optical interconnection module is investigated to solve the pin-input-output bottleneck at the interface of silicon integrated circuits. The scalability of the photonic circuit is theoretically analyzed by use of the minimum feature size requirement of each diffractive element used. The study showed that interconnection densities of 1000-2000 channels/cm is possible for a 40-mm interconnection length with a 3-mm-thick optical substrate. Diffraction-limited imaging capability has been demonstrated using a fabricated prototype, confirming its applicability for interchip free-space interconnections. Photonic circuit insertion losses of -23.4 dB for TE polarization and -25.9 dB for TM polarization as well as a polarization-dependent loss of 2.5 dB are found to be caused primarily by a pair of binary linear gratings used for beam deflections. Design modifications aiming at insertion loss reduction and further improvement of tolerance capabilities are also discussed.

Free-space parallel multichip interconnection system

A parallel data-communication scheme is described for interchip communication with free-space optics. We present a proof-of-concept and feasibility demonstration of a practical modular packaging approach in which free-space optical interconnect modules can be simply integrated on top of an electronic multichip module (MCM). Our packaging architecture is based on a modified folded 4-f imaging system that is implemented with off-the-shelf optics, conventional electronic packaging techniques, and passive assembly techniques to yield a potentially low-cost packaging solution. The prototype system, as built, supports 48 independent free-space channels with eight separate laser and detector chips, in which each chip consists of a one-dimensional array of 12 devices. All chips are assembled on a single ceramic carrier together with three silicon complementary metal-oxide semiconductor chips. Parallel optoelectronic (OE) free-space interconnections are demonstrated at a speed of 200 MHz. The system is compact at only 10 in.(3) (~164 cm(3)) and is scalable because it can easily accommodate additional chips as well as two-dimensional OE device arrays for increased interconnection density.

Volume-consumption comparisons of free-space and guided-wave optical interconnections

We compare volume-consumption characteristics of free-space and guided-wave optical interconnections. System volume consumption is used as a fundamental measure of various point-to-point space-invariant and space-variant interconnections of two-dimensional arrays of N(1/2) x N(1/2) points. We show that, in free-space and space-invariant situations, although volume consumption for macroaperture optics is O1(N(3/2)), where O denotes the order, it is only O2(N) for microaperture optics. For free-space and space-variant operations only microaperture optics is possible without fundamental power losses. The corresponding minimum volume consumption is O3(N3). We show that single microaperture-per-channel implementations of either space-invariant or space-variant operations are, in general, more volume efficient than are their two-cascade microaperture-per-channel counterparts. We also show that, for minimizing volume consumption, the optimum relative apertures F#(opt) for space-variant optical elements are, respectively, (5N)(1/2)/4 for a single microaperture-per-channel geometry and (5N)(1/2)/2 for a two-cascade microaperture-per-channel geometry. In guided-wave or fiber interconnect cases our study shows that the volume consumption for space-invariant and space-variant operations is O4(N), with O4 < O2, and O5(N(3/2)), respectively. Thus an important conclusion of the study is that free-space optics is less volume efficient than is guided-wave optics in both space-invariant and space-variant interconnect applications.

Design, implementation, and characterization of a hybrid optical interconnect for a four-stage free-space optical backplane demonstrator

A four-stage unidirectional ring free-space optical interconnect system was designed, analyzed, implemented, and characterized. The optical system was used within a complementary metal-oxide semiconductor-self-electro-optic-effect-device-based optical backplane demonstrator that was designed to fit into a standard VME chassis. This optical interconnect was a hybrid microlens-macrolens system, in which the microlens relays were arranged in a maximum lens-to-waist configuration to route the optical beams from the optical power supply to the transceiver arrays, while the macrolens optical relays were arranged in a telecentric configuration to route optical signal beams from stage to stage. The following aspects of the optical system design are discussed: the optical parameters for the hybrid optical system, the image mapping of the two-dimensional array of optical beams from stage to stage, the alignment tolerance of the hybrid relay system, and the power budget of the overall optical interconnect. The implementation of the optical system, including the characterization of optical components, subsystem prealignment, and final system assembly, is presented. The two-dimensional array of beams for the stage-to-stage interconnect was adjusted with a rotational error of <0.05 degrees and a lateral offset error of <3.5 mum. The measured throughput is in good agreement with the lower-bound predictions obtained in the theoretical results, with an optical power throughput of -20.2 dB from the fiber input of the optical power supply to the modulator array and -25.5 dB from the fiber input to the detector plane.

Extensible, Low-Chromatic-Sensitivity, All-diffractive-Optics Relay for Interconnecting Optoelectronic Device Arrays

For free-space optical interconnections between optoelectronic chips to reach commercial realization, the technology must provide high-density optical channels in a simple, inexpensive, and easily aligned package. Although point-to-point connections with microlens pairs can provide densities of several thousand channels per square centimeter, the Gaussian nature of the beams limits the connection range to a few millimeters. We propose an arrangement of microlens pairs with an intermediate relay lens that significantly increases the connection distance. This basic setup can be tiled laterally across large chips to form extensible arrays. The optical design is constructed entirely with diffractive elements because of the low chromatic sensitivity over a range of approximately ?10% around the design wavelength. We derive the lateral positioning error at the image by using a simple ray trace, and we show the effect of Gaussian beams. We experimentally demonstrate the low chromatic sensitivity for a system with an interconnection distance of 64 mm. Finally, we demonstrate the interconnection of two linear arrays of multimode fibers with two adjacent channels operating at data rates of hundreds of megabits per second.

WARRP Core: Optoelectronic Implementation of Network-Router Deadlock-Handling Mechanisms

The wormhole adaptive recovery-based routing via pre-emption(WARRP) core optoelectronic chip, which integrates coredeadlock-handling circuitry for a fully adaptive deadlock-freemultiprocessor network router, is presented. This chip demonstratesprimarily the integration of complex deadlock-recovery circuitry andfree-space optoelectronic input-output on a monolithicGaAs-based chip. The design and implementation of thefirst-generation, bit-serial, torus-connected chip that uses 1400transistors and six light-emitting diode-photodetector pairs is presented.

Design, implementation, and characterization of an optical power supply spot-array generator for a four-stage free-space optical backplane

The design and implementation of a robust, scalable, and modular optical power supply spot-array generator for a modulator-based free-space optical backplane demonstrator is presented. Four arrays of 8 x 4 spots with 6.47-mum radii (at 1/e(2) points) pitched at 125 mum in the vertical direction and 250 mum in the horizontal were required to provide the light for the optical interconnect. Tight system tolerances demanded careful optical design, robust optomechanics, and effective alignment techniques. Issues such as spot-array generation, polarization, power efficiency, and power uniformity are discussed. Characterization results are presented.

Optical smart-pixel-based Clos crossbar switch

We present the design of an optically interconnected Clos crossbar switch that uses three smart-pixel devices. This optical Clos architecture is also well matched to a space-wavelength switch that arbitrarily permutes data streams between wavelength-division multiplexed channels on an array of fibers. We have designed a hybrid complementary metal-oxide semiconductor-self-electro-optic device (CMOS-SEED) crossbar smart-pixel array for use in a 16-channel optical Clos switch. The crossbar devices also have an 8 x 8 array of multiple-quantum-well diodes that can be configured electrically as modulators with eight bit planes of randomly addressable local memory or as receivers with adjustable gain and threshold. We show that the current hybrid-SEED technology should support a 1024-channel Clos switch operating at 500 Mbits/s per channel if pixel power consumption can be reduced.

Optomechanics for a four-stage hybrid-self-electro-optic-device-based free-space optical backplane

We present the design, fabrication, and testing of optomechanics for a free-space optical backplane mounted in a standard 6U VME backplane chassis. The optomechanics implement an optical interconnect consisting of lenslet-to-lenslet, as well as conventional lens-to-lens, links. Mechanical, optical, electrical, thermal, material, and fabrication constraints are studied. Design trade-offs that affect system scalability and ease of assembly are put forward and analyzed. Novel mounting techniques such as a thermal-loaded interference-fitted lens-mounting technique are presented and discussed. Diagnostic tools are developed to quantify the performance of the optomechanics, and experimental results are given and analyzed.

Toward an optimal foundation architecture for optoelectronic computing. Part I. Regularly interconnected device planes

By systematically examining the tree of possibilities for optoelectronic computing architectures and offering arguments that allow one to prune suboptimal branches of this tree, I come to the conclusion that electronic circuit planes interconnected optically according to regular connection patterns represent an alternative that is reasonably close to the best possible, as defined by physical limitations. Thus I propose that this foundation architecture should provide a basis for future research and development in this area.

Demonstration of optically controlled data routing with the use of multiple-quantum-well bistable and electro-optical devices

We present experimental results on a 1-to-64-channel free-space photonic switching demonstration system based on GaAs/GaAlAs multiple-quantum-well active device arrays. Two control schemes are demonstrated: data transparent optical self-routing usable in a packet-switching environment and direct optical control with potential signal amplification for circuit switching. The self-routing operation relies on the optical recognition of the binary destination address coded in each packet header. Address decoding is implemented with elementary optical bistable devices and modulator pixels as all-optical latches and electro-optical and gates, respectively. All 60 defect-free channels of the system could be operated one by one, but the simultaneous operation of only three channels could be achieved mainly because of the spatial nonhomogeneities of the devices. Direct-control operation is based on directly setting the bistable device reflectivity with a variable-control beam power. This working mode turned out to be much more tolerant of spatial noises: 37 channels of the system could be operated simultaneously. Further development of the system to a crossbar of N inputs and M outputs and system miniaturization are also considered.

Dual-function detector-modulator smart-pixel module

We describe a smart-pixel circuit that permits the use of a GaAs/AlGaAs multiple quantum well diode to be used both as a detector for data input and a modulator for data output. The module provides the ability to double the number of inputs or outputs to the array and is well suited to cascaded optoelectronic system architectures that require bidirectional communition.

Smart-pixel-based network interface chip

We present the design and experimental setup of an optically interconnected smart-pixel network interface chip designed to implement a collisionless multichannel-access control protocol. The design demonstrates the cointegration of optoelectronic pixel modules of various levels of complexity for dense, high-speed interconnection of highly functional digital logic components typical of multiprocessor network routers.

Database filter: optoelectronic design and implementation

The results of a successful demonstration of the selection module of an optoelectronic parallel-processing database filter is presented. The module utilizes 4 x 4 arrays of AND and XOR logic gates that respectively perform the functions of reducing the data fields and determining a match between the input data and a selection argument. The logic arrays were fabricated with InGaP/GaAs heterojunction phototransistors that drive vertical-cavity surface-emitting lasers (VCSEL's). The VCSEL's provide the free-space optical interconnection between stages. The design of the system and the optical power budget are discussed.

Optical design of a free-space photonic switching system

The optical design of a photonic switching system is described in detail. The system is a 4-f imaging system with one lens design based on a Petzval lens and the second lens design based on a double Gauss lens. The assembled system is 60 mm x 70 mm x 370 mm and features a single imaging stage, pupil division for beam combination, and a single fiber bundle for both input and output. A brief description of the system requirements is provided, and the implication of some of these requirements for the paraxial design is explained. The choice of design forms for the lenses is explained, the design process is outlined, and the final lens designs are provided. Lens tolerancing is outlined and the final lens tolerances are provided. Finally, the assembly and the alignment processes are described.

Asynchronous transfer mode distribution network by use of an optoelectronic VLSI switching chip

We describe a new optoelectronic switching system demonstration that implements part of the distribution fabric for a large asynchronous transfer mode (ATM) switch. The system uses a single optoelectronic VLSI modulator-based switching chip with more than 4000 optical input-outputs. The optical system images the input fibers from a two-dimensional fiber bundle onto this chip. A new optomechanical design allows the system to be mounted in a standard electronic equipment frame. A large section of the switch was operated as a 208-Mbits/s time-multiplexed space switch, which can serve as part of an ATM switch by use of an appropriate out-of-band controller. A larger section with 896 input light beams and 256 output beams was operated at 160 Mbits/s as a slowly reconfigurable space switch.

Performance analysis of self-electro-optic-effect-device-based (SEED-based) smart-pixel arrays used in data sorting

The performance factors associated with self-electro-optic-effect-device-(SEED-) based smart-pixel arrays are analyzed in terms of semiconductor technology and pixel complexity. The sorting task is chosen as a practical example. Complementary metal-oxide semiconductor (CMOS)-SEED 2 × 2 self-routing nodes operated with quasi-cw-mode lasers are shown to provide the maximum processing power and on- or off-chip communication rate. The need for new front-end amplifiers for the smart-pixel technology is emphasized.

Digital Fourier optics

Analog Fourier optical processing systems can perform important classes of signal processing operations in parallel, but suffer from limited accuracy. Digital-optical equivalents of such systems could be built that share many features of the analog systems while allowing greater accuracy. We show that the digital equivalent of any system consisting of an arbitrary number of lenses, niters, spatial light modulators, and sections of free space can be constructed. There are many possible applications for such systems as well as many alternative technologies for constructing them; this paper stresses the potential of free-space interconnected active-device-plane-based optoelectronic architectures as a digital signal processing environment. Implementation of the active-device planes through hybridization of optoelectronic components with silicon electronics should allow the realization of systems whose performance exceeds that of purely electronic systems.

Electrophotonic computer networks with strictly nonblocking and self-routing functions

Three-stage optical interconnection networks for use in massively parallel processors are proposed. Wavelength-division- and space-division-multiplexing switches used in these networks are described, and free-space optics to assist in the construction of networks that are small and provide high throughput are discussed.

Performance trade-offs for conventional lenses for free-space digital optics

We describe the limitations on the use of conventional lenses in optical computing that arise from manufacturing tolerances. The consequences on maximum array size, minimum device size, and propagation delay of systems are discussed. Two experimental optical computing systems are then compared with these results. We show that there are maximum and minimum bounds on the focal length and the ƒ-number of lenses imposed when manufacturing tolerances are considered. We also show that there are maximum bounds on image sizes and space-bandwidth products and trade-offs between spot size and system latency.

Experimental free-space optical network for massively parallel computers

A free-space optical interconnection scheme is described for massively parallel processors based on the interconnection-cached network architecture. The optical network operates in a circuit-switching mode. Combined with a packet-switching operation among the circuit-switched optical channels, a high-bandwidth, low-latency network for massively parallel processing results. The design and assembly of a 64-channel experimental prototype is discussed, and operational results are presented.

Design and demonstration of a high-speed, multichannel, optical-sampling oscilloscope

Free-space digital optical systems have demonstrated the capability to provide thousands of optical connections between optoelectronic chips. This dense concentration of channels creates substantial challenges in monitoring individual connections for diagnostic purposes without compromising performance. Prom the concept of stroboscopic techniques, we have designed and constructed a multichannel optical diagnostic tool that operates analogously to an electronic-sampling oscilloscope. The tool is economically constructed by the use of commercially available video cameras and video-enhanced personal computers. An integrated software application operates the tool and displays multiple-channel waveforms. We demonstrate the oscilloscope-sampling optical waveforms of a two-dimensional optoelectronic modulator array operating at data rates from 0.5 to 4 Gbits/s.

Performance comparison between multiple-quantum-well modulator-based and vertical-cavity-surface-emitting laser-based smart pixels

We compared multiple-quantum-well modulator-based smart pixels and vertical-cavity-surface-emitting laser (VCSEL) based smart pixels in terms of optical switching power, switching speed, and electric-power consumption. Optoelectronic circuits integrating GaAs field-effect transistors are designed for smart pixels of both types under the condition that each pixel has an optical threshold and gain. It is shown that both types perform maximum throughput of ~3 Tbps/cm(2). In regard to design flexibility, the modulator type is advantageous because switching time can be reduced by supplying large electric power, whereas switching time and electric-power consumption are limited to larger than certain values in the VCSEL type. In contrast, in regard to optical implementation, the VCSEL type is advantageous because it does not need an external bias-light source, whereas the modulator type needs bias-light arrays that must be precisely located because the small modulator diameter, <10 µm, is essential to high-speed operation. A bias-light source that increases the total power consumption of the system may offset the advantages of the modulator type.

Cantor network, control algorithm, two-dimensional compact structure and its optical implementation

A compact integrating module technique for packaging a optical multistage Cantor network with a polarization multiplex technique is suggested. The modules have a unique configuration, which is the solid-state combination of a polarization rotator, double birefringent slabs, and a 2 × 2 switch array. The design and the fabrication of an eight-channel optical nonblocking Cantor network are demonstrated, and a fast-setup control algorithm is developed. The network systems are easy to assemble and insensitive to environment disturbance.

Implementation of a hybrid lens

Details are presented of the design, fabrication, and use of a hybrid lens employed to interconnect two-dimensional arrays of optical transceivers. The hybrid lens consists of a custom-designed, 42-mm focal length, ƒ/5 compound lens followed by an array of afocal telescope compound microlenses.

Numerical study of Dammann array illuminators

The numerical solutions of binary-phase (0, π) gratings for one-dimensional array illuminators up to 32 are presented. Some fabrication errors, which are due to position-quantization errors, phase errors, dilation (or erosion) errors, and the side-slope error, are calculated and show that even-number array illuminators are superior to odd-number array illuminators when these fabrication errors are considered. One (0, π) binary-phase, 8 × 16 array illuminator made with the wet-chemical-etching method is given in this paper.

Picosecond switching of GaAs/AlGaAs smart pixels

We demonstrate that GaAs/AlGaAs smart pixels can be operated with picosecond and subpicosecond laser pulses. Switching times as short as 200 ps are measured. Our results confirm the theoretical prediction that input mode-locked pulses are more advantageous than the more typical square-wave pulses. They also suggest that use of picosecond mode-locked pulses for optical output could produce operating speeds in the gigahertz range.