Guiding Chart for Initial Layer Choice with Nanoimprint Lithography

The implementation of thermal and UV nanoimprint lithography for selective area epitaxy

Semiconductor nanowires (NWs) in horizontal configuration could provide a path for scalable NW-based devices. Bottom-up large-scale manufacturing of these nanostructures by selective area epitaxy (SAE) relies on precise nanopatterning of various shapes on the growth masks. Electron beam lithography offers an extraordinary accuracy suited for the purpose. However, this technique is not economically viable for large production as it has a low throughput and requires high investment and operational costs. Nanoimprint lithography (NIL) has the potential to reduce fabrication time and costs significantly while requiring less sophisticated equipment. In this work, we utilize both thermal and UV NIL for patterning substrates for SAE, elucidating the advantages and disadvantages of each lithography technique. We demonstrate the epitaxial growth of Ge and GaAs NWs on these substrates, where we observe high-quality mono-crystalline structures. Even though both processes can produce small uniform structures suitable for SAE, our results show that UV NIL proves to be superior and enables reliable and efficient patterning of sub-100 nm mask features at the wafer scale.