Wideband Fully-Programmable Dual-Mode CMOS Analogue Front-End for Electrical Impedance Spectroscopy

A Reconfigurable Differential-to-Single-Ended Autonomous Current Adaptation Buffer Amplifier Suitable for Biomedical Applications

A reconfigurable differential-to-single-ended autonomous current adaptation buffer amplifier (ACABA) is proposed. The ACABA, based on floating-gate technologies, is a capacitive circuit, of which output DC level and bandwidth can be adjusted by programming charges on floating nodes. The gain is variable by switching different amounts of capacitors without altering the output DC level. Without extra sensing and control circuitries, the current consumption of the proposed ACABA increases spontaneously when the input signal is fast or large, achieving a high slew rate. The supply current dwindles back to the low quiescent level autonomously when the output voltage reaches equilibrium. Therefore, the proposed ACABA is power-efficient and suitable for processing physiological signals. A prototype ACABA has been designed and fabricated in a [Formula: see text] CMOS process occupying an area of [Formula: see text]. When loaded by a [Formula: see text] capacitor, it consumes [Formula: see text] to achieve a unity-gain bandwidth of [Formula: see text] with a measured IIP2 value of [Formula: see text] and a slew rate of [Formula: see text].

An 8.72 µW Low-Noise and Wide Bandwidth FEE Design for High-Throughput Pixel-Strip (PS) Sensors

The front-end electronics (FEE) of the Compact Muon Solenoid (CMS) is needed very low power consumption and higher readout bandwidth to match the low power requirement of its Short Strip application-specific integrated circuits (ASIC) (SSA) and to handle a large number of pileup events in the High-Luminosity Large Hadron Collider (LHC). A low-noise, wide bandwidth, and ultra-low power FEE for the pixel-strip sensor of the CMS has been designed and simulated in a 0.35 µm Complementary Metal Oxide Semiconductor (CMOS) process. The design comprises a Charge Sensitive Amplifier (CSA) and a fast Capacitor-Resistor-Resistor-Capacitor (CR-RC) pulse shaper (PS). A compact structure of the CSA circuit has been analyzed and designed for high throughput purposes. Analytical calculations were performed to achieve at least 998 MHz gain bandwidth, and then overcome pileup issue in the High-Luminosity LHC. The spice simulations prove that the circuit can achieve 88 dB dc-gain while exhibiting up to 1 GHz gain-bandwidth product (GBP). The stability of the design was guaranteed with an 82-degree phase margin while 214 ns optimal shaping time was extracted for low-power purposes. The robustness of the design against radiations was performed and the amplitude resolution of the proposed front-end was controlled at 1.87% FWHM (full width half maximum). The circuit has been designed to handle up to 280 fC input charge pulses with 2 pF maximum sensor capacitance. In good agreement with the analytical calculations, simulations outcomes were validated by post-layout simulations results, which provided a baseline gain of 546.56 mV/MeV and 920.66 mV/MeV, respectively, for the CSA and the shaping module while the ENC (Equivalent Noise Charge) of the device was controlled at 37.6 e⁻ at 0 pF with a noise slope of 16.32 e⁻/pF. Moreover, the proposed circuit dissipates very low power which is only 8.72 µW from a 3.3 V supply and the compact layout occupied just 0.0205 mm² die area.

1.0 V-0.18 µm CMOS Tunable Low Pass Filters with 73 dB DR for On-Chip Sensing Acquisition Systems

This paper presents a new approach based on the use of a Current Steering (CS) technique for the design of fully integrated Gm–C Low Pass Filters (LPF) with sub-Hz to kHz tunable cut-off frequencies and an enhanced power-area-dynamic range trade-off. The proposed approach has been experimentally validated by two different first-order single-ended LPFs designed in a 0.18 µm CMOS technology powered by a 1.0 V single supply: a folded-OTA based LPF and a mirrored-OTA based LPF. The first one exhibits a constant power consumption of 180 nW at 100 nA bias current with an active area of 0.00135 mm2 and a tunable cutoff frequency that spans over 4 orders of magnitude (~100 mHz–152 Hz @ CL = 50 pF) preserving dynamic figures greater than 78 dB. The second one exhibits a power consumption of 1.75 µW at 500 nA with an active area of 0.0137 mm2 and a tunable cutoff frequency that spans over 5 orders of magnitude (~80 mHz–~1.2 kHz @ CL = 50 pF) preserving a dynamic range greater than 73 dB. Compared with previously reported filters, this proposal is a competitive solution while satisfying the low-voltage low-power on-chip constraints, becoming a preferable choice for general-purpose reconfigurable front-end sensor interfaces.

Extraction of bioimpedance phase information from its magnitude using a non-uniform Kramers-Kronig transform

A novel non-uniform Kramers-Kronig Transform algorithm for bioimpedance phase extraction is proposed and tested in this work. The algorithm error is studied and compared with a previously proposed phase extraction technique, also based on the Kramers-Kronig transform. Results using simulated datasets and experimental datasets confirm the excellent performance of the algorithm.

Biosensor of Inflammation Biomarkers Based on Electrical Bioimpedance Analysis on Immobilized DNA Without Chemical Modification

The development of biosensors to identify molecular markers or specific genes is fundamental for the implementation of new techniques that allow the detection of specific Deoxyribonucleic acid (DNA) sequences in a fast, economic and simple way. Different detection techniques have been proposed in the development of biosensors. Electrical Bioimpedance Spectroscopy (EBiS) has been used for diagnosis and monitoring of human pathologies, and is recognized as a safe, fast, reusable, easy and inexpensive technique. This study proves the development of a complementary DNA (cDNA) biosensor based on measurements of EBiS and DNA's immobilization with no chemical modifications. The evaluation of its potential utility in the detection of the gene expression of three inflammation characteristic biomarkers (NLRP3, IL-1β and Caspase 1) is presented. The obtained results demonstrate that EBiS can be used to identify different gene expression patterns, measurements that were validated by Quantitative Polymerase Chain Reaction (qPCR). These results indicate the technical feasibility for a biosensor of specific genes through bioimpedance measurements on the immobilization of cDNA.

A CMOS Low Pass Filter for SoC Lock-in-Based Measurement Devices

This paper presents a fully integrated G_m–C low pass filter (LPF) based on a current steering G_m reduction-tuning technique, specifically designed to operate as the output stage of a SoC lock-in amplifier. To validate this proposal, a first-order and a second-order single-ended topology were integrated into a 1.8 V to 0.18 µm CMOS (Complementary Metal-Oxide-Semiconductor) process, showing experimentally a tuneable cutoff frequency that spanned five orders of magnitude, from tens of mHz to kHz, with a constant current consumption (below 3 µA/pole), compact size (<0.0140 mm²/pole), and a dynamic range better than 70 dB. Compared to state-of-the-art solutions, the proposed approach exhibited very competitive performances while simultaneously fully satisfying the demanding requirements of on-chip portable measurement systems in terms of highly efficient area and power. This is of special relevance, taking into account the current trend towards multichannel instruments to process sensor arrays, as the total area and power consumption will be proportional to the number of channels.

A Multichannel FRA-Based Impedance Spectrometry Analyzer Based on a Low-Cost Multicore Microcontroller

Impedance spectrometry (IS) is a characterization technique in which a voltage or current signal is applied to a sample under test to measure its electrical behavior over a determined frequency range, obtaining its complex characteristic impedance. Frequency Response Analyzer (FRA) is an IS technique based on Phase Sensitive Detection (PSD) to extract the real and imaginary response of the sample at each input signal, which presents advantages compared to FFT-based (Fast Fourier Transform) algorithms in terms of complexity and speed. Parallelization of this technique has proven pivotal in multi-sample characterization, reducing the instrumentation size and speeding up analysis processes in, e.g., biotechnological or chemical applications. This work presents a multichannel FRA-based IS system developed on a low-cost multicore microcontroller platform which both generates the required excitation signals and acquires and processes the output sensor data with a minimum number of external passive components, providing accurate impedance measurements. With a suitable configuration, the use of this multicore solution allows characterizing several impedance samples in parallel, reducing the measurement time. In addition, the proposed architecture is easily scalable.

Sensing Cell-Culture Assays with Low-Cost Circuitry

An alternative approach for cell-culture end-point protocols is proposed herein. This new technique is suitable for real-time remote sensing. It is based on Electrical Cell-substrate Impedance Spectroscopy (ECIS) and employs the Oscillation-Based Test (OBT) method. Simple and straightforward circuit blocks form the basis of the proposed measurement system. Oscillation parameters – frequency and amplitude – constitute the outcome, directly correlated with the culture status. A user can remotely track the evolution of cell cultures in real time over the complete experiment through a web tool continuously displaying the acquired data. Experiments carried out with commercial electrodes and a well-established cell line (AA8) are described, obtaining the cell number in real time from growth assays. The electrodes have been electrically characterized along the design flow in order to predict the system performance and the sensitivity curves. Curves for 1-week cell growth are reported. The obtained experimental results validate the proposed OBT for cell-culture characterization. Furthermore, the proposed electrode model provides a good approximation for the cell number and the time evolution of the studied cultures.

A 0.18 μm CMOS LDO Regulator for an On-Chip Sensor Array Impedance Measurement System

This paper presents a fully integrated 0.18 μm CMOS Low-Dropout (LDO) Voltage Regulator specifically designed to meet the stringent requirements of a battery-operated impedance spectrometry multichannel CMOS micro-instrument. The proposed LDO provides a regulated 1.8 V voltage from a 3.6 V to 1.94 V battery voltage over a −40 °C to 100 °C temperature range, with a compact topology (<0.10 mm² area) and a constant quiescent current of only 7.45 μA with 99.985% current efficiency, achieving remarkable state-of-art Figures of Merit (FoMs) for the regulating–transient performance. Experimental measurements validate its suitability for the target application, paving the way towards the future achievement of a truly portable System on Chip (SoC) platform for impedance sensors.

Inkjet-printed Ag electrodes on paper for high sensitivity impedance measurements

Paper electrodes, fabricated by a standard office inkjet printer, show a high sensitivity enhancement for impedance measurement.