Ambipolar 2D Semiconductors and Emerging Device Applications

Electrodeposited Reduced Graphene Oxide Enables Long-Term Memory in Neuromorphic Ambipolar Electrolyte-Gated Transistors

Ambipolar transistors, capable of conducting both electrons and holes, enable the simplification of circuit design by reducing the number of constituting units in circuits and opening new possibilities for low-power electronics, reconfigurable logic circuits, and memory devices. 2D ambipolar semiconductors as graphene and its derivatives, are particularly advantageous in bioelectronics, for their high sensitivity in label-free sensors and their biocompatibility. Here, a novel method for fabricating electrolyte-gated transistors based on reduced graphene oxide (rGO-EGTs) is proposed, which enables precise control over the thickness of deposited rGO. Such rGO-EGTs act as a neuromorphic unit that exhibits tailorable long-term plasticity when driven with pulsed voltage. By applying different numbers of voltage pulses and acting on their amplitudes, it is possible to program multilevel memory with retention timescales over tens of minutes and 6.60 µS writing resolution. This long-term plasticity makes our rGO-EGT promising for nonvolatile memory, computing, and plasticity-based signal pattern recognition.

Vapour-liquid-solid-solid growth of two-dimensional non-layered β-Bi2O3 crystals with high hole mobility

Currently, p-type two-dimensional (2D) materials lag behind n-type ones in both quantity and performance, hindering their use in advanced p-channel transistors and complementary logic circuits. Non-layered materials, which make up 95% of crystal structures, hold the potential for superior p-type 2D materials but remain challenging to synthesize. Here we show a vapour-liquid-solid-solid growth of atomically thin (<1 nm), high-quality, non-layered 2D β-Bi2O3 crystals on a SiO2/Si substrate. These crystals form via a transformation from layered BiOCl intermediates. We further realize 2D β-Bi2O3 transistors with room-temperature hole mobility and an on/off current ratio of 136.6 cm2 V-1 s-1 and 1.2 × 108, respectively. The p-type nature is due to the strong suborbital hybridization of Bi 6s26p3 with O 2p4 at the crystal's M-point valence band maximum. Our work can be used as a reference that adds more 2D non-layered materials to the 2D toolkit and shows 2D β-Bi2O3 to be promising candidate for future electronics.

Non-Volatile Reconfigurable Four-Mode van der Waals Transistors and Transformable Logic Circuits

Emerging applications in data-intensive computing and circuit security demand logic circuits with high functional density, reconfigurability, and energy efficiency. Here, we demonstrate nonvolatile reconfigurable four-mode field-effect transistors (NVR4M-FETs) based on two-dimensional (2D) MoTe2 and CuInP2S6 (CIPS), offering both polarity switching and threshold voltage modulation. The device exploits the ferroelectric polarization of CIPS at the source/drain regions to achieve dynamic control over the transistor polarity, enabling transitions between n-type and p-type states through polarization-induced local electrostatic doping. Additionally, multilayer graphene floating gates are incorporated to modulate the threshold voltage, yielding four distinct nonvolatile operating modes: n-type logic, p-type logic, always-on memory, and always-off memory. Leveraging the four-mode property, the NVR4M-FET can function as a one-transistor-per-bit ternary content-addressable memory (TCAM). In addition, we demonstrate the construction of transformable logic gates with 14 distinct logic functions using two NVR4M-FETs and a reconfigurable half a dder/subtractor using three NVR4M-FETs integrated with load resistors. Furthermore, we show that a 2-input look-up table can be achieved with eight NVR4M-FETs compared to 12 transistors using reconfigurable transistors, highlighting the potential of NVR4M-FETs for high-density logic circuits. These results underscore the potential of NVR4M-FETs as essential building blocks for energy-efficient, in-memory computing, and secure hardware applications.

8-bit states in 2D floating-gate memories using gate-injection mode for large-scale convolutional neural networks

The fast development of artificial intelligence has called for high-efficiency neuromorphic computing hardware. While two-dimensional floating-gate memories show promise, their limited state numbers and stability hinder practical use. Here, we report gate-injection-mode two-dimensional floating-gate memories as a candidate for large-scale neural network accelerators. Through a coplanar device structure design and a bi-pulse state programming strategy, 8-bit states with intervals larger than three times of the standard deviations and stability over 10,000 s are achieved at 3 V. The cycling endurance is over 105 and the fabricated 256 devices show a yield of 94.9%. Leveraging this, we carry out experimental image convolutions and 38,592 kernels transplanting on an integrated 9 × 2 array that exhibits results matching well with simulations. We also show that fix-point neural networks with 8-bit precision have inference accuracies approaching the ideal values. Our work validates the potential of gate-injection-mode two-dimensional floating-gate memories for high-efficiency neuromorphic computing hardware.

Molecular Design and Alignment for Ambipolar SCLC Mobility in Self-Assembled Columnar Discogens

The future of next-generation electronics relies on low-cost organic semiconductors that are tailored to simultaneously provide all requisite optoelectronic properties, focusing greatly on ambipolar charge-transport and solution processability. In this regard, room-temperature discotic liquid crystals (DLCs) are potential candidates, where quasi-1D self-assembly affords a charge-transport channel along their columnar axis. This work shows a molecular design strategy by utilizing anthraquinone as the primary motif, surrounded by ester functionalized tri-alkoxy phenyl units to develop room-temperature DLCs (1.1-1.3). Here, the polar ester functionality stabilizes the columnar mesophase over a wide range through the involvement of dipole-dipole interaction along with the π-π stacking. Throughout the entire mesophase transition, reported compounds 1.1-1.3 exhibit a highly ordered 2D columnar oblique (Colob) self-assembly. Space charge limited current (SCLC) experiments reveal balanced ambipolar charge transport, with the maximum hole and electron mobilities of 5.04 and 4.93 cm2 V-1 s-1, respectively. From the conoscopic results, their propensity to align in a highly homeotropic fashion is demonstrated. It is further justified by the azimuthal plot corresponding to the (11) peak of grazing incidence small angle X-ray scattering (GISAXS), denoting the crucial role of the design and alignment for efficient movement of charge carriers in the material.

Reconfigurable Phototransistors Driven by Gate-Dependent Carrier Modulation in WSe2/Ta2NiSe5 van der Waals Heterojunctions

Reconfigurable field-effect transistors (RFETs) offer notable benefits on electronic and optoelectronic logic circuits, surpassing the integration, flexibility, and cost-efficiency of conventional complementary metal-oxide semiconductor transistors. The low on/off current ratio of these transistors remains a considerable impediment in the practical application of RFETs. To overcome these limitations, a van der Waals heterojunction (vdWH) transistor composed of WSe2/Ta2NiSe5 has been proposed. By modulating a single back-gate voltage and source-drain voltage inputs, the transistor achieves a switchable polarity configuration and bidirectional rectification, making it capable of functioning as a gate-controlled bidirectional half-wave rectifier. The proposed RFET exhibits tunable positive/negative photovoltaic responses, advanced optoelectronic performance, and a gate-voltage-dependent reversal of the photodetector position. Detailed energy band diagram studies have shown that the reconfigurability of the device arises from carrier blockage resulting from the type-I band structure and carrier injection modulated by gate-dependent Schottky barriers. Consequently, the reconfigurable WSe2/Ta2NiSe5 vdWH holds significant promise for advanced multifunctional optoelectronic device applications.

Parallel Logic Operations in Electrically Tunable Two-Dimensional Homojunctions

Two-dimensional materials show great potential for future electronics beyond silicon materials. Here, we report an exotic multiple-port device based on multiple electrically tunable planar p-n homojunctions formed in a two-dimensional (2D) ambipolar semiconductor, tungsten diselenide (WSe2). In this device, we prepare multiple gates consisting of a global gate and several local gates, by which electrostatically induced holes and electrons are simultaneously accumulated in a WSe2 channel, and furthermore, at the boundaries, p-n junctions are formed as directly visualized by Kelvin probe force microscopy. Therefore, in addition to the gate voltages in our device, the drain/source bias can also be used to switch the 2D WSe2 channel on/off due to the rectification effect of the formed p-n junctions. More importantly, when the voltage on the global gate electrode is altered, all p-n junctions are affected, which makes it possible to perform parallel logic operations.

Barrier Polarity Reversal Based on Interfacial Modification of Au Nanoparticles for Nonvolatile Multilevel Memory and Optoelectronic Synapses

Optoelectronic synaptic devices, integrating light sensing and information processing capabilities, have emerged as advantageous tools for the implementation of visual neuromorphic computing. However, the transient light-triggered response characteristic typically results in unstable memory retention times and restricted current response ranges, posing significant challenges to the development and practical application of neural network systems. In response to these limitations, this study developed a nonvolatile optoelectronic memory based on the indium tin oxide (ITO)/Au nanoparticles (NPs)/amorphous Ga2O3 (a-Ga2O3)/Pt structure. Unlike conventional optoelectronic memories, this device features a modification with Au NPs that markedly enhances the Schottky barrier height at the interface. Au NPs function as a charge-trapping layer for sensitive and large-scale modulation of the barrier by the light field, thereby enabling the nonvolatile reversal of the device's barrier polarity. This innovative approach enables controllable multilevel data storage with an ultra large on/off ratio (∼104) and excellent retention capability exceeding 12,000 s. Additionally, the device emulates essential synaptic functions and demonstrates potential application values in visual weak signal perception and image memory. This study introduces a mechanism for Schottky barrier polarity control and presents a promising strategy for the development of future high-performance integrated devices and optoelectronic synaptic elements.

Electrostatically Designing Materials and Interfaces

Collective electrostatic effects arise from the superposition of electrostatic potentials of periodically arranged (di)polar entities and are known to crucially impact the electronic structures of hybrid interfaces. Here, it is discussed, how they can be used outside the beaten paths of materials design for realizing systems with advanced and sometimes unprecedented properties. The versatility of the approach is demonstrated by applying electrostatic design not only to metal-organic interfaces and adsorbed (complex) monolayers, but also to inter-layer interfaces in van der Waals heterostructures, to polar metal-organic frameworks (MOFs), and to the cylindrical pores of covalent organic frameworks (COFs). The presented design ideas are straightforward to simulate and especially for metal-organic interfaces also their experimental implementation has been amply demonstrated. For van der Waals heterostructures, the needed building blocks are available, while the required assembly approaches are just being developed. Conversely, for MOFs the necessary growth techniques exist, but more work on advanced linker molecules is required. Finally, COF structures exist that contain pores decorated with polar groups, but the electrostatic impact of these groups has been largely ignored so far. All this suggest that the dawn of the age of electrostatic design is currently experienced with potential breakthroughs lying ahead.

High-Performance 2D Ambipolar MoTe2 Lateral Memristors by Mild Oxidation

2D transition metal dichalcogenides (TMDCs) have been intensively explored in memristors for brain-inspired computing. Oxidation, which is usually unavoidable and harmful in 2D TMDCs, could also be used to enhance their memristive performances. However, it is still unclear how oxidation affects the resistive switching behaviors of 2D ambipolar TMDCs. In this work, a mild oxidation strategy is developed to greatly enhance the resistive switching ratio of ambipolar 2H-MoTe2 lateral memristors by more than 10 times. Such an enhancement results from the amplified doping due to O2 and H2O adsorption and the optimization of effective gate voltage distribution by mild oxidation. Moreover, the ambipolarity of 2H-MoTe2 also enables a change of resistive switching direction, which is uncommon in 2D memristors. Consequently, as an artificial synapse, the MoTe2 device exhibits a large dynamic range (≈200) and a good linearity (1.01) in long-term potentiation and depression, as well as a high-accuracy handwritten digit recognition (>96%). This work not only provides a feasible and effective way to enhance the memristive performance of 2D ambipolar materials, but also deepens the understanding of hidden mechanisms for RS behaviors in oxidized 2D materials.

Full Two-Dimensional Ambipolar Field-Effect Transistors for Transparent and Flexible Electronics

The unique features of two-dimensional (2D) materials provide significant opportunities for the development of transparent and flexible electronics. Recently, ambipolar 2D semiconductors have advanced innovative applications such as CMOS-like circuits, reconfigurable circuits, and ultrafast neuromorphic image sensors. Here, we report on the fabrication of full 2D ambipolar field-effect transistors (FETs), in which graphene serves as the source/drain/gate electrodes, WSe2 is for the channel, and h-BN is for the dielectric. The produced ambipolar FETs exhibit comparable on-currents in the n-branch and p-branch with on/off ratios up to 108. By using two ambipolar FETs in series, a CMOS-like inverter is demonstrated with a maximum gain of up to 147, which can work in both the first and third quadrants by controlling the supply voltages and input voltages. The full 2D ambipolar FETs yield a transmittance of over 70% for visible light on transparent glass and achieve a curvature radius of less than 0.5 cm for bending on polyethylene terephthalate (PET) substrate. The work is helpful for the application of ambipolar 2D materials-based devices in transparent and flexible electronics.

Programmable Optical Encryption Based on Electrical-Field-Controlled Exciton-Trion Transitions in Monolayer WS2

Optical encryption is receiving much attention with the rapid growth of information technology. Conventional optical encryption usually relies on specific configurations, such as metasurface-based holograms and structure colors, not meeting the requirements of increasing dynamic and programmable encryption. Here, we report a programmable optical encryption approach using WS2/SiO2/Au metal-oxide-semiconductor (MOS) devices, which is based on the electrical-field-controlled exciton-trion transitions in monolayer WS2. The modulation depth of the MOS device reflection amplitude up to 25% related to the excitons ensures the fidelity of information, and the decryption based on the near excitonic resonance assures security. With such devices, we successfully demonstrate their applications in real-time encryption of ASCII codes and visual images. For the latter, it can be implemented at the pixel level. The strategy shows significant potential for low-cost, low-energy-consumption, easily integrated, and high-security programmable optical encryptions.

Adjustment methods of Schottky barrier height in one- and two-dimensional semiconductor devices

The Schottky contact which is a crucial interface between semiconductors and metals is becoming increasingly significant in nano-semiconductor devices. A Schottky barrier, also known as the energy barrier, controls the depletion width and carrier transport across the metal-semiconductor interface. Controlling or adjusting Schottky barrier height (SBH) has always been a vital issue in the successful operation of any semiconductor device. This review provides a comprehensive overview of the static and dynamic adjustment methods of SBH, with a particular focus on the recent advancements in nano-semiconductor devices. These methods encompass the work function of the metals, interface gap states, surface modification, image-lowering effect, external electric field, light illumination, and piezotronic effect. We also discuss strategies to overcome the Fermi-level pinning effect caused by interface gap states, including van der Waals contact and 1D edge metal contact. Finally, this review concludes with future perspectives in this field.

Potassium hydroxide treatment of layered WSe2 with enhanced electronic performances

2D WSe2-based electronic devices have received much research interest. However, it is still a challenge to achieve high electronic performance in WSe2-based devices. In this work, we report greatly enhanced performances of different thickness WSe2 ambipolar transistors and demonstrate homogeneous WSe2 inverter devices, which are obtained by using a semiconductor processing-compatible layer removal technique via chemical removal of the surface top WOx layer formed by O2 plasma treatment. Importantly, monolayer WSe2 was realised after several consecutive removal processes, demonstrating that the single layer removal is accurate and reliable. After subsequent removal of the top layer WOx by KOH, the fabricated WSe2 field-effect transistors exhibit greatly enhanced electronic performance along with the high electron and hole mobilities of 40 and 85 cm2 V-1 s-1, respectively. Our work demonstrates that the layer removal technique is an efficient route to fabricate high performance 2D material-based electronic devices.

A design TCADAS tool for semiconductor devices and case study of 65 nm conventional floating-gate MOS transistor

An automatic programming tool has become an essential component in virtual fabrication in recent years. This paper aims to propose a methodology of virtual fabrication for semiconductor devices and design a tool called Technology Computer-Aided Design Automatic Simulation (TCADAS) which can perform a completely virtual fabrication, device simulation, process variation, and output extraction. Especially, the TCADAS tool eliminates drudgery when studying semiconductor devices such as complexity in setting inputs, substantial manual work, and long run time of simulations. This work investigates the completed flow for a 65 nm conventional Floating-gate MOS transistor as a case study, which is widely considered a vital determinant of the non-volatile memory field. A detailed automatic process from the entry to a completed three-dimension structure, device characterization, extract important output parameters such as memory window,I O N /I O F F , Gate Coupling Ratio (GCR), and speed operations are presented. The TCADAS tool was designed by Python language and the utilities of TCAD Silvaco tools including Athena, Atlas, and DevEdit3D.

Drain-Induced Multifunctional Ambipolar Electronics Based on Junctionless MoS2

Applying a drain bias to a strongly gate-coupled semiconductor influences the carrier density of the channel. However, practical applications of this drain-bias-induced effect in the advancement of switching electronics have remained elusive due to the limited capabilities of its current modulation known to date. Here, we show strategies to largely control the current by utilizing drain-bias-induced carrier type switching in an ambipolar molybdenum disulfide (MoS2) field-effect transistor with Pt bottom contacts. Our CMOS-compatible device architecture, incorporating a partially gate-coupled p-n junction, achieves multifunctionality. The ambipolar MoS2 device operates as an ambipolar transistor (on/off ratios exceeding 107 for both NMOS and PMOS), a rectifier (rectification ratio of ∼3 × 106), a reversible negative breakdown diode with an adjustable breakdown voltage (on/off ratio exceeding 109 with a maximum current as high as 10-4 A), and a photodetector. Finally, we demonstrate a complementary inverter (gain of ∼24 at Vdd = 1.5 V), which is highly facile to fabricate without the need for complex heterostructures and doping processes. Our study provides strategies to achieve high-performance ambipolar MoS2 devices and to effectively utilize drain bias for electrical switching.

Reconfigurable Multifunctional van der Waals Ferroelectric Devices and Logic Circuits

Emerging reconfigurable devices are fast gaining popularity in the search for next-generation computing hardware, while ferroelectric engineering of the doping state in semiconductor materials has the potential to offer alternatives to traditional von-Neumann architecture. In this work, we combine these concepts and demonstrate the suitability of reconfigurable ferroelectric field-effect transistors (Re-FeFETs) for designing nonvolatile reconfigurable logic-in-memory circuits with multifunctional capabilities. Modulation of the energy landscape within a homojunction of a 2D tungsten diselenide (WSe2) layer is achieved by independently controlling two split-gate electrodes made of a ferroelectric 2D copper indium thiophosphate (CuInP2S6) layer. Controlling the state encoded in the program gate enables switching between p, n, and ambipolar FeFET operating modes. The transistors exhibit on-off ratios exceeding 106 and hysteresis windows of up to 10 V width. The homojunction can change from Ohmic-like to diode behavior with a large rectification ratio of 104. When programmed in the diode mode, the large built-in p-n junction electric field enables efficient separation of photogenerated carriers, making the device attractive for energy-harvesting applications. The implementation of the Re-FeFET for reconfigurable logic functions shows how a circuit can be reconfigured to emulate either polymorphic ferroelectric NAND/AND logic-in-memory or electronic XNOR logic with a long retention time exceeding 104 s. We also illustrate how a circuit design made of just two Re-FeFETs exhibits high logic expressivity with reconfigurability at runtime to implement several key nonvolatile 2-input logic functions. Moreover, the Re-FeFET circuit demonstrates high compactness, with an up to 80% reduction in transistor count compared to standard CMOS design. The 2D van de Waals Re-FeFET devices therefore exhibit promising potential for both More-than-Moore and beyond-Moore future of electronics, in particular for an energy-efficient implementation of in-memory computing and machine learning hardware, due to their multifunctionality and design compactness.

A bidirectional thermal sensory leaky integrate-and-fire (LIF) neuron model based on bipolar NbOx volatile threshold devices with ultra-low operating current

Brain-like artificial intelligence (AI) will become the main form and important platform in future computing. It will play an important and unique role in simulating brain functions, efficiently implementing AI algorithms, and improving computing power. Developing artificial neurons that can send facilitation/depression signals to artificial synapses, sense, and process temperature information is of great significance for achieving more efficient and compact brain-like computing systems. Herein, we have constructed a NbOx bipolar volatile threshold memristor, which could be operated by 1 μA ultra-low current and up to ∼104 switching ratios. By using a leaky integrate-and-fire (LIF) artificial neuron model, a bipolar LIF artificial neuron is constructed, which can realize the conventional threshold-driven firing, all-or-nothing spiking, refractory periods, and intensity-modulated frequency response bidirectionally at the positive/negative voltage stimulation, which will give the artificial synapse facilitation/depression signals. Furthermore, this bipolar LIF neuron can also explore different temperatures to output different signals, which could be constructed as a more compact thermal sensory neuron to avoid external harm to artificial robots. This study is of great significance for improving the computational efficiency of the system more effectively, achieving high integration density and low energy consumption artificial neural networks to meet the needs of brain-like neural computing.

Contact-engineered reconfigurable two-dimensional Schottky junction field-effect transistor with low leakage currents

Two-dimensional (2D) materials have been considered promising candidates for future low power-dissipation and reconfigurable integrated circuit applications. However, 2D transistors with intrinsic ambipolar transport polarity are usually affected by large off-state leakage currents and small on/off ratios. Here, we report the realization of a reconfigurable Schottky junction field-effect transistor (SJFET) in an asymmetric van der Waals contact geometry, showing a balanced and switchable n- and p-unipolarity with the I_ds on/off ratio kept >10⁶. Meanwhile, the static leakage power consumption was suppressed to 10^-5 nW. The SJFET worked as a reversible Schottky rectifier with an ideality factor of ~1.0 and a tuned rectifying ratio from 3 × 10⁶ to 2.5 × 10^-6. This empowered the SJFET with a reconfigurable photovoltaic performance in which the sign of the open-circuit voltage and photo-responsivity were substantially switched. This polarity-reversible SJFET paves an alternative way to develop reconfigurable 2D devices for low-power-consumption photovoltaic logic circuits.

Reconfigurable Logic-in-Memory Computing Based on a Polarity-Controllable Two-Dimensional Transistor

Logic-in-memory architecture holds great promise to meet the high-performance and energy-efficient requirements of data-intensive scenarios. Two-dimensional compacted transistors embedded with logic functions are expected to extend Moore's law toward advanced nodes. Here we demonstrate that a WSe₂/h-BN/graphene based middle-floating-gate field-effect transistor can perform under diverse current levels due to the controllable polarity by the control gate, floating gate, and drain voltages. Such electrical tunable characteristics are employed for logic-in-memory architectures and can behave as reconfigurable logic functions of AND/XNOR within a single device. Compared to the conventional devices like floating-gate field-effect transistors, our design can greatly decrease the consumption of transistors. For AND/NAND, it can save 75% transistors by reducing the transistor number from 4 to 1; for XNOR/XOR, it is even up to 87.5% with the number being reduced from 8 to 1.

Chemical Dopant-Free Controlled MoTe2/MoSe2 Heterostructure toward a Self-Driven Photodetector and Complementary Logic Circuits

Two-dimensional (2D) van der Waals heterostructures based on transition metal dichalcogenides are expected to be unique building blocks for next-generation nanoscale electronics and optoelectronics. The ability to control the properties of 2D heterostructures is the key for practical applications. Here, we report a simple way to fabricate a high-performance self-driven photodetector based on the MoTe₂/MoSe₂ p-n heterojunction, in which the hole-dominated transport polarity of MoTe₂ is easily achieved via a straightforward thermal annealing treatment in air without any chemical dopants or special gases needed. A high photoresponsivity of 0.72 A W^-1, an external quantum efficiency up to 41.3%, a detectivity of 7 × 10¹¹ Jones, and a response speed of 120 μs are obtained at zero bias voltage. Additionally, this doping method is also utilized to realize a complementary inverter with a voltage gain of 24. By configuring 2D p-MoTe₂ and n-MoSe₂ on demand, logic functions of NAND and NOR gates are also accomplished successfully. These results present a significant potential toward future larger-scale heterogeneously integrated 2D electronics and optoelectronics.

Reconfigurable Two-Dimensional Air-Gap Barristors

Reconfigurable logic circuits implemented by two-dimensional (2D) ambipolar semiconductors provide a prospective solution for the post-Moore era. It is still a challenge for ambipolar nanomaterials to realize reconfigurable polarity control and rectification with a simplified device structure. Here, an air-gap barristor based on an asymmetric stacking sequence of the electrode contacts was developed to resolve these issues. For the 2D ambipolar channel of WSe₂, the barristor can not only be reconfigured as an n- or p-type unipolar transistor but also work as a switchable diode. The air gap around the bottom electrode dominates the reconfigurable behaviors by widening the Schottky barrier here, thus blocking the injection of both electrons and holes. The electrical performances can be improved by optimizing the electrode materials, which achieve an on/off ratio of 10⁴ for the transistor and a rectifying ratio of 10⁵ for the diode. A complementary inverter and a switchable AND/OR logic gate were constructed by using the air-gap barristors as building blocks. This work provides an efficient approach with great potential for low-dimensional reconfigurable electronics.

Graphene Bridge Heterostructure Devices for Negative Differential Transconductance Circuit Applications

Two-dimensional van der Waals (2D vdW) material-based heterostructure devices have been widely studied for high-end electronic applications owing to their heterojunction properties. In this study, we demonstrate graphene (Gr)-bridge heterostructure devices consisting of laterally series-connected ambipolar semiconductor/Gr-bridge/n-type molybdenum disulfide as a channel material for field-effect transistors (FET). Unlike conventional FET operation, our Gr-bridge devices exhibit non-classical transfer characteristics (humped transfer curve), thus possessing a negative differential transconductance. These phenomena are interpreted as the operating behavior in two series-connected FETs, and they result from the gate-tunable contact capacity of the Gr-bridge layer. Multi-value logic inverters and frequency tripler circuits are successfully demonstrated using ambipolar semiconductors with narrow- and wide-bandgap materials as more advanced circuit applications based on non-classical transfer characteristics. Thus, we believe that our innovative and straightforward device structure engineering will be a promising technique for future multi-functional circuit applications of 2D nanoelectronics.

Two-Dimensional Field-Effect Transistor Sensors: The Road toward Commercialization

The evolutionary success in information technology has been sustained by the rapid growth of sensor technology. Recently, advances in sensor technology have promoted the ambitious requirement to build intelligent systems that can be controlled by external stimuli along with independent operation, adaptivity, and low energy expenditure. Among various sensing techniques, field-effect transistors (FETs) with channels made of two-dimensional (2D) materials attract increasing attention for advantages such as label-free detection, fast response, easy operation, and capability of integration. With atomic thickness, 2D materials restrict the carrier flow within the material surface and expose it directly to the external environment, leading to efficient signal acquisition and conversion. This review summarizes the latest advances of 2D-materials-based FET (2D FET) sensors in a comprehensive manner that contains the material, operating principles, fabrication technologies, proof-of-concept applications, and prototypes. First, a brief description of the background and fundamentals is provided. The subsequent contents summarize physical, chemical, and biological 2D FET sensors and their applications. Then, we highlight the challenges of their commercialization and discuss corresponding solution techniques. The following section presents a systematic survey of recent progress in developing commercial prototypes. Lastly, we summarize the long-standing efforts and prospective future development of 2D FET-based sensing systems toward commercialization.

Use of Ambipolar Dual-Gate Carbon Nanotube Field-Effect Transistor to Configure Exclusive-OR Gate

As the physical scaling limit of silicon-based integrated circuits is approached, new materials and device structures become necessary. The exclusive-OR (XOR) gate is a basic logic gate performed as a building block for digital adder and encrypted circuits. Here, we suggest that using the ambipolar property of carbon nanotubes and the threshold modulation ability of dual-gate field-effect transistors, an XOR gate can be constructed in only one transistor. For a traditional XOR gate, 4 to 6 transistors are needed, and this low-footprint topology could be employed in the future for hyperscaling and three-dimensional logic and memory transistor integration.

Nonvolatile Reconfigurable 2D Schottky Barrier Transistors

Nonvolatile reconfigurable transistors can be used to implement highly flexible and compact logic circuits with low power consumption in maintaining the configuration. In this paper, we build nonvolatile reconfigurable transistors based on 2D CuInP₂S₆/MoTe₂ heterostructures. The ferroelectric polarization-induced electron and hole doping in the heterostructure are investigated. By introducing the ferroelectric doping into the source/drain contacts, we demonstrate reconfigurable Schottky barrier transistors, whose polarity (n-type or p-type) can be dynamically programmed, where the configuration is nonvolatile in nature. These transistors exhibit a tunable photoresponse, where the n-n doping state leads to negative photocurrent, whereas the p-p doping state gives rise to a positive photocurrent. The transistor with asymmetric (n-p or p-n) contacts exhibits a strong photovoltaic effect. These reconfigurable logic and optoelectronic transistors will enable a new type of device fabric for future computing systems and sensing networks.