A low Schottky barrier height and transport mechanism in gold-graphene-silicon (001) heterojunctions

In-Depth Analysis on Self Alignment Effect of the Fermi-Level Using Graphene on Both n- and p-Type Semiconductors

Optimizing the contact structure while reducing the contact resistance in advanced transistors has become an extremely challenging problem. Because the existing techniques are limited to controlling only one semiconductor type, either n- or p-type, owing to their work function differences, significant challenges are encountered in the integration of a contact structure and metal suitable for both n- and p-type semiconductors. This is a formidable drawback of the complementary metal-oxide-semiconductor (CMOS) technology. In this paper, we demonstrate the effectiveness of a metal/graphene/semiconductor (MGrS) as a universal source/drain contact structure for both n- and p-type transistors. The MGrS contact structure significantly enhanced the reverse current density (JR) and reduced the Schottky barrier height (SBH) for both semiconductor types. From the analysis of the SBH values and their relationship with the metal work function, which refers to the S-parameter, the van der Waals contact of graphene (Gr) effectively alleviated the Fermi level (FL) pinning for both semiconductor types, reducing the metal-induced gap states (MIGS) at the Gr/semiconductor interface. Furthermore, Gr effectively modulated the work function of the contact metal to yield a position favorable for each semiconductor type. Consequently, a single MGrS contact structure on a Si substrate resulted in excellent Ohmic contacts in both n- and p-type Si, with SBH values reduced to 0.012 and 0.024 eV for n- and p-type Si, respectively. This new approach for integrating the contact structures of semiconductor types will lead to extended capabilities for high-performance device applications and CMOS logical circuitry.

Penta-SiCN monolayer as a well-balanced performance anode material for Li-ion batteries

Lithium-ion batteries (LIBs) remain irreplaceable for clean energy storage applications. The intrinsic metallic nature of penta-SiCN ensures its promising application in the electrodes of LIBs. Using first-principles calculations, we evaluate the performance of the intrinsic metallic penta-SiCN monolayer as the anode material for LIBs. Penta-SiCN exhibits a low diffusion energy barrier (0.107 eV) for Li atom migration on Si18C18N18, while the diffusion energy barrier for vacancy migration on Li17Si18C18N18 is only 0.006 eV. Additionally, penta-SiCN possesses a high theoretical capacity of 1485.98 mA h g-1, average open-circuit voltage of 0.97 V, and small volume expansion of 1%. Remarkably, penta-SiCN exhibits robust wettability towards the electrolytes (solvent molecules and metal salts) widely used in commercial LIBs, indicating the excellent compatibility in electrode applications. These intriguing theoretical findings make penta-SiCN a high performance anode material for LIBs.

Etch and Print: Graphene-Based Diodes for Silicon Technology

The graphene-silicon junction is one of the simplest conceivable interfaces in graphene-integrated semiconductor technology that can lead to the development of future generation of electronic and optoelectronic devices. However, graphene's integration is currently expensive and time-consuming and shows several challenges in terms of large-scale device fabrication, effectively preventing the possibility of implementing this technology into industrial processes. Here, we show a simple and cost-effective fabrication technique, based on inkjet printing, for the realization of printed graphene-silicon rectifying devices. The printed graphene-silicon diodes show an ON/OFF ratio higher than 3 orders of magnitude and a significant photovoltaic effect, resulting in a fill factor of ∼40% and a photocurrent efficiency of ∼2%, making the devices suitable for both electronic and optoelectronic applications. Finally, we demonstrate large-area pixeled photodetectors and compatibility with back-end-of-line fabrication processes.

Control of Ni/β-Ga2O3 Vertical Schottky Diode Output Parameters at Forward Bias by Insertion of a Graphene Layer

Controlling the Schottky barrier height (ϕB) and other parameters of Schottky barrier diodes (SBD) is critical for many applications. In this work, the effect of inserting a graphene interfacial monolayer between a Ni Schottky metal and a β-Ga2O3 semiconductor was investigated using numerical simulation. We confirmed that the simulation-based on Ni workfunction, interfacial trap concentration, and surface electron affinity was well-matched with the actual device characterization. Insertion of the graphene layer achieved a remarkable decrease in the barrier height (ϕB), from 1.32 to 0.43 eV, and in the series resistance (RS), from 60.3 to 2.90 mΩ.cm2. However, the saturation current (JS) increased from 1.26×10−11 to 8.3×10−7(A/cm2). The effects of a graphene bandgap and workfunction were studied. With an increase in the graphene workfunction and bandgap, the Schottky barrier height and series resistance increased and the saturation current decreased. This behavior was related to the tunneling rate variations in the graphene layer. Therefore, control of Schottky barrier diode output parameters was achieved by monitoring the tunneling rate in the graphene layer (through the control of the bandgap) and by controlling the Schottky barrier height according to the Schottky−Mott role (through the control of the workfunction). Furthermore, a zero-bandgap and low-workfunction graphene layer behaves as an ohmic contact, which is in agreement with published results.

Graphene-Silicon Device for Visible and Infrared Photodetection

The fabrication of a graphene-silicon (Gr-Si) junction involves the formation of a parallel metal-insulator-semiconductor (MIS) structure, which is often disregarded but plays an important role in the optoelectronic properties of the device. In this work, the transfer of graphene onto a patterned n-type Si substrate, covered by Si3N4, produces a Gr-Si device, in which the parallel MIS consists of a Gr-Si3N4-Si structure surrounding the Gr-Si junction. The Gr-Si device exhibits rectifying behavior with a rectification ratio up to 104. The investigation of its temperature behavior is necessary to accurately estimate the Schottky barrier height (SBH) at zero bias, φb0 = 0.24 eV, the effective Richardson's constant, A* = 7 × 10-10 AK-2 cm-2, and the diode ideality factor n = 2.66 of the Gr-Si junction. The device is operated as a photodetector in both photocurrent and photovoltage mode in the visible and infrared (IR) spectral regions. A responsivity of up to 350 mA/W and an external quantum efficiency (EQE) of up to 75% are achieved in the 500-1200 nm wavelength range. Decreases in responsivity to 0.4 mA/W and EQE to 0.03% are observed above 1200 nm, which is in the IR region beyond the silicon optical band gap, in which photoexcitation is driven by graphene. Finally, a model based on two parallel and opposite diodes, one for the Gr-Si junction and the other for the Gr-Si3N4-Si MIS structure, is proposed to explain the electrical behavior of the Gr-Si device.

One-Dimensional CdS/Carbon/Au Plasmonic Nanoarray Photoanodes via In Situ Reduction-Graphitization Approach toward Efficient Solar Hydrogen Evolution

Photoelectrochemical (PEC) hydrogen evolution has been acknowledged as a promising "green" technique to convert solar energy into clean chemical fuel. Photoanodes play a key role in determining the performance of PEC systems, spurring numerous efforts to develop advanced materials as well as structures to improve the photoconversion efficiency. In this work, we report the rational design of a plasmonic hierarchical nanorod array, composed of oriented one-dimensional (1D) CdS nanorods decorated with a uniformly wrapped graphite-like carbon (C_PDA) layer and Au nanoparticles (Au NPs), as highly efficient photoanode materials. An interfacial in situ reduction-graphitization method has been conducted to prepare the CdS/C_PDA/Au nanoarchitecture, where polydopamine (PDA) coating was used as a C source and a reductant. The CdS/C_PDA/Au nanoarray photoanode demonstrates superior photoconversion efficiency with a photocurrent density of 8.74 mA/cm² and an IPCE value (480 nm) of 30.2% (at 1.23 V vs RHE), under simulated sunlight irradiation, which are 12.7 and 13.5 times higher than pristine CdS. The significant enhancement of PEC performance is mainly benefited from the increase of the entire quantum yield and efficiency due to the formation of a Schottky rectifier, localized surface plasmon resonance (LSPR)-enhanced light absorption, and promoted hot-electron injection from interlayered graphene-like carbon. More importantly, thanks to the inhibited charge carrier recombination process and transferred oxidation reaction sites, the fabricated CdS/C_PDA/Au photoelectrode exhibits lengthened electron lifetimes and better photostability, illustrating its wonderful potential for future PEC application.