An energy-efficient, adiabatic electrode stimulator with inductive energy recycling and feedback current regulation

Development of Ocular Muscle Stimulation Systems and Optimization of Electrical Stimulus Parameters for Paralytic Strabismus Treatment

Paralysis of the extraocular muscles can lead to complications such as strabismus, diplopia, and loss of stereopsis. Current surgical treatments aim to mitigate these issues by resecting the paralyzed muscle or transposing the other recti muscles to the paralyzed muscle, but they do not fully improve the patient's quality of life. Electrical stimulation shows promise, while requiring further in vivo experiments and research on various stimulation parameters. In this study, we conducted experiments on rabbits to stimulate the superior rectus (SR) muscles using different parameters and stimulation waveforms. To provide various types of electrical stimulation, we developed the ocular muscle stimulation systems capable of both current controlled stimulation (CCS) and high-frequency stimulation (HFS), along with the chip that enables energy-efficient and safe switched-capacitor stimulation (SCS). We also developed electrodes for easy implantation and employed safe and efficient stimulation methods including CCS, SCS, and HFS. The in vivo animal experiments on normal and paralyzed SR muscles of rabbits showed that eyeball abduction angles were proportional to the current and pulse width of the stimulation. With the decaying exponential stimuli of the SCS system, eyeball abductions were 2.58× and 5.65× larger for normal and paralyzed muscles, respectively, compared to the rectangular stimulus of CCS. HFS achieved 0.92× and 0.26× abduction for normal and paralyzed muscles, respectively, with half energy compared to CCS. In addition, the continuous changes in eyeball abduction angle in response to varying stimulation intensity over time were observed.

Closed-Loop Implantable Neurostimulators for Individualized Treatment of Intractable Epilepsy: A Review of Recent Developments, Ongoing Challenges, and Future Opportunities

Driven by its proven therapeutic efficacy in treating movement disorders and psychiatric conditions, neurostimulation has emerged as a promising intervention for intractable epilepsy. Researchers envision an advanced implantable device capable of long-term neuronal monitoring, high spatio-temporal resolution data processing, and timely responsive neurostimulation upon seizure detection. However, the stringent energy constraints of implantable devices and significant inter-patient variability in neural activity pose substantial challenges and opportunities for biomedical circuits and systems researchers. For seizure detection, various ASIC solutions employing both deterministic and data-driven algorithms have been developed. These solutions leverage a subset of numerous signal features (spanning time and frequency domains) and classifiers (such as SVMs, DNNs, SNNs) to achieve notable success in terms of detection accuracy, latency, and energy efficiency. Implementations vary widely in computational approaches (digital, mixed-signal, analog, spike-based), training strategies (online versus offline), and application targets (patient-specific versus cross-patient). In terms of treatment, recent efforts have focused on the personalization of stimulation waveforms to enhance therapeutic efficacy. This personalization faces complex challenges, including a limited understanding of how stimulation parameters influence neuronal activity, the lack of a comprehensive brain model to capture its intricate electrochemical dynamics, and recording neural signals in the presence of stimulation artifacts. This review provides a comprehensive overview of the field, detailing the foundational principles, recent advancements, and ongoing challenges in enhancing the diagnostic accuracy, treatment efficacy, and energy efficiency of implantable patient-optimized neurostimulators. We also discuss potential future directions, emphasizing the need for standardized performance metrics, advanced computational models, and adaptive stimulation protocols to realize the full potential of this transformative technology.

Active Neural Interface Circuits and Systems for Selective Control of Peripheral Nerves: A Review

Interfaces with peripheral nerves have been widely developed to enable bioelectronic control of neural activity. Peripheral nerve neuromodulation shows great potential in addressing motor dysfunctions, neurological disorders, and psychiatric conditions. The integration of high-density neural electrodes with stimulation and recording circuits poses a challenge in the design of neural interfaces. Recent advances in active electrode strategies have achieved improved reliability and performance by implementing in-situ control, stimulation, and recording of neural fibers. This paper presents an overview of state-of-the-art neural interface systems that comprise a range of neural electrodes, neurostimulators, and bio-amplifier circuits, with a special focus on interfaces for the peripheral nerves. A discussion on the efficacy of active electrode systems and recommendations for future directions conclude this paper.

An Energy-Efficient Wireless Power Receiver With One-Step Adiabatic-Bipolar-Supply Generating for Implantable Electrical Stimulation Applications

This paper presents an energy-efficient wireless power receiver for implantable electrical stimulation applications, which can achieve one-step adiabatic bipolar-supply that is generated by a hybrid single-stage dual-output regulating (SSDOR) rectifiers. The structure using only four switches overcomes the disadvantages that the two output voltage values in the traditional dual-output rectifiers are close to each other. A constant-current (CC) controlled adiabatic dynamic voltage scaling (DVS) technique is proposed to minimize the voltage headroom of the stimulating drivers and improve the stimulation efficiency significantly. In addition, the receiver adopts only one general constant on-time (COT) low-frequency control to adjust the stimulation current, reducing both the power consumption and the complexity of the control circuits. The proposed receiver has been fabricated in a 0.18 μm BCD process with ±6 V voltage compliance and 2.5 mA maximum stimulating current. With a current range from ±1.5 mA to ±2.5 mA, the measured maximum average headroom voltage is only 80 mV and the peak total efficiency of the receiver is 85.6 %. The functionalities of the proposed receiver have been successfully verified through in vitro experiments.

A 14-Bit, 12 V-to-100 V Voltage Compliance Electrical Stimulator with Redundant Digital Calibration

Electrical stimulation is an important technique for modulating the functions of the nervous system through electrical stimulus. To implement a more competitive prototype that can tackle the domain-specific difficulties of existing electrical stimulators, three key techniques are proposed in this work. Firstly, a load-adaptive power saving technique called over-voltage detection is implemented to automatically adjust the supply voltage. Secondly, redundant digital calibration (RDC) is proposed to improve current accuracy and ensure safety during long-term electrical stimulation without costing too much circuit area and power. Thirdly, a flexible waveform generator is designed to provide arbitrary stimulus waveforms for particular applications. Measurement results show the stimulator can adjust the supply voltage from 12 V to 100 V automatically, and the measured effective resolution of the stimulation current reaches 14 bits in a full range of 6.5 mA. Without applying charge balancing techniques, the average mismatch between the cathodic and anodic current pulses in biphasic stimulus is 0.0427%. The proposed electrical stimulator can generate arbitrary stimulus waveforms, including sine, triangle, rectangle, etc., and it is supposed to be competitive for implantable and wearable devices.

A 4-Channel Neural Stimulation IC Design With Charge Balancing and Multiple Current Output Modes

This article proposes a neural stimulation integrated circuit design with multiple current output modes. In the cathodic stimulation phase and anodic stimulation phase, each output current waveform can be independently selected to either exponential waveform or square wave, so the stimulator holds four stimulation modes. To minimize the headroom voltage of the output stage and enhance the power efficiency of the proposed stimulator, we introduce the exponentially decaying current which is realized by the exponential current generation circuit in this work. It can enhance the longer duration of the stimulation pulse as well. In case the residual charge may cause harm to patients, a charge balancing technique is implemented in this work for all operation modes. The four-channel stimulator IC is implemented in a 180-nm CMOS process, occupying a core area of 1.93 mm2. The measurement results show that the proposed stimulator realized a maximum power efficiency of 91.3% and the maximum stimulation duration is 3 times larger than previous works. Moreover, even in exponential output waveform mode, the maximum residual charge in a single cycle is only 255 pC due to the proposed charge balancing technique. The experiment results based on the PBS solution also show that the stimulator IC can remove residual charges within 60 μs, and the electrode voltage remains stable within a safe range under multicycle stimulation.

Energy efficiency of pulse shaping in electrical stimulation: the interdependence of biophysical effects and circuit design losses

Power efficiency in electrical stimulator circuits is crucial for developing large-scale multichannel applications like bidirectional brain-computer interfaces and neuroprosthetic devices. Many state-of-the-art papers have suggested that some non-rectangular pulse shapes are more energy-efficient for exciting neural excitation than the conventional rectangular shape. However, additional losses in the stimulator circuit, which arise from employing such pulses, were not considered. In this work, we analyze the total energy efficiency of a stimulation system featuring non-rectangular stimuli, taking into account the losses in the stimulator circuit. To this end, activation current thresholds for different pulse shapes and durations in cortical neurons are modeled, and the energy required to generate the pulses from a constant voltage supply is calculated. The proposed calculation reveals an energy increase of 14-51% for non-rectangular pulses compared to the conventional rectangular stimuli, instead of the decrease claimed in previous literature. This result indicates that a rectangular stimulation pulse is more power-efficient than the tested alternative shapes in large-scale multichannel electrical stimulation systems.

Energy Savings of Multi-Channel Neurostimulators with Non-Rectangular Current-Mode Stimuli Using Multiple Supply Rails

In neuromodulation applications, conventional current mode stimulation is often preferred over its voltage mode equivalent due to its good control of the injected charge. However, it comes at the cost of less energy-efficient output stages. To increase energy efficiency, recent studies have explored non-rectangular stimuli. The current work highlights the importance of an adaptive supply for an output stage with programmable non-rectangular stimuli and accordingly proposes a system-level architecture for multi-channel stimulators. In the proposed architecture, a multi-output DC/DC Converter (DDC) allows each channel to choose among the available supply levels (i.e., DDC outputs) independently and based on its instant voltage/current requirement. A system-level analysis is carried out in Matlab to calculate the possible energy savings of this solution, compared to the conventional approach with a fixed supply. The energy savings have been simulated for a variety of supply levels and waveform amplitudes, suggesting energy savings of up to 83% when employing 6 DDC outputs and the lowest current amplitude explored ( 250 μA), and as high as 26% for a full-scale amplitude (4 mA).

Highly Configurable 100 Channel Recording and Stimulating Integrated Circuit for Biomedical Experiments

This paper presents the design results of a 100-channel integrated circuit dedicated to various biomedical experiments requiring both electrical stimulation and recording ability. The main design motivation was to develop an architecture that would comprise not only the recording and stimulation, but would also block allowing to meet different experimental requirements. Therefore, both the controllability and programmability were prime concerns, as well as the main chip parameters uniformity. The recording stage allows one to set their parameters independently from channel to channel, i.e., the frequency bandwidth can be controlled in the (0.3 Hz-1 kHz)-(20 Hz-3 kHz) (slow signal path) or (0.3 Hz-1 kHz)-4.7 kHz (fast signal path) range, while the voltage gain can be set individually either to 43.5 dB or 52 dB. Importantly, thanks to in-pixel circuitry, main system parameters may be controlled individually allowing to mitigate the circuitry components spread, i.e., lower corner frequency can be tuned in the 54 dB range with approximately 5% precision, and the upper corner frequency spread is only 4.2%, while the voltage gain spread is only 0.62%. The current stimulator may also be controlled in the broad range (69 dB) with its current setting precision being no worse than 2.6%. The recording channels' input-referred noise is equal to 8.5 µVRMS in the 10 Hz-4.7 kHz bandwidth. The single-pixel occupies 0.16 mm2 and consumes 12 µW (recording part) and 22 µW (stimulation blocks).

A Wireless Power and Data Transfer IC for Neural Prostheses Using a Single Inductive Link With Frequency-Splitting Characteristic

This paper presents a frequency-splitting-based wireless power and data transfer IC that simultaneously delivers power and forward data over a single inductive link. For data transmission, frequency-shift keying (FSK) is utilized because the FSK modulation scheme supports continuous wireless power transmission without disruption of the carrier amplitude. Moreover, the link that manifests the frequency-splitting characteristic due to a close distance between coupled coils provides wide bandwidth for data delivery without degrading the quality factors of the coils. It results in large power delivery, high data rate, and high power transfer efficiency. The presented IC fabricated in a 180-nm BCD process simultaneously achieves up-to-115-mW wireless power delivery to the load and 2.5-Mb/s downlink data rate over the single inductive link. The measured overall power efficiency from the DC power supply at the transmitter module to the load at the receiver module reaches 56.7 % at its maximum, and the bit error rate is lower than 10 ^-6 at 2.5 Mb/s. As a result, the figure of merit (FoM) for data transmission is enhanced by 2 times, and the FoM for power delivery is improved by 38.7 times compared to prior state-of-the-arts using a single inductive link.

Directions of Deep Brain Stimulation for Epilepsy and Parkinson's Disease

BACKGROUND

Deep brain stimulation (DBS) is an effective treatment for movement disorders and neurological/psychiatric disorders. DBS has been approved for the control of Parkinson disease (PD) and epilepsy.

OBJECTIVES

A systematic review and possible future direction of DBS system studies is performed in the open loop and closed-loop configuration on PD and epilepsy.

METHODS

We searched Google Scholar database for DBS system and development. DBS search results were categorized into clinical device and research system from the open-loop and closed-loop perspectives.

RESULTS

We performed literature review for DBS on PD and epilepsy in terms of system development by the open loop and closed-loop configuration. This study described development and trends for DBS in terms of electrode, recording, stimulation, and signal processing. The closed-loop DBS system raised a more attention in recent researches.

CONCLUSION

We overviewed development and progress of DBS. Our results suggest that the closed-loop DBS is important for PD and epilepsy.

Design of Dual-Mode Stimulus Chip With Built-In High Voltage Generator for Biomedical Applications

In this work, a dual-mode stimulus chip with a built-in high voltage generator was proposed to offer a broad-range current or voltage stimulus patterns for biomedical applications. With an on-chip and built-in high voltage generator, this stimulus chip could generate the required high voltage supply without additional supply voltage. With a nearly 20 V operating voltage, the overstress and reliability issues of the stimulus circuits were thoroughly considered and carefully addressed in this work. This stimulus system only requires an area of 0.22 mm² per single channel and is fully on-chip implemented without any additional external components. The dual-mode stimulus chip was fabricated in a 0.25-μm 2.5V/5V/12V CMOS (complementary metal-oxide-semiconductor) process, which can generate the biphasic current or voltage stimulus pulses. The current level of stimulus is up to 5 mA, and the voltage level of stimulus can be up to 10 V. Moreover, this chip has been successfully applied to stimulate a guinea pig in an animal experiment. The proposed dual-mode stimulus system has been verified in electrical tests and also demonstrated its stimulation function in animal experiments.

An Energy-Efficient Implantable-Neural-Stimulator System with Wireless Charging and Dynamic Voltage Output

Neural stimulators have become more and more widely used as an effective tool in neural therapies. To address power supply and consumption issues in this application, an energy-efficient Implantable-Neural-Stimulator system composed of a pulse generator and a wireless charger is proposed and implemented in 0.8μm 40V Bipolar-CMOS-DMOS (BCD) process. By adopting a Single Ended Primary Inductor Converter (SEPIC) and optimizing the switching frequency and the gate width of its power MOSFET, the stimulating output voltage range can cover 0~12V with a maximum output ripple of 0.31%. The proposed charger can charge the implantable battery wirelessly by an inductively coupled resonance circuit. In addition, it can adjust the charging voltage to keep it constantly only a little higher than the battery voltage, which reduces the charging headroom voltage and greatly improves the charging efficiency. The measured maximum power efficiencies of these two modules reach as high as 78.04% and 70.67%, respectively.

An Energy-Efficient, Inexpensive, Spinal Cord Stimulator with Adaptive Voltage Compliance for Freely Moving Rats

This paper presents the design and fabrication of an implantable control unit intended for epidural spinal cord stimulation (ESCS) in rats. The device offers full programmability over stimulation parameters and delivers a constant current to an electrode array to be located within the spinal canal. It implements an adaptive voltage compliance in order to reduce the unnecessary power dissipation often experienced in current-controlled stimulation (CCS) devices. The compliance is provided by an adjustable boost converter that offers a voltage output in the range of 6.24 V to 28 V, allowing the device to deliver currents up to 1 mA through loads up to $25 \mathrm {k}\Omega $. The system has been fabricated using discrete components, paving the way to an inexpensive product that can easily be manufactured and batch produced. The control unit occupies a total volume of ~13.5 cm³ and therefore fulfills the size restrictions of a system to be implanted in a rat. Results indicate that by adjusting the voltage compliance a total power efficiency up to 35.5% can be achieved, saving around 60 mW when using lower stimulation currents or operating on smaller impedances. The achieved efficiency is the highest compared to similar stateof-the-art systems.

An Ultra High-Frequency 8-Channel Neurostimulator Circuit With [Formula: see text] Peak Power Efficiency

In order to recruit neurons in excitable tissue, constant current neural stimulators are commonly used. Recently, ultra high-frequency (UHF) stimulation has been proposed and proven to have the same efficacy as constant-current stimulation. UHF stimulation uses a fundamentally different way of activating the tissue: each stimulation phase is made of a burst of current pulses with adjustable amplitude injected into the tissue at a high (e.g., [Formula: see text]) frequency. This paper presents the design, integrated circuit (IC) implementation, and measurement results of a power efficient multichannel UHF neural stimulator. The core of the neurostimulator is based on our previously proposed architecture of an inductor-based buck-boost dc-dc converter without the external output capacitor. The ultimate goal of this work is to increase the power efficiency of the UHF stimulator for multiple-channel operation, while keeping the number of external components minimal. To this end, a number of novel approaches were employed in the integrated circuit design domain. More specifically, a novel zero-current detection scheme is proposed. It allows to remove the freewheel diode typically used in dc-dc converters to prevent current to flow back from the load to the inductor. Furthermore, a gate-driver circuit is implemented which allows the use of thin gate-oxide transistors as high-voltage switches. By doing so, and exploiting the fundamental working principle of the proposed current-controlled UHF stimulator, the need for a high-voltage supply is eliminated and the stimulator is powered up from a [Formula: see text] input voltage. Both the current detection technique and the gate driving circuit of the current implementation allow to boost the power efficiency up to [Formula: see text] when compared to previous UHF stimulator works. A peak power efficiency of [Formula: see text] is achieved, while 8 independent channels with 16 fully configurable electrodes are used. The circuit is implemented in a [Formula: see text] HV process, and the total chip area is [Formula: see text].

Arbitrary-Waveform Electro-Optical Intracranial Neurostimulator With Load-Adaptive High-Voltage Compliance

A hybrid 16-channel current-mode and the 8-channel optical implantable neurostimulating system is presented. The system generates arbitrary-waveform charge-balanced current-mode electrical pulses with an amplitude ranging from 50 [Formula: see text] to 10 mA. An impedance monitoring feedback loop is employed to automatically adjust the supply voltage, yielding a load-optimized power dissipation. The 8-channel optical stimulator drives an array of LEDs, each with a maximum of 25 mA current amplitude, and reuses the arbitrary-waveform generation function of the electrical stimulator. The LEDs are assembled within a custom-made 4×4 ECoG grid electrode array, enabling precise optical stimulation of neurons with a 300 [Formula: see text] pitch between the LEDs and simultaneous monitoring of the neural response by the ECoG electrode, at different distances of the stimulation site. The hybrid stimulation system is implemented on a mini-PCB, and receives power and stimulation commands inductively through a second board and a coil stacked on top of it. The entire system is sized at 3×2 . 5×1 cm³ and weighs 7 grams. The system efficacy for electrical and optical stimulation is validated in-vivo using separate chronic and acute experiments.

Comments on "Compact, Energy-Efficient High-Frequency Switched Capacitor Neural Stimulator With Active Charge Balancing"

This manuscript points out some mistakes in the Introduction and in the table of comparison of a paper already published in this journal by Hsu and Schmid [1]. Although the main claim of [1] is still preserved, we believe the paper needs to be rectified for scientific correctness of the work.

A Fully Integrated RF-Powered Energy-Replenishing Current-Controlled Stimulator

This paper presents a fully-integrated current-controlled stimulator that is powered directly from on-chip coil antenna and achieves adiabatic energy-replenishing operation without any bulky external components. Adiabatic supply voltages, which can reach a differential range of up to 7.2 V, are directly generated from an on-chip 190-MHz resonant LC tank via a self-cascading/folding rectifier network, bypassing the losses that would otherwise be introduced by the 0.8 V system supply-generating rectifier and regulator. The stimulator occupies 0.22 mm ² in a 180 nm silicon-on-insulator process and produces differential currents up to 145  μA. Using a charge replenishing scheme, the stimulator redirects the charges accumulated across the electrodes to the system power supplies for 63.1% of stimulation energy recycling. To benchmark the efficiency of stimulation, a figure of merit termed the stimulator efficiency factor (SEF) is introduced. The adiabatic power rails and energy replenishment scheme enabled our stimulator to achieve an SEF of 6.0.

A 430-MHz Wirelessly Powered Implantable Pulse Generator With Intensity/Rate Control and Sub-1 μA Quiescent Current Consumption

This work presents a miniaturized μW-level implantable pulse generator (IPG) inductively powered at 430 MHz. Notches are intentionally applied to the incident power, which are replicated to precisely control the timing of the output pulses. Fabricated in a 180-nm CMOS process, the concise circuitry occupies a pad-included footprint of 850 μm × 450 μm and achieves a quiescent current consumption of 950 nA. To reduce the form factor, 401-457 MHz MedRadio-band is utilized to realize the induction link. The finalized assembly achieves one of the smallest dimensions (4.6 mm × 7.0 mm) for near-field IPGs with the Rx coil size of 4.5 mm × 3.6 mm. Codesign of the rectifier and Rx coil accommodates the possible resonant frequency drifts in biological tissues. In the benchtop measurement, a 430-MHz Tx coil is demonstrated to operate the IPG at 4.5 and 4 cm proximities in the air and through water, respectively. An in vivo experiment has been performed, in which the IPG was implanted on the hindlimb muscle belly of an anesthetized rat with the connective tissue and skin sutured. The electrical stimuli induced the isolated ankle flexion at specific strengths and rates, and the experiment complies with the specific absorption rate regulations. This work shows the potential for applications requiring stringent form factors and high sensitivities.

A Multichannel High-Frequency Power-Isolated Neural Stimulator With Crosstalk Reduction

In neuroprostheses applications requiring simultaneous stimulations on a multielectrode array, electric crosstalk, the spatial interaction between electric fields from various electrodes is a major limitation to the performance of multichannel stimulation. This paper presents a multichannel stimulator design that combines high-frequency current stimulation (using biphasic charge-balanced chopped pulse profile) with a switched-capacitor power isolation method. The approach minimizes crosstalk and is particularly suitable for fully integrated realization. A stimulator fabricated in a 0.6 μm CMOS high-voltage technology is presented. It is used to implement a multichannel, high-frequency, power-isolated stimulator. Crosstalk reduction is demonstrated with electrodes in physiological media while the efficacy of the high-frequency stimulator chip is proven in vivo. The stimulator provides fully independent operation on multiple channels and full flexibility in the design of neural modulation protocols.

A mm-Sized Wireless Implantable Device for Electrical Stimulation of Peripheral Nerves

A wireless electrical stimulation implant for peripheral nerves, achieving >10× improvement over state of the art in the depth/volume figure of merit, is presented. The fully integrated implant measures just 2 mm × 3 mm × 6.5 mm (39 mm³, 78 mg), and operates at a large depth of 10.5 cm in a tissue phantom. The implant is powered using ultrasound and includes a miniaturized piezoelectric receiver (piezo), an IC designed in 180 nm HV BCD process, an off-chip energy storage capacitor, and platinum stimulation electrodes. The package also includes an optional blue light-emitting diode for potential applications in optogenetic stimulation in the future. A system-level design strategy for complete operation of the implant during the charging transient of the storage capacitor, as well as a unique downlink command/data transfer protocol, is presented. The implant enables externally programmable current-controlled stimulation of peripheral nerves, with a wide range of stimulation parameters, both for electrical (22 to 5000 μA amplitude, ∼14 to 470 μs pulse-width, 0 to 60 Hz repetition rate) and optical (up to 23 mW/mm² optical intensity) stimulation. Additionally, the implant achieves 15 V compliance voltage for chronic applications. Full integration of the implant components, end-to-end in vitro system characterizations, and results for the electrical stimulation of a sciatic nerve, demonstrate the feasibility and efficacy of the proposed stimulator for peripheral nerves.

A Digitally Dynamic Power Supply Technique for 16-Channel 12 V-Tolerant Stimulator Realized in a 0.18- μm 1.8-V/3.3-V Low-Voltage CMOS Process

A new digitally dynamic power supply technique for 16-channel 12-V-tolerant stimulator is proposed and realized in a 0.18-μm 1.8-V/3.3-V CMOS process. The proposed stimulator uses four stacked transistors as the pull-down switch and pull-up switch to withstand 4 times the nominal supply voltage (4 × V _DD). With the dc input voltage of 3.3 V, the regulated three-stage charge pump, which is capable of providing 11.3-V voltage at 3-mA loading current, achieves dc conversion efficiency of up to 69% with 400-pF integrated capacitance. Power consumption is reduced by implementing the regulated charge pump to provide a dynamic dc output voltage with a 0.5-V step. The proposed digitally dynamic power supply technique, which is implemented by using a p-type metal oxide semiconductor (PMOS) inverter with pull-down current source and digital controller, greatly improves the power efficiency of a system. The silicon area of the stimulator is approximately 3.5 mm² for a 16-channel implementation. The functionalities of the proposed stimulator have been successfully verified through animal test.

Stimulation Efficiency With Decaying Exponential Waveforms in a Wirelessly Powered Switched-Capacitor Discharge Stimulation System

The purpose of this study was to test the feasibility of using a switched-capacitor discharge stimulation (SCDS) system for electrical stimulation, and, subsequently, determine the overall energy saved compared to a conventional stimulator. We have constructed a computational model by pairing an image-based volume conductor model of the cat head with cable models of corticospinal tract (CST) axons and quantified the theoretical stimulation efficiency of rectangular and decaying exponential waveforms, produced by conventional and SCDS systems, respectively. Subsequently, the model predictions were tested in vivo by activating axons in the posterior internal capsule and recording evoked electromyography (EMG) in the contralateral upper arm muscles. Compared to rectangular waveforms, decaying exponential waveforms with time constants >500 μs were predicted to require 2%-4% less stimulus energy to activate directly models of CST axons and 0.4%-2% less stimulus energy to evoke EMG activity in vivo. Using the calculated wireless input energy of the stimulation system and the measured stimulus energies required to evoke EMG activity, we predict that an SCDS implantable pulse generator (IPG) will require 40% less input energy than a conventional IPG to activate target neural elements. A wireless SCDS IPG that is more energy efficient than a conventional IPG will reduce the size of an implant, require that less wireless energy be transmitted through the skin, and extend the lifetime of the battery in the external power transmitter.

16-Channel biphasic current-mode programmable charge balanced neural stimulation

BACKGROUND

Neural stimulation is an important method used to activate or inhibit action potentials of the neuronal anatomical targets found in the brain, central nerve and peripheral nerve. The neural stimulator system produces biphasic pulses that deliver balanced charge into tissue from single or multichannel electrodes. The timing and amplitude of these biphasic pulses are precisely controlled by the neural stimulator software or imbedded algorithms. Amplitude mismatch between the anodic current and cathodic current of the biphasic pulse will cause permanently damage for the neural tissues. The main goal of our circuit and layout design is to implement a 16-channel biphasic current mode programmable neural stimulator with calibration to minimize the current mismatch caused by inherent complementary metal oxide semiconductor (CMOS) manufacturing processes.

METHODS

This paper presents a 16-channel constant current mode neural stimulator chip. Each channel consists of a 7-bit controllable current DAC used as sink and source current driver. To reduce the LSB quantization error and the current mismatch, an automatic calibration circuit and flow diagram is presented in this paper. There are two modes of operation of the stimulator chip-namely, stimulation mode and calibration mode. The chip also includes a digital interface used to control the stimulator parameters and calibration levels specific for each individual channel.

RESULTS

This stimulator Application Specific Integrated Circuit (ASIC) is designed and fabricated in a 0.18 μm High-Voltage CMOS technology that allows for ±20 V power supply. The full-scale stimulation current was designed to be at 1 mA per channel. The output current was shown to be constant throughout the timing cycles over a wide range of electrode load impedances. The calibration circuit was also designed to reduce the effect of CMOS process variation of the P-channel metal oxide semiconductor (PMOS) and N-channel metal oxide semiconductor (NMOS) devices that will result in charge delivery to have less than 0.13% error.

CONCLUSIONS

A 16-channel integrated biphasic neural stimulator chip with calibration is presented in this paper. The stimulator circuit design was simulated and the chip layout was completed. The chip layout was verified using design rules check (DRC) and layout versus schematic (LVS) design check using computer aided design (CAD) software. The test results we presented show constant current stimulation with charge balance error within 0.13% least-significant-bit (LSB). This LSB error was consistent throughout a variety stimulation patterns and electrode load impedances.

Compact, Energy-Efficient High-Frequency Switched Capacitor Neural Stimulator With Active Charge Balancing

Safety and energy efficiency are two major concerns for implantable neural stimulators. This paper presents a novel high-frequency, switched capacitor (HFSC) stimulation and active charge balancing scheme, which achieves high energy efficiency and well-controlled stimulation charge in the presence of large electrode impedance variations. Furthermore, the HFSC can be implemented in a compact size without any external component to simultaneously enable multichannel stimulation by deploying multiple stimulators. The theoretical analysis shows significant benefits over the constant-current and voltage-mode stimulation methods. The proposed solution was fabricated using a 0.18 μm high-voltage technology, and occupies only 0.035 mm² for a single stimulator. The measurement result shows 50% peak energy efficiency and confirms the effectiveness of active charge balancing to prevent the electrode dissolution.

An integrated interface for peripheral neural system recording and stimulation: system design, electrical tests and in-vivo results

The prototype of an electronic bi-directional interface between the Peripheral Nervous System (PNS) and a neuro-controlled hand prosthesis is presented. The system is composed of 2 integrated circuits: a standard CMOS device for neural recording and a HVCMOS device for neural stimulation. The integrated circuits have been realized in 2 different 0.35μ m CMOS processes available from ams. The complete system incorporates 8 channels each including the analog front-end, the A/D conversion, based on a sigma delta architecture and a programmable stimulation module implemented as a 5-bit current DAC; two voltage boosters supply the output stimulation stage with a programmable voltage scalable up to 17V. Successful in-vivo experiments with rats having a TIME electrode implanted in the sciatic nerve were carried out, showing the capability of recording neural signals in the tens of microvolts, with a global noise of 7μ V r m s , and to selectively elicit the tibial and plantar muscles using different active sites of the electrode.

Fully-implantable, multi-channel, microstimulator with tracking supply ribbon and energy recovery

This paper proposes a novel energy-efficient approach dedicated to high-density implantable stimulators such as visual prostheses. Energy efficiency of the approach proposed in this work is achieved through two ideas: the `tracking supply ribbon' technique, and `reverse charge pumping'. The proposed approach is implemented, in the multichannel case, in such a way that power efficiency of each stimulation channel is enhanced according to its specific voltage/current condition and independently from other channels. Based on the proposed approach, a 16-channel stimulation backend for a visual prosthesis was designed and simulated in the transistor level in a low-voltage 0.18μm triple-well CMOS technology, occupying 1 mm2 of silicon area. According to post-layout simulation results, power savings of up to 74.9% are achieved compared to the conventional output stage with a constant supply voltage.

A 0.04 mm (2) Buck-Boost DC-DC Converter for Biomedical Implants Using Adaptive Gain and Discrete Frequency Scaling Control

This paper presents the design of a reconfigurable buck-boost switched-capacitor DC-DC converter suitable for use in a wide range of biomedical implants. The proposed converter has an extremely small footprint and uses a novel control method that allows coarse and fine control of the output voltage. The converter uses adaptive gain control, discrete frequency scaling and pulse-skipping schemes to regulate the power delivered to a range of output voltages and loads. Adaptive gain control is used to implement variable switching gain ratios from a reconfigurable power stage and thereby make coarse steps in output voltage. A discrete frequency scaling controller makes discrete changes in switching frequency to vary the power delivered to the load and perform fine tuning when the output voltage is within 10% of the target output voltage. The control architecture is predominately digital and it has been implemented as part of a fully-integrated switched-capacitor converter design using a standard bulk CMOS 0.18 μm process. Measured results show that the converter has an output voltage range of 1.0 to 2.2 V, can deliver up to 7.5 mW of load power and efficiency up to 75% using an active area of only 0.04 mm (2), which is significantly smaller than that of other designs. This low-area, low-complexity reconfigurable power converter can support low-power circuits in biomedical implant applications.

A Power-Efficient Multichannel Neural Stimulator Using High-Frequency Pulsed Excitation From an Unfiltered Dynamic Supply

This paper presents a neural stimulator system that employs a fundamentally different way of stimulating neural tissue compared to classical constant current stimulation. A stimulation pulse is composed of a sequence of current pulses injected at a frequency of 1 MHz for which the duty cycle is used to control the stimulation intensity. The system features 8 independent channels that connect to any of the 16 electrodes at the output. A sophisticated control system allows for individual control of each channel's stimulation and timing parameters. This flexibility makes the system suitable for complex electrode configurations and current steering applications. Simultaneous multichannel stimulation is implemented using a high frequency alternating technique, which reduces the amount of electrode switches by a factor 8. The system has the advantage of requiring a single inductor as its only external component. Furthermore it offers a high power efficiency, which is nearly independent on both the voltage over the load as well as on the number of simultaneously operated channels. Measurements confirm this: in multichannel mode the power efficiency can be increased for specific cases to 40% compared to 20% that is achieved by state-of-the-art classical constant current stimulators with adaptive power supply.

A figure of merit for neural electrical stimulation circuits

Electrical stimulators are widely used in neuro-prostheses. Many different implementations exist. However, no quantitative ranking criterion is available to allow meaningful comparison of the various stimulation circuits and systems to aid the designer. This paper presents a novel Figure of Merit (FOM) dedicated to stimulation circuits and systems. The proposed optimization performance metric takes into account tissue safety conditions and energy efficiency which can be evaluated by measurement. The FOM is used to rank several stimulator circuits and systems.

VLSI circuits for bidirectional interface to peripheral and visceral nerves

This paper presents an architecture for sensing nerve signals and delivering functional electrical stimulation to peripheral and visceral nerves. The design is based on the very large scale integration (VLSI) technology and amenable to interface to microelectrodes and building a fully implantable system. The proposed stimulator was tested on the vagus nerve and is under further evaluation and testing of various visceral nerves and their functional effects on the innervated organs.

High frequency switched-mode stimulation can evoke post synaptic responses in cerebellar principal neurons

This paper investigates the efficacy of high frequency switched-mode neural stimulation. Instead of using a constant stimulation amplitude, the stimulus is switched on and off repeatedly with a high frequency (up to 100 kHz) duty cycled signal. By means of tissue modeling that includes the dynamic properties of both the tissue material as well as the axon membrane, it is first shown that switched-mode stimulation depolarizes the cell membrane in a similar way as classical constant amplitude stimulation. These findings are subsequently verified using in vitro experiments in which the response of a Purkinje cell is measured due to a stimulation signal in the molecular layer of the cerebellum of a mouse. For this purpose a stimulator circuit is developed that is able to produce a monophasic high frequency switched-mode stimulation signal. The results confirm the modeling by showing that switched-mode stimulation is able to induce similar responses in the Purkinje cell as classical stimulation using a constant current source. This conclusion opens up possibilities for novel stimulation designs that can improve the performance of the stimulator circuitry. Care has to be taken to avoid losses in the system due to the higher operating frequency.

320-channel active probe for high-resolution neuromonitoring and responsive neurostimulation

We present a 320-channel active probe for high-spatial-resolution neuromonitoring and responsive neurostimulation. The probe comprises an integrated circuit (IC) cell array bonded to the back side of a pitch-matched microelectrode array. The IC enables up to 256-site neural recording and 64-site neural stimulation at the spatial resolution of 400 μ m and 200 μ m, respectively. It is suitable for direct integration with electrode arrays with the shank pitch of integer multiples of 200 μm. In the presented configuration, the IC is bonded with a 8 × 8 400 μ m-pitch Utah electrode array (UEA) and up to additional 192 recording channels are used for peripheral neuromonitoring. The 0.35 μ m CMOS circuit array has a total die size of 3.5 mm × 3.65 mm. Each stimulator channel employs a current memory for simultaneous multi-site neurostimulation, outputs 20 μA-250 μA square or arbitrary waveform current, occupies 0.02 mm (2), and dissipates 2.76 μ W quiescent power. Each fully differential recording channel has two stages of amplification and filtering and an 8-bit single-slope ADC, occupies 0.035 mm (2) , and consumes 51.9 μ W. The neural probe has been experimentally validated in epileptic seizure propagation studies in a mouse hippocampal slice in vitro and in responsive neurostimulation for seizure suppression in an acute epilepsy rat model in vivo .

A 6 μW per channel analog biomimetic cochlear implant processor filterbank architecture with across channels AGC

A new analog cochlear implant processor filterbank architecture of increased biofidelity, enhanced across-channel contrast and very low power consumption has been designed and prototyped. Each channel implements a biomimetic, asymmetric bandpass-like One-Zero-Gammatone-Filter (OZGF) transfer function, using class-AB log-domain techniques. Each channel's quality factor and suppression are controlled by means of a new low power Automatic Gain Control (AGC) scheme which is coupled across the neighboring channels and emulates lateral inhibition (LI) phenomena in the auditory system. Detailed measurements from a five-channel silicon IC prototype fabricated in a 0.35 μm AMS technology confirm the operation of the coupled AGC scheme and its ability to enhance contrast among channel outputs. The prototype is characterized by an input dynamic range of 92 dB while consuming only 28 μW of power in total ( ∼ 6 μW per channel) under a 1.8 V power supply. The architecture is well-suited for fully-implantable cochlear implants.

Advances in Microelectronics for Implantable Medical Devices

Implantable medical devices provide therapy to treat numerous health conditions as well as monitoring and diagnosis. Over the years, the development of these devices has seen remarkable progress thanks to tremendous advances in microelectronics, electrode technology, packaging and signal processing techniques. Many of today’s implantable devices use wireless technology to supply power and provide communication. There are many challenges when creating an implantable device. Issues such as reliable and fast bidirectional data communication, efficient power delivery to the implantable circuits, low noise and low power for the recording part of the system, and delivery of safe stimulation to avoid tissue and electrode damage are some of the challenges faced by the microelectronics circuit designer. This paper provides a review of advances in microelectronics over the last decade or so for implantable medical devices and systems. The focus is on neural recording and stimulation circuits suitable for fabrication in modern silicon process technologies and biotelemetry methods for power and data transfer, with particular emphasis on methods employing radio frequency inductive coupling. The paper concludes by highlighting some of the issues that will drive future research in the field.

A Power-Efficient Wireless System With Adaptive Supply Control for Deep Brain Stimulation

A power-efficient wireless stimulating system for a head-mounted deep brain stimulator (DBS) is presented. A new adaptive rectifier generates a variable DC supply voltage from a constant AC power carrier utilizing phase control feedback, while achieving high AC-DC power conversion efficiency (PCE) through active synchronous switching. A current-controlled stimulator adopts closed-loop supply control to automatically adjust the stimulation compliance voltage by detecting stimulation site potentials through a voltage readout channel, and improve the stimulation efficiency. The stimulator also utilizes closed-loop active charge balancing to maintain the residual charge at each site within a safe limit, while receiving the stimulation parameters wirelessly from the amplitude-shift-keyed power carrier. A 4-ch wireless stimulating system prototype was fabricated in a 0.5-μm 3M2P standard CMOS process, occupying 2.25 mm². With 5 V peak AC input at 2 MHz, the adaptive rectifier provides an adjustable DC output between 2.5 V and 4.6 V at 2.8 mA loading, resulting in measured PCE of 72 ~ 87%. The adaptive supply control increases the stimulation efficiency up to 30% higher than a fixed supply voltage to 58 ~ 68%. The prototype wireless stimulating system was verified in vitro.

Direct inductive stimulation for energy-efficient wireless neural interfaces

Advanced neural stimulator designs consume power and produce unwanted thermal effects that risk damage to surrounding tissue. In this work, we present a simplified architecture for wireless neural stimulators that relies on a few circuit components including an inductor, capacitor and a diode to elicit an action potential in neurons. The feasibility of the design is supported with analytical models of the inductive link, electrode, electrolyte, membrane and channels of neurons. Finally, a flexible implantable prototype of the design is fabricated and tested in vitro on neural tissue.

A zero-voltage switching technique for minimizing the current-source power of implanted stimulators

The current-source power of an implanted stimulator is reduced almost to the theoretical minimum by driving the electrodes directly from the secondary port of the inductive link with a dedicated zero-voltage switching power supply. A feedback loop confined to the secondary of the inductive link adjusts the timing and conduction angle of switching to provide just the right amount of supply voltage needed for keeping the current-source voltage constant at or slightly above the compliance limit. Since drive is based on current rather than voltage, and supply-voltage update is near real-time, the quality of the current pulses is high regardless of how the electrode impedance evolves during stimulation. By scaling the switching frequency according to power demand, the technique further improves overall power consumption of the stimulator. The technique is implemented with a very simple control circuitry comprising a comparator, a Schmitt trigger and a logic gate of seven devices in addition to an on-chip switch and an off-chip capacitor. The power consumed by the proposed supply circuit itself is no larger than what the linear regulator of a conventional supply typically consumes for the same stimulation current. Still, the sum of supply and current-source power is typically between 20% and 75% of the conventional source power alone. Functionality of the proposed driver is verified experimentally on a proof-of-concept prototype built with 3.3 V devices in a 0.18 μm CMOS technology.

An energy-efficient, dynamic voltage scaling neural stimulator for a proprioceptive prosthesis

This paper presents an 8 channel energy-efficient neural stimulator for generating charge-balanced asymmetric pulses. Power consumption is reduced by implementing a fully-integrated DC-DC converter that uses a reconfigurable switched capacitor topology to provide 4 output voltages for Dynamic Voltage Scaling (DVS). DC conversion efficiencies of up to 82% are achieved using integrated capacitances of under 1 nF and the DVS approach offers power savings of up to 50% compared to the front end of a typical current controlled neural stimulator. A novel charge balancing method is implemented which has a low level of accuracy on a single pulse and a much higher accuracy over a series of pulses. The method used is robust to process and component variation and does not require any initial or ongoing calibration. Measured results indicate that the charge imbalance is typically between 0.05%-0.15% of charge injected for a series of pulses. Ex-vivo experiments demonstrate the viability in using this circuit for neural activation. The circuit has been implemented in a commercially-available 0.18 μm HV CMOS technology and occupies a core die area of approximately 2.8 mm(2) for an 8 channel implementation.

Efficient universal computing architectures for decoding neural activity

The ability to decode neural activity into meaningful control signals for prosthetic devices is critical to the development of clinically useful brain– machine interfaces (BMIs). Such systems require input from tens to hundreds of brain-implanted recording electrodes in order to deliver robust and accurate performance; in serving that primary function they should also minimize power dissipation in order to avoid damaging neural tissue; and they should transmit data wirelessly in order to minimize the risk of infection associated with chronic, transcutaneous implants. Electronic architectures for brain– machine interfaces must therefore minimize size and power consumption, while maximizing the ability to compress data to be transmitted over limited-bandwidth wireless channels. Here we present a system of extremely low computational complexity, designed for real-time decoding of neural signals, and suited for highly scalable implantable systems. Our programmable architecture is an explicit implementation of a universal computing machine emulating the dynamics of a network of integrate-and-fire neurons; it requires no arithmetic operations except for counting, and decodes neural signals using only computationally inexpensive logic operations. The simplicity of this architecture does not compromise its ability to compress raw neural data by factors greater than . We describe a set of decoding algorithms based on this computational architecture, one designed to operate within an implanted system, minimizing its power consumption and data transmission bandwidth; and a complementary set of algorithms for learning, programming the decoder, and postprocessing the decoded output, designed to operate in an external, nonimplanted unit. The implementation of the implantable portion is estimated to require fewer than 5000 operations per second. A proof-of-concept, 32-channel field-programmable gate array (FPGA) implementation of this portion is consequently energy efficient. We validate the performance of our overall system by decoding electrophysiologic data from a behaving rodent.