Metal-Insulator-Metal Single Electron Transistors with Tunnel Barriers Prepared by Atomic Layer Deposition

Exceptional Microscale Plasticity in Amorphous Aluminum Oxide at Room Temperature

Oxide glasses are an elementary group of materials in modern society, but brittleness limits their wider usability at room temperature. As an exception to the rule, amorphous aluminum oxide (a-Al2 O3 ) is a rare diatomic glassy material exhibiting significant nanoscale plasticity at room temperature. Here, it is shown experimentally that the room temperature plasticity of a-Al2 O3 extends to the microscale and high strain rates using in situ micropillar compression. All tested a-Al2 O3 micropillars deform without fracture at up to 50% strain via a combined mechanism of viscous creep and shear band slip propagation. Large-scale molecular dynamics simulations align with the main experimental observations and verify the plasticity mechanism at the atomic scale. The experimental strain rates reach magnitudes typical for impact loading scenarios, such as hammer forging, with strain rates up to the order of 1 000 s-1 , and the total a-Al2 O3 sample volume exhibiting significant low-temperature plasticity without fracture is expanded by 5 orders of magnitude from previous observations. The discovery is consistent with the theoretical prediction that the plasticity observed in a-Al2 O3 can extend to macroscopic bulk scale and suggests that amorphous oxides show significant potential to be used as light, high-strength, and damage-tolerant engineering materials.

Expanding the Set of Three-Input Logic Functions in Inverted T-Shaped TFETs

Three-input logic primitives show high efficiency in logic synthesis compared to traditional two-input logic, which encourages researchers to implement three-input logic gates with emerging nanotechnologies. This paper demonstrates a compact implementation of three-input monotone logic gates based on the inverted T-shaped TFET. Firstly, based on the gate coupling mechanism in the novel inverted T channel, the BTBT current can be suppressed in the vertical or horizontal region to achieve the channel strobe. Therefore, the typical three-input monotone logic functions, Majority, OrAnd, and AndOr, are successfully implemented on a single transistor. Then, a simplified potential model describing gate coupling is established to describe the impact of key device parameters on the logic behavior. Combined with TCAD simulation, the design rules of devices with different logic functions are given. Finally, a series of three-input monotonic logic gates are designed and verified. The results show that the use of the proposed TFETs can effectively save the number of transistors in the three-input logic gate, which indicates that the three-input TFET is a compact and flexible candidate for three-input logic gates.