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Shim SK, Jang YH, Han J, Jeon JW, Shin DH, Kim YR, Han JK, Woo KS, Lee SH, Cheong S, Kim J, Seo H, Shin J, Hwang CS. 2Memristor-1Capacitor Integrated Temporal Kernel for High-Dimensional Data Mapping. SMALL (WEINHEIM AN DER BERGSTRASSE, GERMANY) 2024:e2306585. [PMID: 38212281 DOI: 10.1002/smll.202306585] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 08/02/2023] [Revised: 12/01/2023] [Indexed: 01/13/2024]
Abstract
Compact but precise feature-extracting ability is core to processing complex computational tasks in neuromorphic hardware. Physical reservoir computing (RC) offers a robust framework to map temporal data into a high-dimensional space using the time dynamics of a material system, such as a volatile memristor. However, conventional physical RC systems have limited dynamics for the given material properties, restricting the methods to increase their dimensionality. This study proposes an integrated temporal kernel composed of a 2-memristor and 1-capacitor (2M1C) using a W/HfO2 /TiN memristor and TiN/ZrO2 /Al2 O3 /ZrO2 /TiN capacitor to achieve higher dimensionality and tunable dynamics. The kernel elements are carefully designed and fabricated into an integrated array, of which performances are evaluated under diverse conditions. By optimizing the time dynamics of the 2M1C kernel, each memristor simultaneously extracts complementary information from input signals. The MNIST benchmark digit classification task achieves a high accuracy of 94.3% with a (196×10) single-layer network. Analog input mapping ability is tested with a Mackey-Glass time series prediction, and the system records a normalized root mean square error of 0.04 with a 20×1 readout network, the smallest readout network ever used for Mackey-Glass prediction in RC. These performances demonstrate its high potential for efficient temporal data analysis.
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Affiliation(s)
- Sung Keun Shim
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Yoon Ho Jang
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Janguk Han
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Jeong Woo Jeon
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Dong Hoon Shin
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Yeong Rok Kim
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Joon-Kyu Han
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Kyung Seok Woo
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Soo Hyung Lee
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Sunwoo Cheong
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Jaehyun Kim
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Haengha Seo
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Jonghoon Shin
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Cheol Seong Hwang
- Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
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Ostrovskii V, Fedoseev P, Bobrova Y, Butusov D. Structural and Parametric Identification of Knowm Memristors. NANOMATERIALS (BASEL, SWITZERLAND) 2021; 12:63. [PMID: 35010013 PMCID: PMC8746671 DOI: 10.3390/nano12010063] [Citation(s) in RCA: 7] [Impact Index Per Article: 2.3] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Download PDF] [Figures] [Subscribe] [Scholar Register] [Received: 11/29/2021] [Revised: 12/23/2021] [Accepted: 12/25/2021] [Indexed: 11/16/2022]
Abstract
This paper proposes a novel identification method for memristive devices using Knowm memristors as an example. The suggested identification method is presented as a generalized process for a wide range of memristive elements. An experimental setup was created to obtain a set of intrinsic I-V curves for Knowm memristors. Using the acquired measurements data and proposed identification technique, we developed a new mathematical model that considers low-current effects and cycle-to-cycle variability. The process of parametric identification for the proposed model is described. The obtained memristor model represents the switching threshold as a function of the state variables vector, making it possible to account for snapforward or snapback effects, frequency properties, and switching variability. Several tools for the visual presentation of the identification results are considered, and some limitations of the proposed model are discussed.
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Affiliation(s)
- Valerii Ostrovskii
- Department of Computer-Aided Design, St. Petersburg Electrotechnical University “LETI”, 197376 Saint Petersburg, Russia;
| | - Petr Fedoseev
- Department of Computer-Aided Design, St. Petersburg Electrotechnical University “LETI”, 197376 Saint Petersburg, Russia;
| | - Yulia Bobrova
- Department of Biomedical Engineering, St. Petersburg Electrotechnical University “LETI”, 197376 Saint Petersburg, Russia;
| | - Denis Butusov
- Youth Research Institute, Saint Petersburg Electrotechnical University “LETI”, 197376 Saint Petersburg, Russia
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Abstract
Different from the static (power-off) nonvolatile property of a memristor, the history erase effect of a memristor is a dynamic characteristic, which means that under the excitation of switching or different signals, the memristor can forget its initial value and reach a unique stable state. The stable state is determined only by the excitation signal and has nothing to do with its initial state. The history erase effect is a desired effect in memristor applications such as memory. It can simplify the complexity of the writing circuit and improve the storage speed. If the memristor’s response depends on the initial state, a state reset operation is required before each writing operation. Therefore, it is of great theoretical and practical significance to judge whether the memristor has a history erase effect. Based on the study of the history erase effect of real memristors, this paper focuses on the history erase effect of a Hewlett-Packard (HP) TiO2 memristor and the Self-Directed Channel (SDC) memristor of Knowm Company. The DC and AC responses of the HP TiO2 memristor are given, and it is pointed out that there is no AC history erase effect. However, considering the parasitic memcapacitance effect, it is found that it has the effect. Based on the theoretical model of the SDC memristor, its history erase properties with and without considering parasitic effects are studied. It should be noted that this study method can be useful for other materials such as Al2O3 and MoS2.
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