A High-Temperature, Low-Noise Readout ASIC for MEMS-Based Accelerometers

An 8.72 µW Low-Noise and Wide Bandwidth FEE Design for High-Throughput Pixel-Strip (PS) Sensors

The front-end electronics (FEE) of the Compact Muon Solenoid (CMS) is needed very low power consumption and higher readout bandwidth to match the low power requirement of its Short Strip application-specific integrated circuits (ASIC) (SSA) and to handle a large number of pileup events in the High-Luminosity Large Hadron Collider (LHC). A low-noise, wide bandwidth, and ultra-low power FEE for the pixel-strip sensor of the CMS has been designed and simulated in a 0.35 µm Complementary Metal Oxide Semiconductor (CMOS) process. The design comprises a Charge Sensitive Amplifier (CSA) and a fast Capacitor-Resistor-Resistor-Capacitor (CR-RC) pulse shaper (PS). A compact structure of the CSA circuit has been analyzed and designed for high throughput purposes. Analytical calculations were performed to achieve at least 998 MHz gain bandwidth, and then overcome pileup issue in the High-Luminosity LHC. The spice simulations prove that the circuit can achieve 88 dB dc-gain while exhibiting up to 1 GHz gain-bandwidth product (GBP). The stability of the design was guaranteed with an 82-degree phase margin while 214 ns optimal shaping time was extracted for low-power purposes. The robustness of the design against radiations was performed and the amplitude resolution of the proposed front-end was controlled at 1.87% FWHM (full width half maximum). The circuit has been designed to handle up to 280 fC input charge pulses with 2 pF maximum sensor capacitance. In good agreement with the analytical calculations, simulations outcomes were validated by post-layout simulations results, which provided a baseline gain of 546.56 mV/MeV and 920.66 mV/MeV, respectively, for the CSA and the shaping module while the ENC (Equivalent Noise Charge) of the device was controlled at 37.6 e⁻ at 0 pF with a noise slope of 16.32 e⁻/pF. Moreover, the proposed circuit dissipates very low power which is only 8.72 µW from a 3.3 V supply and the compact layout occupied just 0.0205 mm² die area.

Fabrication and Characterization of Roll-to-Roll-Coated Cantilever-Structured Touch Sensors

It is common in the field of printed electronics that polydimethylsiloxane (PDMS) be used as a dielectric layer for capacitive sensors because of its high elasticity and restoration force. However, capacitive sensors with the PDMS dielectric layer have a lower sensitivity than those with an air-gap structure that has been fabricated by the conventional micro-electromechanical system (MEMS) process. This paper presents a productive method for fabricating air-gap structures for touch sensors by roll-to-roll slot-die coating. The air-gap is formed by coating and removing a sacrificial layer. Cantilever-structured capacitive touch sensors with an air-gap are fabricated as follows: First, the bottom electrode, the dielectric layer, and the poly(vinyl alcohol) (PVA) sacrificial layer are roll-to-roll slot-die-coated on a flexible substrate. In addition, the spacer layer is spin-coated. On the sacrificial and spacer layers, the top electrode and structural layer are formed by spin-coating. Then, the air-gap and cantilever structure are made by removing the sacrificial layer in water. The cantilever-structured sensor samples are examined in terms of sensitivity, hysteresis, and repeatability. In particular, the electrical performance of the samples is compared to those with the PDMS dielectric layer. Experimental results show that the cantilever-structured sensor samples have significantly higher sensitivity compared to those with the PDMS dielectric layer.