Ferroelectric transistors with nanowire channel: toward nonvolatile memory applications

Room-Temperature Ferroelectric Epitaxial Nanowire Arrays with Photoluminescence

The development of large-scale, high-quality ferroelectric semiconductor nanowire arrays with interesting light-emitting properties can address limitations in traditional wide-bandgap ferroelectrics, thus serving as building blocks for innovative device architectures and next-generation high-density optoelectronics. Here, we investigate the optical properties of ferroelectric CsGeX3 (X = Br, I) halide perovskite nanowires that are epitaxially grown on muscovite mica substrates by vapor phase deposition. Detailed structural characterizations reveal an incommensurate heteroepitaxial relationship with the mica substrate. Furthermore, photoluminescence that can be tuned from yellow-green to red emissions by varying the halide composition demonstrates that these nanowire networks can serve as platforms for future optoelectronic applications. In addition, the room-temperature ferroelectricity and ferroelectric domain structures of these nanowires are characterized using second harmonic generation (SHG) polarimetry. The combination of room-temperature ferroelectricity with photoluminescence in these nanowire arrays unlocks new avenues for the design of novel multifunctional materials.

Current density-induced emergence of soft and hard magnetic phases in Fe nanowire arrays

The capability of generating magnetically soft and hard phases in a material is important in many aspects, ranging from basic science to applications. Here, the emergence of soft and hard magnetic phases is reported in Fe nanowire (NW) arrays with a diameter of 35 nm fabricated by using a pulsed electrochemical deposition method in porous aluminum oxide templates under different current density (C_d) values in the range of 25-100 mA cm^-2. The variation ofC_dinfluences the grain size, crystallinity, electrodeposition efficiency and length of the Fe NWs, as characterized by x-ray diffraction, high-resolution transmission electron microscopy, vibrating sample magnetometry and field-emission scanning electron microscopy. IncreasingC_dfrom 25 to 80 mA cm^-2results in a significant decrease in coercivity and squareness from 1590 to 900 Oe and 0.9 to 0.5, respectively, inducing the soft and hard phases along the length of Fe NWs. Further increasing theC_dleads to the separation of the phases, as evidenced by first-order reversal curve analysis. From a theoretical aspect, the emergence of the soft phase may lead to the occurrence of the fanning reversal mode in the NWs, for which there is no precedent in previous experimental investigations.

Post-CMOS Compatible Aluminum Scandium Nitride/2D Channel Ferroelectric Field-Effect-Transistor Memory

Recent advances in oxide ferroelectric (FE) materials have rejuvenated the field of low-power, nonvolatile memories and made FE memories a commercial reality. Despite these advances, progress on commercial FE-RAM based on lead zirconium titanate has stalled due to process challenges. The recent discovery of ferroelectricity in scandium-doped aluminum nitride (AlScN) presents new opportunities for direct memory integration with logic transistors due to the low temperature of AlScN deposition (approximately 350 °C), making it compatible with back end of the line integration on silicon logic. Here, we present a FE-FET device composed of an FE-AlScN dielectric layer integrated with a two-dimensional MoS₂ channel. Our devices show an ON/OFF ratio of ∼10⁶, concurrent with a normalized memory window of 0.3 V/nm. The devices also demonstrate stable memory states up to 10⁴ cycles and state retention up to 10⁵ s. Our results suggest that the FE-AlScN/2D combination is ideal for embedded memory and memory-based computing architectures.

Ferroelectricity and phase transitions in In2Se3 van der Waals material

van der Waals layered α-In2Se3 has shown out-of-plane ferroelectricity down to the bilayer and monolayer thicknesses at room temperature that can be switched by an applied electric field. This work addresses the missing theoretical framework through a comprehensive study on the layer-dependent electronic structure, ferroelectricity and the inter-layer interaction of α-In2Se3, by using first-principles density functional theory. Furthermore, surface states and their response to the built-in internal depolarizing field were carefully analyzed. Phase transition and Curie temperatures of 1L α-In2Se3 were studied by employing Monte Carlo and ab initio molecular dynamics simulations. The estimated Curie point is above room temperature, making 1L α-In2Se3 a promising candidate for future ultra-thin ferroelectric devices.

Nonvolatile ferroelectric field effect transistor based on a vanadium dioxide nanowire with large on- and off-field resistance switching

We fabricate a ferroelectric field effect transistor (FeFET) based on a semiconducting vanadium dioxide (VO₂) nanowire (NW), and we investigate its electron transport characteristics modulated by the ferroelectric effects.

Nanoscale coaxial focused electrohydrodynamic jet printing

Controlled patterning of nanostructures at desired positions is of great importance for high-performance M/NEMS devices. Here, we demonstrate a high-resolution, high-speed and cost-effective fabrication method, named coaxial focused electrohydrodynamic jet printing, to print functional nanostructures. A coaxial needle was designed and developed; a functional ink and high viscosity liquid are applied in the inner and outer needle, respectively. Under optimised conditions, a stable coaxial jet is formed; then, the electrical shearing force and electrical field induce viscous shearing force and internal pressure that are jointly applied on the inner functional ink, focusing the inner jet on the nanoscale. Using this stable coaxial jet with a nano-jet inside it, nanostructures with highly aligned nanowire arrays, nano-freebeams and nano-cantilever beams down to the scale of 40 nm were directly printed. The needle size was 130 μm, and the ratio of the sizes of the needle and the printed structure was as high as 3250/1. This technique realizes the controllable printing of nanoscale structures with the use of a one hundred micrometer-sized needle. The printed PZT nanostructures exhibit pure perovskite structures and distinct piezoelectric responses.

Nanoionics-Based Three-Terminal Synaptic Device Using Zinc Oxide

Artificial synaptic thin film transistors (TFTs) capable of simultaneously manifesting signal transmission and self-learning are demonstrated using transparent zinc oxide (ZnO) in combination with high κ tantalum oxide as gate insulator. The devices exhibit pronounced memory retention with a memory window in excess of 4 V realized using an operating voltage less than 6 V. Gate polarity induced motion of oxygen vacancies in the gate insulator is proposed to play a vital role in emulating synaptic behavior, directly measured as the transmission of a signal between the source and drain (S/D) terminals, but with the added benefit of independent control of synaptic weight. Unlike in two terminal memristor/resistive switching devices, multistate memory levels are demonstrated using the gate terminal without hampering the signal transmission across the S/D electrodes. Synaptic functions in the devices can be emulated using a low programming voltage of 200 mV, an order of magnitude smaller than in conventional resistive random access memory and other field effect transistor based synaptic technologies. Robust synaptic properties demonstrated using fully transparent, ecofriendly inorganic materials chosen here show greater promise in realizing scalable synaptic devices compared to organic synaptic and other liquid electrolyte gated device technologies. Most importantly, the strong coupling between the in-plane gate and semiconductor channel through ionic charge in the gate insulator shown by these devices, can lead to an artificial neural network with multiple presynaptic terminals for complex synaptic learning processes. This provides opportunities to alleviate the extreme requirements of component and interconnect density in realizing brainlike systems.

Side-Gated In2O3 Nanowire Ferroelectric FETs for High-Performance Nonvolatile Memory Applications

A new type of ferroelectric FET based on the single nanowire is demonstrated. The design of the side-gated architecture not only simplifies the manufacturing process but also avoids any postdeposition damage to the organic ferroelectric film. The devices exhibit excellent performances for nonvolatile memory applications, and the memory hysteresis can be effectively modulated by adjusting the side-gate geometries.

New modalities of strain-control of ferroelectric thin films

Ferroelectrics, with their spontaneous switchable electric polarization and strong coupling between their electrical, mechanical, thermal, and optical responses, provide functionalities crucial for a diverse range of applications. Over the past decade, there has been significant progress in epitaxial strain engineering of oxide ferroelectric thin films to control and enhance the nature of ferroelectric order, alter ferroelectric susceptibilities, and to create new modes of response which can be harnessed for various applications. This review aims to cover some of the most important discoveries in strain engineering over the past decade and highlight some of the new and emerging approaches for strain control of ferroelectrics. We discuss how these new approaches to strain engineering provide promising routes to control and decouple ferroelectric susceptibilities and create new modes of response not possible in the confines of conventional strain engineering. To conclude, we will provide an overview and prospectus of these new and interesting modalities of strain engineering helping to accelerate their widespread development and implementation in future functional devices.

One-Dimensional Ferroelectric Nanostructures: Synthesis, Properties, and Applications

One-dimensional (1D) ferroelectric nanostructures, such as nanowires, nanorods, nanotubes, nanobelts, and nanofibers, have been studied with increasing intensity in recent years. Because of their excellent ferroelectric, ferroelastic, pyroelectric, piezoelectric, inverse piezoelectric, ferroelectric-photovoltaic (FE-PV), and other unique physical properties, 1D ferroelectric nanostructures have been widely used in energy-harvesting devices, nonvolatile random access memory applications, nanoelectromechanical systems, advanced sensors, FE-PV devices, and photocatalysis mechanisms. This review summarizes the current state of 1D ferroelectric nanostructures and provides an overview of the synthesis methods, properties, and practical applications of 1D nanostructures. Finally, the prospects for future investigations are outlined.

Ultralow power complementary inverter circuits using axially doped p- and n-channel Si nanowire field effect transistors

We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.

Organic ferroelectric/semiconducting nanowire hybrid layer for memory storage

Ferroelectric materials are important components of sensors, actuators and non-volatile memories. However, possible device configurations are limited due to the need to provide screening charges to ferroelectric interfaces to avoid depolarization. Here we show that, by alternating ferroelectric and semiconducting nanowires over an insulating substrate, the ferroelectric dipole moment can be stabilized by injected free charge carriers accumulating laterally in the neighboring semiconducting nanowires. This lateral electrostatic coupling between ferroelectric and semiconducting nanowires offers new opportunities to design new device architectures. As an example, we demonstrate the fabrication of an elementary non-volatile memory device in a transistor-like configuration, of which the source-drain current exhibits a typical hysteretic behavior with respect to the poling voltage. The potential for size reduction intrinsic to the nanostructured hybrid layer offers opportunities for the development of strongly miniaturized ferroelectric and piezoelectric devices.

Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors

Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

Low-Programmable-Voltage Nonvolatile Memory Devices Based on Omega-shaped Gate Organic Ferroelectric P(VDF-TrFE) Field Effect Transistors Using p-type Silicon Nanowire Channels

A facile approach was demonstrated for fabricating high-performance nonvolatile memory devices based on ferroelectric-gate field effect transistors using a p-type Si nanowire coated with omega-shaped gate organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)). We overcame the interfacial layer problem by incorporating P(VDF-TrFE) as a ferroelectric gate using a low-temperature fabrication process. Our memory devices exhibited excellent memory characteristics with a low programming voltage of ±5 V, a large modulation in channel conductance between ON and OFF states exceeding 10⁵, a long retention time greater than 3 × 10⁴ s, and a high endurance of over 10⁵ programming cycles while maintaining an I _ON/I _OFF ratio higher than 10².

Tunable threshold voltage of an n-type Si nanowire ferroelectric-gate field effect transistor for high-performance nonvolatile memory applications

We successfully fabricated ferroelectric-gate field effect transistor (FEFET)-based nonvolatile memory devices using an n-type Si nanowire coated with omega-shaped-gate organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) via a low-temperature fabrication process. Our FEFET memory devices with controllable threshold voltage via adjustment of the doping concentration exhibit excellent memory characteristics with ultra-low ON state power dissipation (≤3 nW), a large modulation in channel conductance between the ON and OFF states exceeding 10(5), a long retention time of over 3 × 10(4) s and a high endurance of over 10(5) programming cycles whilst maintaining an I ON/I OFF ratio higher than 10(3). This result may be promising for next-generation nonvolatile memory on flexible substrate applications.

High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage

We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

Low voltage operating field effect transistors with composite In2O3-ZnO-ZnGa2O4 nanofiber network as active channel layer

Field effect transistors (FETs), incorporating metal-oxide nanofibers as the active conductive channel, have the potential for driving the widespread application of nanowire or nanofiber FETs-based electronics. Here we report on low voltage FETs with integrated electrospun In2O3-ZnO-ZnGa2O4 composite fiber channel layers and high-K dielectric (MgO)0.3-(Bi1.5Zn1.0Nb1.5O7)0.7 gate insulator and compare their performance against FETs utilizing conductive single phase, polycrystalline ZnO or In2O3 channel layers. The polycrystalline In2O3-ZnO-ZnGa2O4 composite fibers provide superior performance with high field effect mobility (∼7.04 cm2 V(-1) s(-1)), low subthreshold swing (390 mV/dec), and low threshold voltage (1.0 V) combined with excellent saturation, likely resulting from the effective blocking of high current-flow through the In2O3 and ZnO nanocrystallites by the insulating spinel ZnGa2O4 phase. The microstructural evolution of the individual In2O3, ZnO, and ZnGa2O4 phases in composite fibers is clearly observed by high resolution TEM. A systematic examination of channel area coverage, ranging from single fiber to over 90% coverage, demonstrates that low coverage results in relatively low current outputs and reduced reproducibility which we attribute to the difficulty in positioning fibers and fiber length control. On the other hand, those with ∼80% coverage exhibited high field effect mobility, high on/off current ratios (>10(5)), and negligible hysteresis following 15 sweep voltage cycles. A special feature of this work is the application of the FETs to modulate the properties of complex polycrystalline nanocomposite channels.

Flexible graphene-PZT ferroelectric nonvolatile memory

We report the fabrication of a flexible graphene-based nonvolatile memory device using Pb(Zr0.35,Ti0.65)O3 (PZT) as the ferroelectric material. The graphene and PZT ferroelectric layers were deposited using chemical vapor deposition and sol–gel methods, respectively. Such PZT films show a high remnant polarization (Pr) of 30 μC cm−2 and a coercive voltage (Vc) of 3.5 V under a voltage loop over ±11 V. The graphene–PZT ferroelectric nonvolatile memory on a plastic substrate displayed an on/off current ratio of 6.7, a memory window of 6 V and reliable operation. In addition, the device showed one order of magnitude lower operation voltage range than organic-based ferroelectric nonvolatile memory after removing the anti-ferroelectric behavior incorporating an electrolyte solution. The devices showed robust operation in bent states of bending radii up to 9 mm and in cycling tests of 200 times. The devices exhibited remarkable mechanical properties and were readily integrated with plastic substrates for the production of flexible circuits.

A Pathway to Type-I Band Alignment in Ge/Si Core-Shell Nanowires

We investigate the electronic band structures of Ge/Si core-shell nanowires (CSNWs) and devise a way to realize the electron quantum well at Ge core atoms with first-principles calculations. We reveal that the electronic band engineering by the quantum confinement and the lattice strain can induce the type-I/II band alignment transition, and the resulting type-I band alignment generates the electron quantum well in Ge/Si CSNWs. We also find that the type-I/II transition in Ge/Si CSNWs is highly related to the direct to indirect band gap transition through the analysis of charge density and band structures. In terms of the quantum confinement, for [100] and [111] directional Ge/Si CSNWs, the type-I/II transition can be obtained by decreasing the diameters, whereas a [110] directional CSNW preserves the type-II band alignment even at diameters as small as 1 nm. By applying a compressive strain on [110] CSNWs, the type-I band alignment can be formed. Our results suggest that Ge/Si CSNWs can have the type-I band alignment characteristics by the band structure engineering, which enables both n-type and p-type quantum-well transistors to be fabricated using Ge/Si CSNWs for high-speed logic applications.

Flexible non-volatile ferroelectric polymer memory with gate-controlled multilevel operation

A flexible field-effect transistor with a poly(3-hexylthiophene) (P3HT) active channel and a ferroelectric poly(vinlyidene fluoride-co-trifluoro ethylene) (PVDF-TrFE) insulator exhibits gate-voltage-controllable multilevel non-volatile memory characteristics with highly reliable data retention and endurance.

Single ZnO nanowire-PZT optothermal field effect transistors

A new type of pyroelectric field effect transistor based on a composite consisting of single zinc oxide nanowire and lead zirconate titanate (ZnO NW-PZT) has been developed. Under infrared (IR) laser illumination, the transconductance of the ZnO NW can be modulated by optothermal gating. The drain current can be increased or decreased by IR illumination depending on the polarization orientation of the Pb(Zr(0.3)Ti(0.7))O(3) (PZT) substrate. Furthermore, by combining the photocurrent behavior in the UV range and the optothermal gating effect in the IR range, the wide spectrum of response of current by light offers a variety of opportunities for nanoscale optoelectronic devices.

Controlling semiconducting and insulating states of SnO2 reversibly by stress and voltage

By applying mechanical stress (by bending a flexible substrate) and an appropriate voltage, the conductance of a single-crystal SnO(2) microrod on a flexible substrate can be tuned in a reversible and nonvolatile manner. The creation and elimination of lattice defects controlled by strain and electrical healing is the origin of this novel transition. A SnO(2) microrod changes continually from its normal semiconducting state to an insulating state by bending the flexible substrate. The insulating state is maintained even after straightening the substrate. Interestingly, by applying an appropriate voltage, the defects are electrically healed and the insulating state reverts to the original semiconducting state. The structural changes in the SnO(2) microrod observed in the Raman spectra are consistent with the nonvolatile property of the transport. This flexible SnO(2) device with the reversible and nonvolatile modification of electrical properties is expected to lead to a better understanding of the mechanism of defect creation and elimination and has potential application in novel flexible strain sensors and switches.

Ferroelectric memory based on nanostructures

In the past decades, ferroelectric materials have attracted wide attention due to their applications in nonvolatile memory devices (NVMDs) rendered by the electrically switchable spontaneous polarizations. Furthermore, the combination of ferroelectric and nanomaterials opens a new route to fabricating a nanoscale memory device with ultrahigh memory integration, which greatly eases the ever increasing scaling and economic challenges encountered in the traditional semiconductor industry. In this review, we summarize the recent development of the nonvolatile ferroelectric field effect transistor (FeFET) memory devices based on nanostructures. The operating principles of FeFET are introduced first, followed by the discussion of the real FeFET memory nanodevices based on oxide nanowires, nanoparticles, semiconductor nanotetrapods, carbon nanotubes, and graphene. Finally, we present the opportunities and challenges in nanomemory devices and our views on the future prospects of NVMDs.

Metal-free doping process to enhance the conductivity of zinc oxide nanorods retaining the transparency

The well-ordered metal oxide nanostructures can be synthesized successfully, but the conductance of these structures is limited, which is a disadvantage for applying these in photovoltaic and display devices. Conductivity of a semiconductor can be improved by using metal doping, but the issue becomes a major challenge in nanostructures since their high surface energy usually hinders any metal doping process. Here we show an entirely new metal-free doping strategy to enhance the current conduction of ZnO nanorods' (NRs) arrays through a sulphidation technique. The process is based on the electronegativity difference between S and O because of which one can expect a rigorous bond rearrangement at the interface and a ZnOS-ZnS composite is formed as O is being partially replaced by S. The current conduction by the metal oxide NRs arrays is significantly enhanced by nearly 4 orders of magnitude without sacrificing the transparency of the NRs arrays. The increased current conduction is assigned due to an increase in the Zn(i) concentration as evidenced from the electron paramagnetic resonance measurements. The composite layer grown on p-Si forms a photodiode which is highly sensitive to visible light with a very fast response time.

Oxide nanowires for spintronics: materials and devices

Spintronics, or spin-based data storage and manipulation technology, is emerging as a very active research area because of both new science and potential technological applications. As the characteristic lengths of spin-related phenomena naturally fall into the nanometre regime, researchers start applying the techniques of bottom-up nanomaterial synthesis and assembly to spintronics. It is envisaged that novel physics regarding spin manipulation and domain dynamics can be realized in quantum confined nanowire-based devices. Here we review the recent breakthroughs related to the applications of oxide nanowires in spintronics from the perspectives of both material candidates and device fabrication. Oxide nanowires generally show excellent crystalline quality and tunable physical properties, but more efforts are imperative as we strive to develop novel spintronic nanowires and devices.

FeTRAM. An organic ferroelectric material based novel random access memory cell

Science and technology in the electronics area have always been driven by the development of materials with unique properties and their integration into novel device concepts with the ultimate goal to enable new functionalities in innovative circuit architectures. In particular, a shift in paradigm requires a synergistic approach that combines materials, devices and circuit aspects simultaneously. Here we report the experimental implementation of a novel nonvolatile memory cell that combines silicon nanowires with an organic ferroelectric polymer-PVDF-TrFE-into a new ferroelectric transistor architecture. Our new cell, the ferroelectric transistor random access memory (FeTRAM) exhibits similarities with state-of-the-art ferroelectric random access memories (FeRAMs) in that it utilizes a ferroelectric material to store information in a nonvolatile (NV) fashion but with the added advantage of allowing for nondestructive readout. This nondestructive readout is a result of information being stored in our cell using a ferroelectric transistor instead of a capacitor-the scheme commonly employed in conventional FeRAMs.

Ferroelectric gated electrical transport in CdS nanotetrapods

Complex nanostructures such as branched semiconductor nanotetrapods are promising building blocks for next-generation nanoelectronics. Here we report on the electrical transport properties of individual CdS tetrapods in a field effect transistor (FET) configuration with a ferroelectric Ba(0.7)Sr(0.3)TiO(3) film as high-k, switchable gate dielectric. A cryogenic four-probe scanning tunneling microscopy (STM) is used to probe the electrical transport through individual nanotetrapods at different temperatures. A p-type field effect is observed at room temperature, owing to the enhanced gate capacitance coupling. And the reversible remnant polarization of the ferroelectric gate dielectric leads to a well-defined nonvolatile memory effect. The field effect is shown to originate from the channel tuning in the arm/core/arm junctions of nanotetrapods. At low temperature (8.5 K), the nanotetrapod devices exhibit a ferroelectric-modulated single-electron transistor (SET) behavior. The results illustrate how the characteristics of a ferroelectric such as switchable polarization and high dielectric constant can be exploited to control the functionality of individual three-dimensional nanoarchitectures.

Nonvolatile memory functionality of ZnO nanowire transistors controlled by mobile protons

We demonstrated the nonvolatile memory functionality of ZnO nanowire field effect transistors (FETs) using mobile protons that are generated by high-pressure hydrogen annealing (HPHA) at relatively low temperature (400 °C). These ZnO nanowire devices exhibited reproducible hysteresis, reversible switching, and nonvolatile memory behaviors in comparison with those of the conventional FET devices. We show that the memory characteristics are attributed to the movement of protons between the Si/SiO(2) interface and the SiO(2)/ZnO nanowire interface by the applied gate electric field. The memory mechanism is explained in terms of the tuning of interface properties, such as effective electric field, surface charge density, and surface barrier potential due to the movement of protons in the SiO(2) layer, consistent with the UV photoresponse characteristics of nanowire memory devices. Our study will further provide a useful route of creating memory functionality and incorporating proton-based storage elements onto a modified CMOS platform for FET memory devices using nanomaterials.

Novel nonvolatile memory with multibit storage based on a ZnO nanowire transistor

We demonstrate a room temperature processed ferroelectric (FE) nonvolatile memory based on a ZnO nanowire (NW) FET where the NW channel is coated with FE nanoparticles. A single device exhibits excellent memory characteristics with the large modulation in channel conductance between ON and OFF states exceeding 10(4), a long retention time of over 4 × 10(4) s, and multibit memory storage ability. Our findings provide a viable way to create new functional high-density nonvolatile memory devices compatible with simple processing techniques at low temperature for flexible devices made on plastic substrates.

Nanoscale memory devices

This article reviews the current status and future prospects for the use of nanomaterials and devices in memory technology. First, the status and continuing scaling trends of the flash memory are discussed. Then, a detailed discussion on technologies trying to replace flash in the near-term is provided. This includes phase change random access memory, Fe random access memory and magnetic random access memory. The long-term nanotechnology prospects for memory devices include carbon-nanotube-based memory, molecular electronics and memristors based on resistive materials such as TiO(2).

Tuning of the electronic characteristics of ZnO nanowire field effect transistors by proton irradiation

We demonstrated a controllable tuning of the electronic characteristics of ZnO nanowire field effect transistors (FETs) using a high-energy proton beam. After a short proton irradiation time, the threshold voltage shifted to the negative gate bias direction with an increase in the electrical conductance, whereas the threshold voltage shifted to the positive gate bias direction with a decrease in the electrical conductance after a long proton irradiation time. The electrical characteristics of two different types of ZnO nanowires FET device structures in which the ZnO nanowires are placed on the substrate or suspended above the substrate and photoluminescence (PL) studies of the ZnO nanowires provide substantial evidence that the experimental observations result from the irradiation-induced charges in the bulk SiO(2) and at the SiO(2)/ZnO nanowire interface, which can be explained by a surface-band-bending model in terms of gate electric field modulation. Our study on the proton-irradiation-mediated functionalization can be potentially interesting not only for understanding the proton irradiation effects on nanoscale devices, but also for creating the property-tailored nanoscale devices.

Rapid nanoimprinting and excellent piezoresponse of polymeric ferroelectric nanostructures

Nanostructured ferroelectric patterns are promising for a wide range of applications, including sensing and actuation, data storage, photonics, spintronics, and energy conversion and storage. In this work, a rapid nanoimprinting technique is developed to pattern ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymers in just 3 min, which exhibit excellent ferroelectricity and piezoresponse without any post-imprinting annealing. The effects of imprinting conditions have been thoroughly investigated, and the optimal imprinting parameters for excellent pattern transfer have been identified. The application of the imprinted polymeric patterns as a ferroelectric nonvolatile memory for data storage has also been demonstrated and discussed.

Settling the "dead layer" debate in nanoscale capacitors

Permittivity peaks in single crystal thin film capacitors are strongly suppressed compared to bulk in the case of Pt/SrTiO3 /Pt, but are relatively unaffected in Pt/BaTiO3 /Pt structures. This is consistent with the recent suggestion that subtle variations in interfacial bonding between the dielectric and electrode are critical in determining the presence or absence of inherent dielectric "dead layers".

Two-bit ferroelectric field-effect transistor memories assembled on individual nanotubes

Carbon nanotube (CNT) ferroelectric field-effect transistors (FeFETs) with well-defined memory switch behaviors are promising for nonvolatile, nondestructive read-out (NDRO) memory operation and ultralow power consumption. Here, we report two-bit CNT-FeFET memories by assembling two top gates on individual nanotubes coated with ferroelectric thin films. Each bit of the nanotube transistor memory exhibits a controllable memory switching behavior induced by the reversible remnant polarization of the ferroelectric films, and its NDRO operation is demonstrated. The low driving voltage of 2 V, high carrier mobility over 1000 cm2 V(-1) s(-1), and potential ultrahigh integration density over 200 Gbit inch(-2) of the two-bit FeFET memory are highlighted in this paper.