Probabilistic computing using Cu0.1Te0.9/HfO2/Pt diffusive memristors

Versatile optoelectronic memristor based on wide-bandgap Ga2O3 for artificial synapses and neuromorphic computing

Optoelectronic memristors possess capabilities of data storage and mimicking human visual perception. They hold great promise in neuromorphic visual systems (NVs). This study introduces the amorphous wide-bandgap Ga2O3 photoelectric synaptic memristor, which achieves 3-bit data storage through the adjustment of current compliance (Icc) and the utilization of variable ultraviolet (UV-254 nm) light intensities. The "AND" and "OR" logic gates in memristor-aided logic (MAGIC) are implemented by utilizing voltage polarity and UV light as input signals. The device also exhibits highly stable synaptic characteristics such as paired-pulse facilitation (PPF), spike-intensity dependent plasticity (SIDP), spike-number dependent plasticity (SNDP), spike-time dependent plasticity (STDP), spike-frequency dependent plasticity (SFDP) and the learning experience behavior. Finally, when integrated into an artificial neural network (ANN), the Ag/Ga2O3/Pt memristive device mimicked optical pulse potentiation and electrical pulse depression with high pattern accuracy (90.7%). The single memristive cells with multifunctional features are promising candidates for optoelectronic memory storage, neuromorphic computing, and artificial visual perception applications.

Stochastic Photoresponse-Driven Perovskite TRNGs for Secure Encryption Systems

True random numbers are essential for ensuring information security and supporting simulations across various industries. With the exponential growth of data driven by advancements in artificial intelligence, robust encryption for communications has become increasingly important. While software-based deterministic random number algorithms are cost-effective and easy to use, they are vulnerable to attacks by powerful supercomputers, highlighting the need for more secure alternatives. As portable electronic devices and information-gathering sensors proliferate, portable true random number generators (TRNGs) are critical for maintaining security. In this work, hybrid material-based photodetectors composed of anionic polymers and perovskites that maximize stochastic photogeneration for TRNG applications are presented. By integrating perovskite photodetectors with simple electronic circuits, compact, low-power TRNG devices have been developed that are versatile and resilient to environmental factors. These devices generate 10 000 bits s-1 without resets or delays, achieving significant miniaturization. The generated 10 Mbit random number is validated through US National Institute of Standards and Technology (NIST) testing. Using a 480 000-bit random sequence, perfect image encryption, ensuring protection against hacking are demonstrated. Additionally, the perovskite TRNG can operate under external light even when embedded in pork skin, realizing its potential as an implantable device for personal security and authentication.

Nanofluidic Volatile Threshold Switching Ionic Memristor: A Perspective

The fast development of artificial intelligence and big data drives the exploration of low-power computing hardware. Neuromorphic devices represented by memristors may provide a possible computing paradigm beyond von Neumann's architecture because they enable the integration of processing and storage units by mimicking how the brain processes complex information in parallel. In the brain, information is processed via multilevel spiking coding and event-driven mechanisms, whose simplified neural circuit is represented by the leaky-integration-and-fire model combining volatile threshold switching memristors and capacitors. As a computing unit to emulate the working environment and explore the unique functions of ions and molecules of biological systems, nanofluidic volatile threshold switching ionic memristors become essential but are still missing. This Perspective will review the mechanism and role of threshold switching memristors as a building block for neuromorphic computing and list three possible routes for nanofluidic ones.

An Analysis of Components and Enhancement Strategies for Advancing Memristive Neural Networks

Advancements in artificial intelligence (AI) and big data have highlighted the limitations of traditional von Neumann architectures, such as excessive power consumption and limited performance improvement with increasing parameter numbers. These challenges are significant for edge devices requiring higher energy and area efficiency. Recently, many reports on memristor-based neural networks (Mem-NN) using resistive switching memory have shown efficient computing performance with a low power requirement. Even further performance optimization can be made using engineering resistive switching mechanisms. Nevertheless, systematic reviews that address the circuit-to-material aspects of Mem-NNs, including their dedicated algorithms, remain limited. This review first categorizes the memristor-based neural networks into three components: pre-processing units, processing units, and learning algorithms. Then, the optimization methods to improve integration and operational reliability are discussed across materials, devices, circuits, and algorithms for each component. Furthermore, the review compares recent advancements in chip-level neuromorphic hardware with conventional systems, including graphic processing units. The ongoing challenges and future directions in the field are discussed, highlighting the research to enhance the functionality and reliability of Mem-NNs.

Automatic Extraction and Compensation of P-Bit Device Variations in Large Array Utilizing Boltzmann Machine Training

A Probabilistic Bit (P-Bit) device serves as the core hardware for implementing Ising computation. However, the severe intrinsic variations of stochastic P-Bit devices hinder the large-scale expansion of the P-Bit array, significantly limiting the practical usage of Ising computation. In this work, a behavioral model which attributes P-Bit variations to two parameters, α and ΔV, is proposed. Then the weight compensation method is introduced, which can mitigate α and ΔV of P-Bit device variations by rederiving the weight matrix, enabling them to compute as ideal identical P-Bits without the need for weights retraining. Accurately extracting the α and ΔV simultaneously from a large P-Bit array which is prerequisite for the weight compensation method is a crucial and challenging task. To solve this obstacle, we present the novel automatic variation extraction algorithm which can extract device variations of each P-Bit in a large array based on Boltzmann machine learning. In order for the accurate extraction of variations from an extendable P-Bit array, an Ising Hamiltonian based on a 3D ferromagnetic model is constructed, achieving precise and scalable array variation extraction. The proposed Automatic Extraction and Compensation algorithm is utilized to solve both 16-city traveling salesman problem (TSP) and 21-bit integer factorization on a large P-Bit array with variation, demonstrating its accuracy, transferability, and scalability.

Memristive Ion Dynamics to Enable Biorealistic Computing

Conventional artificial intelligence (AI) systems are facing bottlenecks due to the fundamental mismatches between AI models, which rely on parallel, in-memory, and dynamic computation, and traditional transistors, which have been designed and optimized for sequential logic operations. This calls for the development of novel computing units beyond transistors. Inspired by the high efficiency and adaptability of biological neural networks, computing systems mimicking the capabilities of biological structures are gaining more attention. Ion-based memristive devices (IMDs), owing to the intrinsic functional similarities to their biological counterparts, hold significant promise for implementing emerging neuromorphic learning and computing algorithms. In this article, we review the fundamental mechanisms of IMDs based on ion drift and diffusion to elucidate the origins of their diverse dynamics. We then examine how these mechanisms operate within different materials to enable IMDs with various types of switching behaviors, leading to a wide range of applications, from emulating biological components to realizing specialized computing requirements. Furthermore, we explore the potential for IMDs to be modified and tuned to achieve customized dynamics, which positions them as one of the most promising hardware candidates for executing bioinspired algorithms with unique specifications. Finally, we identify the challenges currently facing IMDs that hinder their widespread usage and highlight emerging research directions that could significantly benefit from incorporating IMDs.

Localized Conduction Channels in Memristors

Since the early 2000s, the impending end of Moore's scaling, as the physical limits to shrinking transistors have been approached, has fueled interest in improving the functionality and efficiency of integrated circuits by employing memristors or two-terminal resistive switches. Formation (or avoidance) of localized conducting channels in many memristors, often called "filaments", has been established as the basis for their operation. While we understand some qualitative aspects of the physical and thermodynamic origins of conduction localization, there are not yet quantitative models that allow us to predict when they will form or how large they will be. Here we compile observations and explanations of channel formation that have appeared in the literature since the 1930s, show how many of these seemingly unrelated pieces fit together, and outline what is needed to complete the puzzle. This understanding will be a necessary predictive component for the design and fabrication of post-Moore's-era electronics.

Integer Factorization with Stochastic Spiking in Percolating Networks of Nanoparticles

As growth in global demand for computing power continues to outpace ongoing improvements in transistor-based hardware, novel computing solutions are required. One promising approach employs stochastic nanoscale devices to accelerate probabilistic computing algorithms. Percolating Networks of Nanoparticles (PNNs) exhibit stochastic spiking, which is of particular interest as it meets criteria for criticality which is associated with a range of computational advantages. Here, we show several ways in which spiking PNNs can be used as the core stochastic components of coupled networks that allow successful factorization of integers up to 945. We demonstrate asynchronous operation and show that a single device is sufficient to solve all factorization tasks and to generate multiple solutions simultaneously.

Leveraging volatile memristors in neuromorphic computing: from materials to system implementation

Inspired by the functions of biological neural networks, volatile memristors are essential for implementing neuromorphic computing. These devices enable large-scale and energy-efficient data processing by emulating neural functionalities through dynamic resistance changes. The threshold switching characteristics of volatile memristors, which are driven by various mechanisms in materials ranging from oxides to chalcogenides, make them versatile and suitable for neuromorphic computing systems. Understanding these mechanisms and selecting appropriate devices for specific applications are crucial for optimizing the performance. However, the existing literature lacks a comprehensive review of switching mechanisms, their compatibility with different applications, and a deeper exploration of the spatiotemporal processing capabilities and inherent stochasticity of volatile memristors. This review begins with a detailed analysis of the operational principles and material characteristics of volatile memristors. Their diverse applications are then explored, emphasizing their role in crossbar arrays, artificial receptors, and neurons. Furthermore, the potential of volatile memristors in artificial inference systems and reservoir computing is discussed, due to their spatiotemporal processing capabilities. Hardware security applications and probabilistic computing are also examined, where the inherent stochasticity of the devices can improve the system robustness and adaptability. To conclude, the suitability of different switching mechanisms for various applications is evaluated, and future perspectives for the development and implementation of volatile memristors are presented. This review aims to fill the gaps in existing research and highlight the potential of volatile memristors to drive innovation in neuromorphic computing, paving the way for more efficient and powerful computational paradigms.

Diffusive Memristor with CuS Nanoparticles Embedded in Polymeric Film as Artificial Nociceptor

The threshold behavior and the ion diffusion dynamics in diffusive volatile memristors have a very uncanny resemblance to the transduction process of biological nociceptors. Hence, the diffusive memristors are considered the most suited for making artificial nociceptive systems. To facilitate their widespread adoption, it is imperative to develop polymeric or organic-inorganic hybrid material-based diffusive memristors that are economical, biocompatible, and easily processable. In this study, we present a cluster-type polymeric diffusive memristor where copper is used as the active top electrode. The switching medium comprises copper(II) sulfide (CuS) nanoparticles embedded in poly(ethylene oxide) (PEO). The devices show electrochemical metalization (ECM)-type and bidirectional diffusive volatile memory with high nonlinearity (104) and turn-on slope (5.6 mV/dec). They reliably remain diffusive volatile with up to 10 wt % CuS in PEO and for a wide range of compliance (10-6 to 10-2 A) without transitioning to the bipolar nonvolatile type. The low reduction potential of CuS and optimal segmental dynamics of PEO work synergistically to ensure stable and reproducible diffusive memory. The CuS nanoparticles act as bipolar electrodes, undergoing local oxidation and reduction under the influence of the bias. The switching of resistance states in the CuS-PEO memristors is attributed to the formation of cluster-type filaments between CuS nanoparticles within the PEO matrix supported by the participation of copper ions from the top Cu electrode. The observation of low filament temperature and the independence of on-state resistance with respect to the device area and temperature further corroborate the cluster-type filament in CuS-PEO memristors. Using a 5 wt % CuS-based device, an artificial nociceptor is realized, which successfully mimics most of the nociceptive plasticities such as threshold, relaxation, no adaptation, and sensitization.

An overview of critical applications of resistive random access memory

The rapid advancement of new technologies has resulted in a surge of data, while conventional computers are nearing their computational limits. The prevalent von Neumann architecture, where processing and storage units operate independently, faces challenges such as data migration through buses, leading to decreased computing speed and increased energy loss. Ongoing research aims to enhance computing capabilities through the development of innovative chips and the adoption of new system architectures. One noteworthy advancement is Resistive Random Access Memory (RRAM), an emerging memory technology. RRAM can alter its resistance through electrical signals at both ends, retaining its state even after power-down. This technology holds promise in various areas, including logic computing, neural networks, brain-like computing, and integrated technologies combining sensing, storage, and computing. These cutting-edge technologies offer the potential to overcome the performance limitations of traditional architectures, significantly boosting computing power. This discussion explores the physical mechanisms, device structure, performance characteristics, and applications of RRAM devices. Additionally, we delve into the potential future adoption of these technologies at an industrial scale, along with prospects and upcoming research directions.

Photonic probabilistic machine learning using quantum vacuum noise

Probabilistic machine learning utilizes controllable sources of randomness to encode uncertainty and enable statistical modeling. Harnessing the pure randomness of quantum vacuum noise, which stems from fluctuating electromagnetic fields, has shown promise for high speed and energy-efficient stochastic photonic elements. Nevertheless, photonic computing hardware which can control these stochastic elements to program probabilistic machine learning algorithms has been limited. Here, we implement a photonic probabilistic computer consisting of a controllable stochastic photonic element - a photonic probabilistic neuron (PPN). Our PPN is implemented in a bistable optical parametric oscillator (OPO) with vacuum-level injected bias fields. We then program a measurement-and-feedback loop for time-multiplexed PPNs with electronic processors (FPGA or GPU) to solve certain probabilistic machine learning tasks. We showcase probabilistic inference and image generation of MNIST-handwritten digits, which are representative examples of discriminative and generative models. In both implementations, quantum vacuum noise is used as a random seed to encode classification uncertainty or probabilistic generation of samples. In addition, we propose a path towards an all-optical probabilistic computing platform, with an estimated sampling rate of  ~1 Gbps and energy consumption of  ~5 fJ/MAC. Our work paves the way for scalable, ultrafast, and energy-efficient probabilistic machine learning hardware.

Memristive Crossbar Array-Based Probabilistic Graph Modeling

Modern graph datasets with structural complexity and uncertainties due to incomplete information or data variability require advanced modeling techniques beyond conventional graph models. This study introduces a memristive crossbar array (CBA)-based probabilistic graph model (C-PGM) utilizing Cu0.3Te0.7/HfO2/Pt memristors, which exhibit probabilistic switching, self-rectifying, and memory characteristics. C-PGM addresses the complexities and uncertainties inherent in structural graph data across various domains, leveraging the probabilistic nature of memristors. C-PGM relies on the device-to-device variation across multiple memristive CBAs, overcoming the limitations of previous approaches that rely on sequential operations, which are slower and have a reliability concern due to repeated switching. This new approach enables the fast processing and massive implementation of probabilistic units at the expense of chip area. In this study, the hardware-based C-PGM feasibly expresses small-scale probabilistic graphs and shows minimal error in aggregate probability calculations. The probability calculation capabilities of C-PGM are applied to steady-state estimation and the PageRank algorithm, which is implemented on a simulated large-scale C-PGM. The C-PGM-based steady-state estimation and PageRank algorithm demonstrate comparable accuracy to conventional methods while significantly reducing computational costs.

CMOS Single-Photon Avalanche Diode Circuits for Probabilistic Computing

Intrinsically random hardware devices are increasingly attracting attention for their potential use in probabilistic computing architectures. One such device is the single-photon avalanche diode (SPAD) and an associated functional unit, the variable-rate SPAD circuit (VRSC), recently proposed by us as a source of randomness for sampling and annealing Ising and Potts models. This work develops a more advanced understanding of these VRSCs by introducing several VRSC design options and studying their tradeoffs as implemented in a 65-nm CMOS process. Each VRSC is composed of a SPAD and a processing circuit. Combinations of three different SPAD designs and three different types of processing circuits were evaluated on several metrics such as area, speed, and variability. Measured results from the SPAD design space show that even extremely small SPADs are suitable for probabilistic computing purposes, and that high dark count rates are not detrimental either, so SPADs for probabilistic computing are actually easier to integrate in standard CMOS processes. Results from the circuit design space show that the time-to-analog-based designs introduced in this work can produce highly exponential and analytical transfer functions, but that the less analytically tractable output of the previously proposed filter-based designs can achieve less variability in a smaller footprint. Probabilistic bits (P-bits) composed of the fabricated VRSCs achieve bit flip rates of 50 MHz and allow at least one order of magnitude of control over their simulated annealing temperature.

Stochastic switching and analog-state programmable memristor and its utilization for homomorphic encryption hardware

Homomorphic encryption performs computations on encrypted data without decrypting, thereby eliminating security issues during the data communication between clouds and edges. As a result, there is a growing need for homomorphic encryption hardware (HE-HW) for the edges, where low power consumption and a compact form factor are desired. Here, a Pt/Ta2O5/Mo metallic cluster-type memristors (Mo-MCM) characterized by the Mo as a mobile species, and its utilization for the HE-HW via a 1-trasistor-1-memristor (1T1M) array as a prototype HE-HW is proposed. The Mo-MCM exhibits inherent stochastic set-switching behavior, which can be utilized for generating the random numbers required for encryption key generation. Furthermore, the device can accurately store analog conductance states after set-switching, which can be used as an analog non-volatile memristor. By simultaneously leveraging these two characteristics, encryption key generation, data encryption, and decryption are possible within a single device through an in-memory computing manner.

Direct design of ground-state probabilistic logic using many-body interactions for probabilistic computing

In this work, an innovative design model aimed at enhancing the efficacy of ground-state probabilistic logic with a binary energy landscape (GSPL-BEL) is presented. This model enables the direct conversion of conventional CMOS-based logic circuits into corresponding probabilistic graphical representations based on a given truth table. Compared to the conventional approach of solving the configuration of Ising model-basic probabilistic gates through linear programming, our model directly provides configuration parameters with embedded many-body interactions. For larger-scale probabilistic logic circuits, the GSPL-BEL model can fully utilize the dimensions of many-body interactions, achieving minimal node overhead while ensuring the simplest binary energy landscape and circumventing additional logic synthesis steps. To validate its effectiveness, hardware implementations of probabilistic logic gates were conducted. Probabilistic bits were introduced as Ising cells, and cascaded conventional XNOR gates along with passive resistor networks were precisely designed to realize many-body interactions. HSPICE circuit simulation results demonstrate that the probabilistic logic circuits designed based on this model can successfully operate in free, forward, and reverse modes, exhibiting the simplest binary probability distributions. For a 2-bit × 2-bit integer factorizer involving many-body interactions, compared to the logic synthesis approach, the GSPL-BEL model significantly reduces the number of consumed nodes, the solution space (in the free-run mode), and the number of energy levels from 12, 4096, and 9-8, 256, and 2, respectively. Our findings demonstrate the significant potential of the GSPL-BEL model in optimizing the structure and performance of probabilistic logic circuits, offering a new robust tool for the design and implementation of future probabilistic computing systems.

Memristors with Tunable Volatility for Reconfigurable Neuromorphic Computing

Neuromorphic computing promises an energy-efficient alternative to traditional digital processors in handling data-heavy tasks, primarily driven by the development of both volatile (neuronal) and nonvolatile (synaptic) resistive switches or memristors. However, despite their energy efficiency, memristor-based technologies presently lack functional tunability, thus limiting their competitiveness with arbitrarily programmable (general purpose) digital computers. This work introduces a two-terminal bilayer memristor, which can be tuned among neuronal, synaptic, and hybrid behaviors. The varying behaviors are accessed via facile control over the filament formed within the memristor, enabled by the interplay between the two active ionic species (oxygen vacancies and metal cations). This solution is unlike single-species ion migration employed in most other memristors, which makes their behavior difficult to control. By reconfiguring a single crossbar array of hybrid memristors, two different applications that usually require distinct types of devices are demonstrated - reprogrammable heterogeneous reservoir computing and arbitrary non-Euclidean graph networks. Thus, this work outlines a potential path toward functionally reconfigurable postdigital computers.

Tunable ion energy barrier modulation through aliovalent halide doping for reliable and dynamic memristive neuromorphic systems

Memristive neuromorphic computing has emerged as a promising computing paradigm for the upcoming artificial intelligence era, offering low power consumption and high speed. However, its commercialization remains challenging due to reliability issues from stochastic ion movements. Here, we propose an innovative method to enhance the memristive uniformity and performance through aliovalent halide doping. By introducing fluorine concentration into dynamic TiO2-x memristors, we experimentally demonstrate reduced device variations, improved switching speeds, and enhanced switching windows. Atomistic simulations of amorphous TiO2-x reveal that fluoride ions attract oxygen vacancies, improving the reversible redistribution and uniformity. A number of migration barrier calculations statistically show that fluoride ions also reduce the migration energies of nearby oxygen vacancies, facilitating ionic diffusion and high-speed switching. The detailed Voronoi volume analysis further suggests design principles in terms of the migrating species' electrostatic repulsion and migration barriers. This work presents an innovative methodology for the fabrication of reliable memristor devices, contributing to the realization of hardware-based neuromorphic systems.

True random number generation using the spin crossover in LaCoO3

While digital computers rely on software-generated pseudo-random number generators, hardware-based true random number generators (TRNGs), which employ the natural physics of the underlying hardware, provide true stochasticity, and power and area efficiency. Research into TRNGs has extensively relied on the unpredictability in phase transitions, but such phase transitions are difficult to control given their often abrupt and narrow parameter ranges (e.g., occurring in a small temperature window). Here we demonstrate a TRNG based on self-oscillations in LaCoO3 that is electrically biased within its spin crossover regime. The LaCoO3 TRNG passes all standard tests of true stochasticity and uses only half the number of components compared to prior TRNGs. Assisted by phase field modeling, we show how spin crossovers are fundamentally better in producing true stochasticity compared to traditional phase transitions. As a validation, by probabilistically solving the NP-hard max-cut problem in a memristor crossbar array using our TRNG as a source of the required stochasticity, we demonstrate solution quality exceeding that using software-generated randomness.

Implementation of Bayesian networks and Bayesian inference using a Cu0.1Te0.9/HfO2/Pt threshold switching memristor

Bayesian networks and Bayesian inference, which forecast uncertain causal relationships within a stochastic framework, are used in various artificial intelligence applications. However, implementing hardware circuits for the Bayesian inference has shortcomings regarding device performance and circuit complexity. This work proposed a Bayesian network and inference circuit using a Cu0.1Te0.9/HfO2/Pt volatile memristor, a probabilistic bit neuron that can control the probability of being 'true' or 'false.' Nodal probabilities within the network are feasibly sampled with low errors, even with the device's cycle-to-cycle variations. Furthermore, Bayesian inference of all conditional probabilities within the network is implemented with low power (<186 nW) and energy consumption (441.4 fJ), and a normalized mean squared error of ∼7.5 × 10-4 through division feedback logic with a variational learning rate to suppress the inherent variation of the memristor. The suggested memristor-based Bayesian network shows the potential to replace the conventional complementary metal oxide semiconductor-based Bayesian estimation method with power efficiency using a stochastic computing method.

Restricted Boltzmann Machines Implemented by Spin-Orbit Torque Magnetic Tunnel Junctions

Artificial intelligence has surged forward with the advent of generative models, which rely heavily on stochastic computing architectures enhanced by true random number generators with adjustable sampling probabilities. In this study, we develop spin-orbit torque magnetic tunnel junctions (SOT-MTJs), investigating their sigmoid-style switching probability as a function of the driving voltage. This feature proves to be ideally suited for stochastic computing algorithms such as the restricted Boltzmann machines (RBM) prevalent in pretraining processes. We exploit SOT-MTJs as both stochastic samplers and network nodes for RBMs, enabling the implementation of RBM-based neural networks to achieve recognition tasks for both handwritten and spoken digits. Moreover, we further harness the weights derived from the preceding image and speech training processes to facilitate cross-modal learning from speech to image generation. Our results clearly demonstrate that these SOT-MTJs are promising candidates for the development of hardware accelerators tailored for Boltzmann neural networks and other stochastic computing architectures.

Tunneling current-controlled spin states in few-layer van der Waals magnets

Effective control of magnetic phases in two-dimensional magnets would constitute crucial progress in spintronics, holding great potential for future computing technologies. Here, we report a new approach of leveraging tunneling current as a tool for controlling spin states in CrI3. We reveal that a tunneling current can deterministically switch between spin-parallel and spin-antiparallel states in few-layer CrI3, depending on the polarity and amplitude of the current. We propose a mechanism involving nonequilibrium spin accumulation in the graphene electrodes in contact with the CrI3 layers. We further demonstrate tunneling current-tunable stochastic switching between multiple spin states of the CrI3 tunnel devices, which goes beyond conventional bi-stable stochastic magnetic tunnel junctions and has not been documented in two-dimensional magnets. Our findings not only address the existing knowledge gap concerning the influence of tunneling currents in controlling the magnetism in two-dimensional magnets, but also unlock possibilities for energy-efficient probabilistic and neuromorphic computing.

Tunable stochastic memristors for energy-efficient encryption and computing

Information security and computing, two critical technological challenges for post-digital computation, pose opposing requirements - security (encryption) requires a source of unpredictability, while computing generally requires predictability. Each of these contrasting requirements presently necessitates distinct conventional Si-based hardware units with power-hungry overheads. This work demonstrates Cu0.3Te0.7/HfO2 ('CuTeHO') ion-migration-driven memristors that satisfy the contrasting requirements. Under specific operating biases, CuTeHO memristors generate truly random and physically unclonable functions, while under other biases, they perform universal Boolean logic. Using these computing primitives, this work experimentally demonstrates a single system that performs cryptographic key generation, universal Boolean logic operations, and encryption/decryption. Circuit-based calculations reveal the energy and latency advantages of the CuTeHO memristors in these operations. This work illustrates the functional flexibility of memristors in implementing operations with varying component-level requirements.

Multiphase Reset Induced Reliable Dual-Mode Resistance Switching of the Ta/HfO2/RuO2 Memristor

Higher functionality should be achieved within the device-level switching characteristics to secure the operational possibility of mixed-signal data processing within a memristive crossbar array. This work investigated electroforming-free Ta/HfO2/RuO2 resistive switching devices for digital- and analog-type applications through various structural and electrical analyses. The multiphase reset behavior, induced by the conducting filament modulation and oxygen vacancy generation (annihilation) in the HfO2 layer by interacting with the Ta (RuO2) electrode, was utilized for the switching mode change. Therefore, a single device can manifest stable binary switching between low and high resistance states for the digital mode and the precise 8-bit conductance modulation (256 resistance values) via an optimized pulse application for the analog mode. An in-depth analysis of the operation in different modes and comparing memristors with different electrode structures validate the proposed mechanism. The Ta/HfO2/RuO2 resistive switching device is feasible for a mixed-signal processable memristive array.

CMOS plus stochastic nanomagnets enabling heterogeneous computers for probabilistic inference and learning

Extending Moore's law by augmenting complementary-metal-oxide semiconductor (CMOS) transistors with emerging nanotechnologies (X) has become increasingly important. One important class of problems involve sampling-based Monte Carlo algorithms used in probabilistic machine learning, optimization, and quantum simulation. Here, we combine stochastic magnetic tunnel junction (sMTJ)-based probabilistic bits (p-bits) with Field Programmable Gate Arrays (FPGA) to create an energy-efficient CMOS + X (X = sMTJ) prototype. This setup shows how asynchronously driven CMOS circuits controlled by sMTJs can perform probabilistic inference and learning by leveraging the algorithmic update-order-invariance of Gibbs sampling. We show how the stochasticity of sMTJs can augment low-quality random number generators (RNG). Detailed transistor-level comparisons reveal that sMTJ-based p-bits can replace up to 10,000 CMOS transistors while dissipating two orders of magnitude less energy. Integrated versions of our approach can advance probabilistic computing involving deep Boltzmann machines and other energy-based learning algorithms with extremely high throughput and energy efficiency.

Heterogeneous reservoir computing in second-order Ta2O5/HfO2 memristors

Multiple switching modes in a Ta2O5/HfO2 memristor are studied experimentally and numerically through a reservoir computing (RC) simulation to reveal the importance of nonlinearity and heterogeneity in the RC framework. Unlike most studies, where homogeneous reservoirs are used, heterogeneity is introduced by combining different behaviors of the memristor units. The chosen memristor for the reservoir units is based on a Ta2O5/HfO2 bilayer, in which the conductances of the Ta2O5 and HfO2 layers are controlled by the oxygen vacancies and deep/shallow traps, respectively, providing both volatile and non-volatile resistive switching modes. These several control parameters make the second-order Ta2O5/HfO2 memristor system present different behaviors in agreement with its history-dependent conductance and allow the fine-tuning of the behavior of each reservoir unit. The heterogeneity in the reservoir units improves the pattern recognition performance in the heterogeneous memristor RC system with a similar physical structure.

A Diffusive Artificial Synapse Based on Charged Metal Nanoparticles

We show that a diffusive memristor with analogue switching characteristics can be achieved in a layer of gold nanoparticles (AuNPs) functionalized with charged self-assembled monolayers (deprotonated 11-mercaptoundecanoic acid). The nanoparticle core and the anchored stationary charges are jammed within the layer while the mobile counterions [N(CH3)4+] can respond to the electric field and spontaneously diffuse back to the initial positions upon removal of the field. This metal nanoparticle device is set-step free, energy consumption efficient, mechanically flexible, and analogous to bio-Ca2+ dynamics and has tunable conductance modulation capabilities at the counterion concentrations. The gradual resistive switching behavior enables us to implement several important synaptic functions such as potentiation/depression, spike voltage-dependent plasticity, spike duration-dependent plasticity, spike frequency-dependent plasticity, and paired-pulse facilitation. Finally, on the basis of the paired-pulse facilitation characteristics, the metal nanoparticle diffusive artificial synapse is used for edge extraction with exhibits excellent performance.

Probabilistic computing with NbOx metal-insulator transition-based self-oscillatory pbit

Energy-based computing is a promising approach for addressing the rising demand for solving NP-hard problems across diverse domains, including logistics, artificial intelligence, cryptography, and optimization. Probabilistic computing utilizing pbits, which can be manufactured using the semiconductor process and seamlessly integrated with conventional processing units, stands out as an efficient candidate to meet these demands. Here, we propose a novel pbit unit using an NbOx volatile memristor-based oscillator capable of generating probabilistic bits in a self-clocking manner. The noise-induced metal-insulator transition causes the probabilistic behavior, which can be effectively modeled using a multi-noise-induced stochastic process around the metal-insulator transition temperature. We demonstrate a memristive Boltzmann machine based on our proposed pbit and validate its feasibility by solving NP-hard problems. Furthermore, we propose a streamlined operation methodology that considers the autocorrelation of individual bits, enabling energy-efficient and high-performance probabilistic computing.