Wafer Level Vacuum Packaging of MEMS-Based Uncooled Infrared Sensors

This paper introduces a cost-effective, high-performance approach to achieving wafer level vacuum packaging (WLVP) for MEMS-based uncooled infrared sensors. Reliable and hermetic packages for MEMS devices are achieved using a cap wafer that is formed using two silicon wafers, where one wafer has precise grating/moth-eye structures on both sides of a double-sided polished wafer for improved transmission of over 80% in the long-wave infrared (LWIR) wavelength region without the need for an AR coating, while the other wafer is used to form a cavity. The two wafers are bonded using Au-In transient liquid phase (TLP) bonding at low temperature to form the cap wafer, which is then bondelectrical and Electronics d to the sensor wafer using glass frit bonding at high temperature to activate the getter inside the cavity region. The bond quality is assessed using three methods, including He-leak tests, cap deflection, and Pirani vacuum gauges. Hermeticity is confirmed through He-leak tests according to MIL-STD 883, yielding values as low as 0.1 × 10-9 atm·cc/s. The average shear strength is measured as 23.38 MPa. The package pressure varies from 133-533 Pa without the getter usage to as low as 0.13 Pa with the getter usage.

On-Chip Micro Temperature Controllers Based on Freestanding Thermoelectric Nano Films for Low-Power Electronics

Multidimensional integration and multifunctional component assembly have been greatly explored in recent years to extend Moore's Law of modern microelectronics. However, this inevitably exacerbates the inhomogeneity of temperature distribution in microsystems, making precise temperature control for electronic components extremely challenging. Herein, we report an on-chip micro temperature controller including a pair of thermoelectric legs with a total area of 50 × 50 μm2, which are fabricated from dense and flat freestanding Bi2Te3-based thermoelectric nano films deposited on a newly developed nano graphene oxide membrane substrate. Its tunable equivalent thermal resistance is controlled by electrical currents to achieve energy-efficient temperature control for low-power electronics. A large cooling temperature difference of 44.5 K at 380 K is achieved with a power consumption of only 445 μW, resulting in an ultrahigh temperature control capability over 100 K mW-1. Moreover, an ultra-fast cooling rate exceeding 2000 K s-1 and excellent reliability of up to 1 million cycles are observed. Our proposed on-chip temperature controller is expected to enable further miniaturization and multifunctional integration on a single chip for microelectronics.

Flexible Carbon Nanotube-Epitaxially Grown Nanocrystals for Micro-Thermoelectric Modules

Flexible thermoelectric materials have attracted increasing interest because of their potential use in thermal energy harvesting and high-spatial-resolution thermal management. However, a high-performance flexible micro-thermoelectric device (TED) compatible with the microelectronics fabrication process has not yet been developed. Here a universal epitaxial growth strategy is reported guided by 1D van der Waals-coupling, to fabricate freestanding and flexible hybrids comprised of single-wall carbon nanotubes and ordered (Bi,Sb)2 Te3 nanocrystals. High power factors ranging from ≈1680 to ≈1020 µW m-1 K-2 in the temperature range of 300-480 K, combined with a low thermal conductivity yield a high average figure of merit of ≈0.81. The fabricated flexible micro-TED module consisting of two p-n couples of freestanding thermoelectric hybrids has an unprecedented open circuit voltage of ≈22.7 mV and a power density of ≈0.36 W cm-2 under ≈30 K temperature difference, and a net cooling temperature of ≈22.4 K and a heat absorption density of ≈92.5 W cm-2 .

Micromachined Resonators: A Review

This paper is a review of the remarkable progress that has been made during the past few decades in design, modeling, and fabrication of micromachined resonators. Although micro-resonators have come a long way since their early days of development, they are yet to fulfill the rightful vision of their pervasive use across a wide variety of applications. This is partially due to the complexities associated with the physics that limit their performance, the intricacies involved in the processes that are used in their manufacturing, and the trade-offs in using different transduction mechanisms for their implementation. This work is intended to offer a brief introduction to all such details with references to the most influential contributions in the field for those interested in a deeper understanding of the material.

An analytical formulation for phase noise in MEMS oscillators

In recent years, there has been much interest in the design of low-noise MEMS oscillators. This paper presents a new analytical formulation for noise in a MEMS oscillator encompassing essential resonator and amplifier nonlinearities. The analytical expression for oscillator noise is derived by solving a second-order nonlinear stochastic differential equation. This approach is applied to noise modeling of an electrostatically addressed MEMS resonator-based square-wave oscillator in which the resonator and oscillator circuit nonlinearities are integrated into a single modeling framework. By considering the resulting amplitude and phase relations, we derive additional noise terms resulting from resonator nonlinearities. The phase diffusion of an oscillator is studied and the phase diffusion coefficient is proposed as a metric for noise optimization. The proposed nonlinear phase noise model provides analytical insight into the underlying physics and a pathway toward the design optimization for low-noise MEMS oscillators.

Quantum limit of quality factor in silicon micro and nano mechanical resonators

Micromechanical resonators are promising replacements for quartz crystals for timing and frequency references owing to potential for compactness, integrability with CMOS fabrication processes, low cost, and low power consumption. To be used in high performance reference application, resonators should obtain a high quality factor. The limit of the quality factor achieved by a resonator is set by the material properties, geometry and operating condition. Some recent resonators properly designed for exploiting bulk-acoustic resonance have been demonstrated to operate close to the quantum mechanical limit for the quality factor and frequency product (Q-f). Here, we describe the physics that gives rise to the quantum limit to the Q-f product, explain design strategies for minimizing other dissipation sources, and present new results from several different resonators that approach the limit.

Novel First-Level Interconnect Techniques for Flip Chip on MEMS Devices

Flip-chip packaging is desirable for microelectro-mechanical systems (MEMS) devices because it reduces the overall package size and allows scaling up the number of MEMS chips through 3-D stacks. In this report, we demonstrate three novel techniques to create first-level interconnect (FLI) on MEMS: 1) Dip and attach technology for Ag epoxy; 2) Dispense technology for solder paste; 3) Dispense, pull, and attach technology (DPAT) for solder paste. The above techniques required no additional microfabrication steps, produced no visible surface contamination on the MEMS active structures, and generated high-aspect-ratio interconnects. The developed FLIs were successfully tested on MEMS moveable microelectrodes microfabricated by SUMMiTV^TM process producing no apparent detrimental effect due to outgassing. The bumping processes were successfully applied on Al-deposited bond pads of 100 μm × 100 μm with an average bump height of 101.3 μm for Ag and 184.8 μm for solder (63Sn, 37Pb). DPAT for solder paste produced bumps with the aspect ratio of 1.8 or more. The average shear strengths of Ag and solder bumps were 78 MPa and 689 kPa, respectively. The electrical test on Ag bumps at 794 A/cm² demonstrated reliable electrical interconnects with negligible resistance. These scalable FLI technologies are potentially useful for MEMS flip-chip packaging and 3-D stacking.

Sensing movement: microsensors for body motion measurement

Recognition of body posture and motion is an important physiological function that can keep the body in balance. Man-made motion sensors have also been widely applied for a broad array of biomedical applications including diagnosis of balance disorders and evaluation of energy expenditure. This paper reviews the state-of-the-art sensing components utilized for body motion measurement. The anatomy and working principles of a natural body motion sensor, the human vestibular system, are first described. Various man-made inertial sensors are then elaborated based on their distinctive sensing mechanisms. In particular, both the conventional solid-state motion sensors and the emerging non solid-state motion sensors are depicted. With their lower cost and increased intelligence, man-made motion sensors are expected to play an increasingly important role in biomedical systems for basic research as well as clinical diagnostics.

Sputtered Encapsulation as Wafer Level Packaging for Isolatable MEMS Devices: A Technique Demonstrated on a Capacitive Accelerometer

This paper discusses sputtered silicon encapsulation as a wafer level packaging approach for isolatable MEMS devices. Devices such as accelerometers, RF switches, inductors, and filters that do not require interaction with the surroundings to function, could thus be fully encapsulated at the wafer level after fabrication. A MEMSTech 50g capacitive accelerometer was used to demonstrate a sputtered encapsulation technique. Encapsulation with a very uniform surface profile was achieved using spin-on glass (SOG) as a sacrificial layer, SU-8 as base layer, RF sputtered silicon as main structural layer, eutectic gold-silicon as seal layer, and liquid crystal polymer (LCP) as outer encapsulant layer. SEM inspection and capacitance test indicated that the movable elements were released after encapsulation. Nanoindentation test confirmed that the encapsulated device is sufficiently robust to withstand a transfer molding process. Thus, an encapsulation technique that is robust, CMOS compatible, and economical has been successfully developed for packaging isolatable MEMS devices at the wafer level.