The 128-channel fully differential digital integrated neural recording and stimulation interface

Modeling and Analysis of Environmental Electromagnetic Interference in Multiple-Channel Neural Recording Systems for High Common-Mode Interference Rejection Performance

Environmental electromagnetic interference (EMI) has always been a major interference source for multiple-channel neural recording systems, and little theoretical work has been attempted to address it. In this paper, equivalent circuit models are proposed to model both electromagnetic interference sources and neural signals in such systems, and analysis has been performed to generate the design guidelines for neural probes and the subsequent recording circuit towards higher common-mode interference (CMI) rejection performance while maintaining the recorded neural action potential (AP) signal quality. In vivo animal experiments with a configurable 32-channel neural recording system are carried out to validate the proposed models and design guidelines. The results show the power spectral density (PSD) of environmental 50 Hz EMI interference is reduced by three orders from 4.43 × 10-3 V2/Hz to 4.04 × 10-6 V2/Hz without affecting the recorded AP signal quality in an unshielded experiment environment.

Versatile On-Chip Programming of Circuit Hardware for Wearable and Implantable Biomedical Microdevices

Wearable and implantable microscale electronic sensors have been developed for a range of biomedical applications. The sensors, typically millimeter size silicon microchips, are sought for multiple sensing functions but are severely constrained by size and power. To address these challenges, a hardware programmable application-specific integrated circuit design is proposed and post-process methodology is exemplified by the design of battery-less wireless microchips. Specifically, both mixed-signal and radio frequency circuits are designed by incorporating metal fuses and anti-fuses on the top metal layer to enable programmability of any number of features in hardware of the system-on-chip (SoC) designs. This is accomplished in post-foundry editing by combining laser ablation and focused ion beam processing. The programmability provided by the technique can significantly accelerate the SoC chip development process by enabling the exploration of multiple internal circuit parameters without the requirement of additional programming pads or extra power consumption. As examples, experimental results are described for sub-millimeter size complementary metal-oxide-semiconductor microchips being developed for wireless electroencephalogram sensors and as implantable microstimulators for neural interfaces. The editing technique can be broadly applicable for miniaturized biomedical wearables and implants, opening up new possibilities for their expedited development and adoption in the field of smart healthcare.

A 14-Bit, 12 V-to-100 V Voltage Compliance Electrical Stimulator with Redundant Digital Calibration

Electrical stimulation is an important technique for modulating the functions of the nervous system through electrical stimulus. To implement a more competitive prototype that can tackle the domain-specific difficulties of existing electrical stimulators, three key techniques are proposed in this work. Firstly, a load-adaptive power saving technique called over-voltage detection is implemented to automatically adjust the supply voltage. Secondly, redundant digital calibration (RDC) is proposed to improve current accuracy and ensure safety during long-term electrical stimulation without costing too much circuit area and power. Thirdly, a flexible waveform generator is designed to provide arbitrary stimulus waveforms for particular applications. Measurement results show the stimulator can adjust the supply voltage from 12 V to 100 V automatically, and the measured effective resolution of the stimulation current reaches 14 bits in a full range of 6.5 mA. Without applying charge balancing techniques, the average mismatch between the cathodic and anodic current pulses in biphasic stimulus is 0.0427%. The proposed electrical stimulator can generate arbitrary stimulus waveforms, including sine, triangle, rectangle, etc., and it is supposed to be competitive for implantable and wearable devices.

A Portable and a Scalable Multi-Channel Wireless Recording System for Wearable Electromyometrial Imaging

Electromyometrial imaging (EMMI) technology has emerged as one of the promising technology that can be used for non-invasive pregnancy risk stratification and for preventing complications due to pre-term birth. Current EMMI systems are bulky and require a tethered connection to desktop instrumentation, as a result, the system cannot be used in non-clinical and ambulatory settings. In this article, we propose an approach for designing a scalable, portable wireless EMMI recording system that can be used for in-home and remote monitoring. The wearable system uses a non-equilibrium differential electrode multiplexing approach to enhance signal acquisition bandwidth and to reduce the artifacts due to electrode drifts, amplifier 1/f noise, and bio-potential amplifier saturation. A combination of active shielding, a passive filter network, and a high-end instrumentation amplifier ensures sufficient input dynamic range ([Formula: see text]) such that the system can simultaneously acquire different bio-potential signals like maternal electrocardiogram (ECG) in addition to the EMMI electromyogram (EMG) signals. We show that the switching artifacts and the channel cross-talk introduced due to non-equilibrium sampling can be reduced using a compensation technique. This enables the system to be potentially scaled to a large number of channels without significantly increasing the system power dissipation. We demonstrate the feasibility of the proposed approach in a clinical setting using an 8-channel battery-powered prototype which dissipates less than 8 μW per channel for a signal bandwidth of 1 KHz.

A Multimodal and Multifunctional CMOS Cellular Interfacing Array for Digital Physiology and Pathology Featuring an Ultra Dense Pixel Array and Reconfigurable Sampling Rate

The article presents a fully integrated multimodal and multifunctional CMOS biosensing/actuating array chip and system for multi-dimensional cellular/tissue characterization. The CMOS chip supports up to 1,568 simultaneous parallel readout channels across 21,952 individually addressable multimodal pixels with 13 μm × 13 μm 2-D pixel pitch along with 1,568 Pt reference electrodes. These features allow the CMOS array chip to perform multimodal physiological measurements on living cell/tissue samples with both high throughput and single-cell resolution. Each pixel supports three sensing and one actuating modalities, each reconfigurable for different functionalities, in the form of full array (FA) or fast scan (FS) voltage recording schemes, bright/dim optical detection, 2-/4-point impedance sensing (ZS), and biphasic current stimulation (BCS) with adjustable stimulation area for single-cell or tissue-level stimulation. Each multi-modal pixel contains an 8.84 μm × 11 μm Pt electrode, 4.16 μm × 7.2 μm photodiode (PD), and in-pixel circuits for PD measurements and pixel selection. The chip is fabricated in a standard 130nm BiCMOS process as a proof of concept. The on-chip electrodes are constructed by unique design and in-house post-CMOS fabrication processes, including a critical Al shorting of all pixels during fabrication and Al etching after fabrication that ensures a high-yield planar electrode array on CMOS with high biocompatibility and long-term measurement reliability. For demonstration, extensive biological testing is performed with human and mouse progenitor cells, in which multidimensional biophysiological data are acquired for comprehensive cellular characterization.

A Direct Digitizing Chopped Neural Recorder Using a Body-Induced Offset Based DC Servo Loop

This article presents a direct digitizing neural recorder that uses a body-induced offset based DC servo loop to cancel electrode offset (EDO) on-chip. The bulk of the input pair is used to create an offset, counteracting the EDO. The architecture does not require AC coupling capacitors which enables the use of chopping without impedance boosting while maintaining a large input impedance of 238 M Ω over the whole 10 kHz bandwidth. Implemented in a 180 nm HV-CMOS process, the prototype occupies a silicon area of only 0.02 mm² while consuming 12.8 μW and achieving 1.82 μV[Formula: see text] of input-referred noise in the local field potential (LFP) band and a NEF of 5.75.

Design of a low-noise low-voltage amplifier for improved neural signal recording

Design of amplifier circuits with low-noise operable at low-power to be used, especially for implantable neural interfaces, remains a huge challenge. This research paper presents the design of a low-noise low-voltage neural recording amplifier suitable for amplifying local field potentials and extracellular action potentials so as to meet the end requirement of an implantable neuro-medical system. Critical performance parameters of the smaller circuit blocks of the complete neural amplifier architecture have been found with the help of detailed mathematical analysis and then verified by the simulations conducted using 0.18 µm 4M1P foundry Semi-conductor Laboratory N-well process. The neural amplifier design proposed in this paper passes neural signal of interest with a mid-band gain of 49.9 dB over a bandwidth of 5.3 Hz-8.6 kHz, draws only 11.5 µW of power from ±0.9 V supply voltage, and exhibits an input-referred noise of 2.6 µV_rms with a noise efficiency factor of 2.27. The area consumed by the proposed neural amplifier architecture is 0.192 mm². The complete circuit design carried out in this paper should prove to be useful in equipment for the diagnosis of neurological disorders.

Noise Power Minimization in CMOS Brain-Chip Interfaces

This paper presents specific noise minimization strategies to be adopted in silicon–cell interfaces. For this objective, a complete and general model for the analog processing of the signal coming from cell–silicon junctions is presented. This model will then be described at the level of the single stages and of the fundamental parameters that characterize them (bandwidth, gain and noise). Thanks to a few design equations, it will therefore be possible to simulate the behavior of a time-division multiplexed acquisition channel, including the most relevant parameters for signal processing, such as amplification (or power of the analog signal) and noise. This model has the undoubted advantage of being particularly simple to simulate and implement, while maintaining high accuracy in estimating the signal quality (i.e., the signal-to-noise ratio, SNR). Thanks to the simulation results of the model, it will be possible to set an optimal operating point for the front-end to minimize the artifacts introduced by the time-division multiplexing (TDM) scheme and to maximize the SNR at the a-to-d converter input. The proposed results provide an SNR of 12 dB at 10 µV_RMS of noise power and 50 µV_RMS of signal power (both evaluated at input of the analog front-end, AFE). This is particularly relevant for cell–silicon junctions because it demonstrates that it is possible to detect weak extracellular events (of the order of few µV_RMS) without necessarily increasing the total amplification of the front-end (and, therefore, as a first approximation, the dissipated electrical power), while adopting a specific gain distribution through the acquisition chain.

A Charge Balanced Neural Stimulator Silicon Chip for Human-Machine Interface

This paper proposes a neural stimulator silicon chip design with an improved charge balancing technology. The proposed neural stimulation integrated circuit (IC) uses two charge balancing modules including synchronous charge detection module and short-time pulse insertion module. The synchronous charge detection module is designed based on a current splitter with ultra-small output current and an integrator circuit for neural stimulation pulse width control, which greatly reduces the residual charge remained on the electrode-tissue interface. The short-time pulse insertion module is designed based on the electrode voltage detection and compensation current control, which further reduces the accumulated residual charge and keeps the electrode voltage within a safety range of ±25 mV during multiple stimulation cycles. Finally, this neural stimulator is implemented in TSMC 0.18-μm CMOS process technology, and the chip function is tested and verified in both experiments with the electrode-tissue RC model and the PBS saline solution environment. The measurement result shows the neural stimulator chip achieves improved charge balancing with the residual charge smaller than 0.95 nC, which is the lowest compared to the traditional neural stimulator chips.

Electrode pooling can boost the yield of extracellular recordings with switchable silicon probes

State-of-the-art silicon probes for electrical recording from neurons have thousands of recording sites. However, due to volume limitations there are typically many fewer wires carrying signals off the probe, which restricts the number of channels that can be recorded simultaneously. To overcome this fundamental constraint, we propose a method called electrode pooling that uses a single wire to serve many recording sites through a set of controllable switches. Here we present the framework behind this method and an experimental strategy to support it. We then demonstrate its feasibility by implementing electrode pooling on the Neuropixels 1.0 electrode array and characterizing its effect on signal and noise. Finally we use simulations to explore the conditions under which electrode pooling saves wires without compromising the content of the recordings. We make recommendations on the design of future devices to take advantage of this strategy.

Advanced Metallic and Polymeric Coatings for Neural Interfacing: Structures, Properties and Tissue Responses

Neural electrodes are essential for nerve signal recording, neurostimulation, neuroprosthetics and neuroregeneration, which are critical for the advancement of brain science and the establishment of the next-generation brain-electronic interface, central nerve system therapeutics and artificial intelligence. However, the existing neural electrodes suffer from drawbacks such as foreign body responses, low sensitivity and limited functionalities. In order to overcome the drawbacks, efforts have been made to create new constructions and configurations of neural electrodes from soft materials, but it is also more practical and economic to improve the functionalities of the existing neural electrodes via surface coatings. In this article, recently reported surface coatings for neural electrodes are carefully categorized and analyzed. The coatings are classified into different categories based on their chemical compositions, i.e., metals, metal oxides, carbons, conducting polymers and hydrogels. The characteristic microstructures, electrochemical properties and fabrication methods of the coatings are comprehensively presented, and their structure-property correlations are discussed. Special focus is given to the biocompatibilities of the coatings, including their foreign-body response, cell affinity, and long-term stability during implantation. This review article can provide useful and sophisticated insights into the functional design, material selection and structural configuration for the next-generation multifunctional coatings of neural electrodes.

A Dual-Mode Multifunctional Pulsed Radio-Frequency Stimulator for Trigeminal Neuralgia Relief and its Animal Model

This work proposed a programmable pulsed radio-frequency (PRF) stimulator for trigeminal neuralgia (TN) relief on demand. The implantable stimulator is a miniaturized micro-system which integrates a wireless interface circuit, a sensor interface circuit, a PRF pattern generation circuit and a logic controller. The multifunctional stimulator capable of delivering current/voltage stimulation provides the choice of the biphasic sinusoidal, square and patterned waveform for PRF treatment researches. The external handheld device can wirelessly transmit the parameters of frequency, amplitude, pulse duration and repetition rate of the pulse train to the implanted stimulator. While stimulating, the temperature sensor can monitor the operating temperature. The feedback signal is transmitted in medical implanted communication system (MICS). The micro-system is fabricated in a 0.35 μm CMOS process with a chip size of 3.1 × 2.7 mm². The fabricated chip was mounted on a 2.6 × 2.1 cm² test board for studying the in vivo efficacy of pain relief by PRF. Animal studies of PRF stimulation and commonly-used medication for trigeminal neuralgia are also demonstrated and the presented results prove that PRF stimulation has greater effectiveness on trigeminal neuralgia relief comparing to the medication. The effectiveness period lasts at least 14 days. The results of neural recording show that the PRF stimulation of trigeminal ganglion (TG) attenuated neuron activities without being severely damaged. Pathology also revealed no lesion found on the stimulated area.

Light Modulation of Brain and Development of Relevant Equipment

Light modulation plays an important role in understanding the pathology of brain disorders and improving brain function. Optogenetic techniques can activate or silence targeted neurons with high temporal and spatial accuracy and provide precise control, and have recently become a method for quick manipulation of genetically identified types of neurons. Photobiomodulation (PBM) is light therapy that utilizes non-ionizing light sources, including lasers, light emitting diodes, or broadband light. It provides a safe means of modulating brain activity without any irreversible damage and has established optimal treatment parameters in clinical practice. This manuscript reviews 1) how optogenetic approaches have been used to dissect neural circuits in animal models of Alzheimer's disease, Parkinson's disease, and depression, and 2) how low level transcranial lasers and LED stimulation in humans improves brain activity patterns in these diseases. State-of-the-art brain machine interfaces that can record neural activity and stimulate neurons with light have good prospects in the future.

Frequency-Division Multiplexing with Graphene Active Electrodes for Neurosensor Applications

Multielectrode arrays are used broadly for neural recording, both in vivo and for ex vivo cultured neurons. In most cases, recording sites are passive electrodes wired to external read-out circuitry, and the number of wires is at least equal to the number of recording sites. We present an approach to break the conventional N-wire, N-electrode array architecture using graphene active electrodes, which allow signal upconversion at the recording site and sharing of each interface wire among multiple active electrodes using frequency-division multiplexing (FDM). The presented work includes the design and implementation of a frequency modulation and readout architecture using graphene FET electrodes, a custom integrated circuit (IC) analog front-end (AFE), and digital demodulation. The AFE was fabricated in 0.18 μm CMOS; electrical characterization and multi-channel FDM results are provided, including GFET-based signal modulation and IC/DSP demodulation. Long-term, this approach can simultaneously enable high signal count, high spatial resolution, and high temporal precision to infer functional interactions between neurons while markedly decreasing access wires.

Analysis and Reduction of Nonlinear Distortion in AC-Coupled CMOS Neural Amplifiers with Tunable Cutoff Frequencies

Integrated CMOS neural amplifiers are key elements of modern large-scale neuroelectronic interfaces. The neural amplifiers are routinely AC-coupled to electrodes to remove the DC voltage. The large resistances required for the AC coupling circuit are usually realized using MOSFETs that are nonlinear. Specifically, designs with tunable cutoff frequency of the input high‑pass filter may suffer from excessive nonlinearity, since the gate-source voltages of the transistors forming the pseudoresistors vary following the signal being amplified. Consequently, the nonlinear distortion in such circuits may be high for signal frequencies close to the cutoff frequency of the input filter. Here we propose a simple modification of the architecture of a tunable AC-coupled amplifier, in which the bias voltages V_gs of the transistors forming the pseudoresistor are kept constant independently of the signal levels, what results in significantly improved linearity. Based on numerical simulations of the proposed circuit designed in 180 nm technology we analyze the Total Harmonic Distortion levels as a function of signal frequency and amplitude. We also investigate the impact of basic amplifier parameters—gain, cutoff frequency of the AC coupling circuit, and silicon area—on the distortion and noise performance. The post-layout simulations of the complete test ASIC show that the distortion is very significantly reduced at frequencies near the cutoff frequency, when compared to the commonly used circuits. The THD values are below 1.17% for signal frequencies 1 Hz–10 kHz and signal amplitudes up to 10 mV peak-to-peak. The preamplifier area is only 0.0046 mm² and the noise is 8.3 µV_rms in the 1 Hz–10 kHz range. To our knowledge this is the first report on a CMOS neural amplifier with systematic characterization of THD across complete range of frequencies and amplitudes of neuronal signals recorded by extracellular electrodes.

Low-Power Wireless Data Transfer System for Stimulation in an Intracortical Visual Prosthesis

There is a growing interest to improve the quality of life of blind people. An implanted intracortical prosthesis could be the last resort in many cases of visual impairment. Technology at this moment is at a stage that implementation is at sight. Making the data communication to and from the implanted electrodes wireless is beneficial to avoid infection and to ease mobility. Here, we focus on the stimulation side, or downlink, for which we propose a low-power non-coherent digital demodulator on the implanted receiver. The experimentally demonstrated downlink is on a scaled-down version at a 1 MHz carrier frequency showing a data rate of 125 kbps. This provides proof of principle for the system with a 12 MHz carrier frequency and a data rate of 4 Mbps, which consumes under 1 mW at the receiver side in integrated circuit (IC) simulation. Due to its digital architecture, the system is easily adjustable to an ISM frequency band with its power consumption scaling linearly with the carrier frequency. The tested system uses off-the-shelf coils, which gave sufficient bandwidth, while staying within safe SAR limits. The digital receiver achieved a reduction in power consumption by skipping clock cycles of redundant bits. The system shows a promising pathway to a low-power wireless-enabled visual prosthesis.

From Seizure Detection to Smart and Fully Embedded Seizure Prediction Engine: A Review

Recent review papers have investigated seizure prediction, creating the possibility of preempting epileptic seizures. Correct seizure prediction can significantly improve the standard of living for the majority of epileptic patients, as the unpredictability of seizures is a major concern for them. Today, the development of algorithms, particularly in the field of machine learning, enables reliable and accurate seizure prediction using desktop computers. However, despite extensive research effort being devoted to developing seizure detection integrated circuits (ICs), dedicated seizure prediction ICs have not been developed yet. We believe that interdisciplinary study of system architecture, analog and digital ICs, and machine learning algorithms can promote the translation of scientific theory to a more realistic intelligent, integrated, and low-power system that can truly improve the standard of living for epileptic patients. This review explores topics ranging from signal acquisition analog circuits to classification algorithms and dedicated digital signal processing circuits for detection and prediction purposes, to provide a comprehensive and useful guideline for the construction, implementation and optimization of wearable and integrated smart seizure prediction systems.

Low power switched-resistor band-pass filter for neural recording channels in 130nm CMOS

In this work, we present a low-power 2^nd order band-pass filter for neural recording applications. The central frequency of the passband is set to 375Hz and the quality factor to 5 to properly process the neural signals related to the onset of epileptic seizure, and to strongly attenuate all the out of band biological signals and electrical disturbances. The biquad filter is based on a fully differential Tow Thomas architecture in which high-valued resistors are implemented through switched high-resistivity polysilicon resistors. A supply voltage as low as 0.8V and MOS transistors operating in the sub-threshold region are exploited to achieve a power consumption as low as 170nW, when driving a 1pF load capacitance. The filter exhibits a tuning range of the resonance frequency from 200Hz to 400Hz, and an area footprint of only 0.021 mm². Very low power consumption and area occupation are key specifications for integrated, multiple-sensors, neural recording systems.

A low-power band of neuronal spiking activity dominated by local single units improves the performance of brain-machine interfaces

The large power requirement of current brain-machine interfaces is a major hindrance to their clinical translation. In basic behavioural tasks, the downsampled magnitude of the 300-1,000 Hz band of spiking activity can predict movement similarly to the threshold crossing rate (TCR) at 30 kilo-samples per second. However, the relationship between such a spiking-band power (SBP) and neural activity remains unclear, as does the capability of using the SBP to decode complicated behaviour. By using simulations of recordings of neural activity, here we show that the SBP is dominated by local single-unit spikes with spatial specificity comparable to or better than that of the TCR, and that the SBP correlates better with the firing rates of lower signal-to-noise-ratio units than the TCR. With non-human primates, in an online task involving the one-dimensional decoding of the movement of finger groups and in an offline two-dimensional cursor-control task, the SBP performed equally well or better than the TCR. The SBP may enhance the decoding performance of neural interfaces while enabling substantial cuts in power consumption.

Discriminative Ratio of Spectral Power and Relative Power Features Derived via Frequency-Domain Model Ratio With Application to Seizure Prediction

The ratio of spectral power in two different bands and relative band power have been shown to be sometimes more discriminative features than the spectral power in a specific band for binary classification of a time series for seizure prediction. However, why and which ratio of spectral power and relative power features are better discriminators than a band power have not been understood. While general answers to why and which are difficult, this paper partially addresses the answer to these questions. Using auto-regressive modeling, this paper, for the first time, theoretically explains that for high signal-to-noise ratio (SNR) cases, the ratio features may sometime amplify the discriminability of one of the two states in a time series, as compared with a band power. This paper, also for the first time, introduces a novel frequency-domain model ratio (FDMR) that can be used to select the two frequency bands. The FDMR computes the ratio of the frequency responses of the two auto-regressive model filters that correspond to two different states. It is shown that the ratio implicitly cancels the effect of change of variance of the white noise that is input to the auto-regressive model in a non-stationary environment for high SNR conditions. It is also shown that under certain sufficient but not necessary conditions, the ratio of the spectral power and the relative band power, i.e., the band power divided by the total power spectral density, can be better discriminators than band power. Synthesized data and scalp EEG data from the MIT Physionet for patient-specific seizure prediction are used to explain why the ratios of spectral power obtained by a ranking algorithm in the prior literature satisfy the sufficient conditions for amplification of the ratio feature derived in this paper.

Compact and Low-Power Neural Spike Compression Using Undercomplete Autoencoders

Implantable microsystems that collect and transmit neural data are becoming very useful entities in the field of neuroscience. Limited by high data rates, on-chip compression is often required to transmit the recorded data without causing power dissipation at levels that would damage sensitive brain tissue. This paper presents a data compression system designed for brain-computer interfaces (BCIs) based on undercomplete autoencoders. To the best of our knowledge, the proposed system is the first to achieve an average spike reconstruction quality of 14-dB signal-to-noise-and-distortion ratio (SNDR) at a 32× compression ratio (CR), 18-dB SNDR at a 16× CR, 22-dB SNDR at an 8× CR, and 35-dB SNDR at a 4× CR of neural spikes. The spike detection and autoencoder-based compression modules are designed and implemented in a standard 45-nm CMOS process. The post-synthesis simulation results report that the compression module consumes between 1.4 and 222.5 [Formula: see text] of power per channel and takes between 0.018 and 0.082mm² of silicon area, depending on the desired CR and number of channels.

An Unsupervised Compressed Sensing Algorithm for Multi-Channel Neural Recording and Spike Sorting

We propose an unsupervised compressed sensing (CS)-based framework to compress, recover, and cluster neural action potentials. This framework can be easily integrated into high-density multi-electrode neural recording VLSI systems. Embedding spectral clustering and group structures in dictionary learning, we extend the proposed framework to unsupervised spike sorting without prior label information. Additionally, we incorporate group sparsity concepts in the dictionary learning to enable the framework for multi-channel neural recordings, as in tetrodes. To further improve spike sorting success rates in the CS framework, we embed template matching in sparse coding to jointly predict clusters of spikes. Our experimental results demonstrate that the proposed CS-based framework can achieve a high compression ratio (8:1 to 20:1), with a high quality reconstruction performance (>8 dB) and a high spike sorting accuracy (>90%).

Arbitrary-Waveform Electro-Optical Intracranial Neurostimulator With Load-Adaptive High-Voltage Compliance

A hybrid 16-channel current-mode and the 8-channel optical implantable neurostimulating system is presented. The system generates arbitrary-waveform charge-balanced current-mode electrical pulses with an amplitude ranging from 50 [Formula: see text] to 10 mA. An impedance monitoring feedback loop is employed to automatically adjust the supply voltage, yielding a load-optimized power dissipation. The 8-channel optical stimulator drives an array of LEDs, each with a maximum of 25 mA current amplitude, and reuses the arbitrary-waveform generation function of the electrical stimulator. The LEDs are assembled within a custom-made 4×4 ECoG grid electrode array, enabling precise optical stimulation of neurons with a 300 [Formula: see text] pitch between the LEDs and simultaneous monitoring of the neural response by the ECoG electrode, at different distances of the stimulation site. The hybrid stimulation system is implemented on a mini-PCB, and receives power and stimulation commands inductively through a second board and a coil stacked on top of it. The entire system is sized at 3×2 . 5×1 cm³ and weighs 7 grams. The system efficacy for electrical and optical stimulation is validated in-vivo using separate chronic and acute experiments.

Methods for powering bioelectronic microdevices

Bioelectronic microdevices are an emerging class of biomedical devices miniaturized at the scale of a millimeter or less, which promise new capabilities for monitoring and treating human disease. Although rapid progress has been made in the sensing and actuation capabilities of microdevices, a major technological challenge remains in the way that these devices are powered within the body. In this review, we revisit the power requirements of microdevices, describe current methods for storing, transferring or harvesting energy in microdevices, provide an overview of emerging powering approaches and discuss the promise of microdevices in biomedicine.

Towards miniaturized closed-loop optogenetic stimulation devices

OBJECTIVE

Electrical brain stimulation provides therapeutic benefits for patients with drug-resistant neurological disorders. It, however, has restricted access to cell-type selectivity which limits its treatment effectiveness. Optogenetics, in contrast, enables precise targeting of a specific cell type which can address the issue with electrical brain stimulation. It, nonetheless, disregards real-time brain responses in delivering optimized stimulation to target cells. Closed-loop optogenetics, on the other hand, senses the difference between normal and abnormal states of the brain, and modulates stimulation parameters to achieve the desired stimulation outcome. Current review articles on closed-loop optogenetics have focused on its theoretical aspects and potential benefits. A review of the recent progress in miniaturized closed-loop optogenetic stimulation devices is thus needed.

APPROACH

This paper presents a comprehensive study on the existing miniaturized closed-loop optogenetic stimulation devices and their internal components.

MAIN RESULTS

Hardware components of closed-loop optogenetic stimulation devices including electrode, light-guiding mechanism, optical source, neural recorder, and optical stimulator are discussed. Next, software modules of closed-loop optogenetic stimulation devices including feature extraction, classification, control, and stimulation parameter modulation are described. Then, the existing devices are categorized into open-loop and closed-loop groups, and the combined operation of their neural recorder, optical stimulator, and control approach is discussed. Finally, the challenges in the design and implementation of closed-loop optogenetic stimulation devices are presented, suggestions on how to tackle these challenges are given, and future directions for closed-loop optogenetics are stated.

SIGNIFICANCE

A generic architecture for closed-loop optogenetic stimulation devices involving both hardware and software perspectives is devised. A comprehensive investigation into the most current miniaturized and tetherless closed-loop optogenetic stimulation devices is given. A detailed comparison of the closed-loop optogenetic stimulation devices is presented.

A Time-Domain Analog Spatial Compressed Sensing Encoder for Multi-Channel Neural Recording

A time-domain analog spatial compressed sensing encoder for neural recording applications is proposed. Owing to the advantage of MEMS technologies, the number of channels on a silicon neural probe array has doubled in 7.4 years, and therefore, a greater number of recording channels and higher density of front-end circuitry is required. Since neural signals such as action potential (AP) have wider signal bandwidth than that of an image sensor, a data compression technique is essentially required for arrayed neural recording systems. In this paper, compressed sensing (CS) is employed for data reduction, and a novel time-domain analog CS encoder is proposed. A simpler and lower power circuit than conventional analog or digital CS encoders can be realized by using the proposed CS encoder. A prototype of the proposed encoder was fabricated in a 180 nm 1P6M CMOS process, and it achieved an active area of 0.0342 mm 2 / ch . and an energy efficiency of 25.0 pJ / ch . · conv .

Ultrahigh-Density 256-Channel Neural Sensing Microsystem Using TSV-Embedded Neural Probes

Highly integrated neural sensing microsystems are crucial to capture accurate signals for brain function investigations. In this paper, a 256-channel neural sensing microsystem with a sensing area of 5 × 5 mm ² is presented based on 2.5-D through-silicon-via (TSV) integration. This microsystem composes of dissolvable μ-needles, TSV-embedded μ-probes, 256-channel neural amplifiers, 11-bit area-power-efficient successive approximation register analog-to-digital converters, and serializers. This microsystem can detect 256 electrocorticography and local field potential signals within a small area of 5 mm × 5 mm. The neural amplifier realizes 57.8 dB gain with only 9.8 μW per channel. The overall power of this microsystem is only 3.79 mW for 256-channel neural sensing. A smaller microsystem with dimension of 6 mm × 4 mm has been also implanted into rat brain for somatosensory evoked potentials (SSEPs) recording by using contralateral and ipsilateral electrical stimuli with intensity from 0.2 to 1.0 mA, and successfully observed different SSEPs from left somatosensory cortex of a rat.

Stimulation Efficiency With Decaying Exponential Waveforms in a Wirelessly Powered Switched-Capacitor Discharge Stimulation System

The purpose of this study was to test the feasibility of using a switched-capacitor discharge stimulation (SCDS) system for electrical stimulation, and, subsequently, determine the overall energy saved compared to a conventional stimulator. We have constructed a computational model by pairing an image-based volume conductor model of the cat head with cable models of corticospinal tract (CST) axons and quantified the theoretical stimulation efficiency of rectangular and decaying exponential waveforms, produced by conventional and SCDS systems, respectively. Subsequently, the model predictions were tested in vivo by activating axons in the posterior internal capsule and recording evoked electromyography (EMG) in the contralateral upper arm muscles. Compared to rectangular waveforms, decaying exponential waveforms with time constants >500 μs were predicted to require 2%-4% less stimulus energy to activate directly models of CST axons and 0.4%-2% less stimulus energy to evoke EMG activity in vivo. Using the calculated wireless input energy of the stimulation system and the measured stimulus energies required to evoke EMG activity, we predict that an SCDS implantable pulse generator (IPG) will require 40% less input energy than a conventional IPG to activate target neural elements. A wireless SCDS IPG that is more energy efficient than a conventional IPG will reduce the size of an implant, require that less wireless energy be transmitted through the skin, and extend the lifetime of the battery in the external power transmitter.

High Density, High Radiance $\mu$ LED Matrix for Optogenetic Retinal Prostheses and Planar Neural Stimulation

Optical neuron stimulation arrays are important for both in-vitro biology and retinal prosthetic biomedical applications. Hence, in this work, we present an 8100 pixel high radiance photonic stimulator. The chip module vertically combines custom made gallium nitride μ LEDs with a CMOS application specific integrated circuit. This is designed with active pixels to ensure random access and to allow continuous illumination of all required pixels. The μLEDs have been assembled on the chip using a solder ball flip-chip bonding technique which has allowed for reliable and repeatable manufacture. We have evaluated the performance of the matrix by measuring the different factors including the static, dynamic power consumption, the illumination, and the current consumption by each LED. We show that the power consumption is within a range suitable for portable use. Finally, the thermal behavior of the matrix is monitored and the matrix proved to be thermally stable.

Active Electrodes for Wearable EEG Acquisition: Review and Electronics Design Methodology

Active electrodes (AEs), i.e., electrodes with built-in readout circuitry, are increasingly being implemented in wearable healthcare and lifestyle applications due to AEs' robustness to environmental interference. An AE locally amplifies and buffers μV-level EEG signals before driving any cabling. The low output impedance of an AE mitigates cable motion artifacts, thus enabling the use of high-impedance dry electrodes for greater user comfort. However, developing a wearable EEG system, with medical grade signal quality on noise, electrode offset tolerance, common-mode rejection ratio, input impedance, and power dissipation, remains a challenging task. This paper reviews state-of-the-art bio-amplifier architectures and low-power analog circuits design techniques intended for wearable EEG acquisition, with a special focus on an AE system interfaced with dry electrodes.

State-of-the-art MEMS and microsystem tools for brain research

Mapping brain activity has received growing worldwide interest because it is expected to improve disease treatment and allow for the development of important neuromorphic computational methods. MEMS and microsystems are expected to continue to offer new and exciting solutions to meet the need for high-density, high-fidelity neural interfaces. Herein, the state-of-the-art in recording and stimulation tools for brain research is reviewed, and some of the most significant technology trends shaping the field of neurotechnology are discussed.

An integrated interface for peripheral neural system recording and stimulation: system design, electrical tests and in-vivo results

The prototype of an electronic bi-directional interface between the Peripheral Nervous System (PNS) and a neuro-controlled hand prosthesis is presented. The system is composed of 2 integrated circuits: a standard CMOS device for neural recording and a HVCMOS device for neural stimulation. The integrated circuits have been realized in 2 different 0.35μ m CMOS processes available from ams. The complete system incorporates 8 channels each including the analog front-end, the A/D conversion, based on a sigma delta architecture and a programmable stimulation module implemented as a 5-bit current DAC; two voltage boosters supply the output stimulation stage with a programmable voltage scalable up to 17V. Successful in-vivo experiments with rats having a TIME electrode implanted in the sciatic nerve were carried out, showing the capability of recording neural signals in the tens of microvolts, with a global noise of 7μ V r m s , and to selectively elicit the tibial and plantar muscles using different active sites of the electrode.

A Wireless 32-Channel Implantable Bidirectional Brain Machine Interface

All neural information systems (NIS) rely on sensing neural activity to supply commands and control signals for computers, machines and a variety of prosthetic devices. Invasive systems achieve a high signal-to-noise ratio (SNR) by eliminating the volume conduction problems caused by tissue and bone. An implantable brain machine interface (BMI) using intracortical electrodes provides excellent detection of a broad range of frequency oscillatory activities through the placement of a sensor in direct contact with cortex. This paper introduces a compact-sized implantable wireless 32-channel bidirectional brain machine interface (BBMI) to be used with freely-moving primates. The system is designed to monitor brain sensorimotor rhythms and present current stimuli with a configurable duration, frequency and amplitude in real time to the brain based on the brain activity report. The battery is charged via a novel ultrasonic wireless power delivery module developed for efficient delivery of power into a deeply-implanted system. The system was successfully tested through bench tests and in vivo tests on a behaving primate to record the local field potential (LFP) oscillation and stimulate the target area at the same time.

Neuronix enables continuous, simultaneous neural recording and electrical microstimulation

This paper reports a novel neurotechnology (Neuronix) and its validation through experiments. It is a miniature system-on-chip (SoC) that allows recording with simultaneous electrical microstimulation. This function has not been demonstrated before and enables precise, closed-loop neuromodulation. Neuronix represents recent advancement in brain technology and applies to both animal research and clinical applications.

A 128-Channel Extreme Learning Machine-Based Neural Decoder for Brain Machine Interfaces

Currently, state-of-the-art motor intention decoding algorithms in brain-machine interfaces are mostly implemented on a PC and consume significant amount of power. A machine learning coprocessor in 0.35- μm CMOS for the motor intention decoding in the brain-machine interfaces is presented in this paper. Using Extreme Learning Machine algorithm and low-power analog processing, it achieves an energy efficiency of 3.45 pJ/MAC at a classification rate of 50 Hz. The learning in second stage and corresponding digitally stored coefficients are used to increase robustness of the core analog processor. The chip is verified with neural data recorded in monkey finger movements experiment, achieving a decoding accuracy of 99.3% for movement type. The same coprocessor is also used to decode time of movement from asynchronous neural spikes. With time-delayed feature dimension enhancement, the classification accuracy can be increased by 5% with limited number of input channels. Further, a sparsity promoting training scheme enables reduction of number of programmable weights by ≈ 2X.

A Single-Chip Full-Duplex High Speed Transceiver for Multi-Site Stimulating and Recording Neural Implants

We present a novel, fully-integrated, low-power full-duplex transceiver (FDT) to support high-density and bidirectional neural interfacing applications (high-channel count stimulating and recording) with asymmetric data rates: higher rates are required for recording (uplink signals) than stimulation (downlink signals). The transmitter (TX) and receiver (RX) share a single antenna to reduce implant size and complexity. The TX uses impulse radio ultra-wide band (IR-UWB) based on an edge combining approach, and the RX uses a novel 2.4-GHz on-off keying (OOK) receiver. Proper isolation (>20 dB) between the TX and RX path is implemented 1) by shaping the transmitted pulses to fall within the unregulated UWB spectrum (3.1-7 GHz), and 2) by space-efficient filtering (avoiding a circulator or diplexer) of the downlink OOK spectrum in the RX low-noise amplifier. The UWB 3.1-7 GHz transmitter can use either OOK or binary phase shift keying (BPSK) modulation schemes. The proposed FDT provides dual band 500-Mbps TX uplink data rate and 100 Mbps RX downlink data rate, and it is fully integrated into standard TSMC 0.18- μm CMOS within a total size of 0.8 mm(2). The total measured power consumption is 10.4 mW in full duplex mode (5 mW at 100 Mbps for RX, and 5.4 mW at 500 Mbps or 10.8 pJ/bit for TX). Additionally, a 3-coil inductive link along with on-chip power management circuits allows to powering up the implantable transceiver wirelessly by delivering 25 mW extracted from a 13.56-MHz carrier signal, at a total efficiency of 41.6%.

A Battery-Less, Implantable Neuro-Electronic Interface for Studying the Mechanisms of Deep Brain Stimulation in Rat Models

Although deep brain stimulation (DBS) has been a promising alternative for treating several neural disorders, the mechanisms underlying the DBS remain not fully understood. As rat models provide the advantage of recording and stimulating different disease-related regions simultaneously, this paper proposes a battery-less, implantable neuro-electronic interface suitable for studying DBS mechanisms with a freely-moving rat. The neuro-electronic interface mainly consists of a microsystem able to interact with eight different brain regions bi-directionally and simultaneously. To minimize the size of the implant, the microsystem receives power and transmits data through a single coil. In addition, particular attention is paid to the capability of recording neural activities right after each stimulation, so as to acquire information on how stimulations modulate neural activities. The microsystem has been fabricated with the standard 0.18 μm CMOS technology. The chip area is 7.74 mm (2) , and the microsystem is able to operate with a single supply voltage of 1 V. The wireless interface allows a maximum power of 10 mW to be transmitted together with either uplink or downlink data at a rate of 2 Mbps or 100 kbps, respectively. The input referred noise of recording amplifiers is 1.16 μVrms, and the stimulation voltage is tunable from 1.5 V to 4.5 V with 5-bit resolution. After the electrical functionality of the microsystem is tested, the capability of the microsystem to interface with rat brain is further examined and compared with conventional instruments. All experimental results are presented and discussed in this paper.

Implantable neurotechnologies: a review of integrated circuit neural amplifiers

Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification.

A Low Noise Amplifier for Neural Spike Recording Interfaces

This paper presents a Low Noise Amplifier (LNA) for neural spike recording applications. The proposed topology, based on a capacitive feedback network using a two-stage OTA, efficiently solves the triple trade-off between power, area and noise. Additionally, this work introduces a novel transistor-level synthesis methodology for LNAs tailored for the minimization of their noise efficiency factor under area and noise constraints. The proposed LNA has been implemented in a 130 nm CMOS technology and occupies 0.053 mm-sq. Experimental results show that the LNA offers a noise efficiency factor of 2.16 and an input referred noise of 3.8 μVrms for 1.2 V power supply. It provides a gain of 46 dB over a nominal bandwidth of 192 Hz–7.4 kHz and consumes 1.92 μW. The performance of the proposed LNA has been validated through in vivo experiments with animal models.

A new architecture for neural signal amplification in implantable brain machine interfaces

This paper reports a new architecture for variable gain-bandwidth amplification of neural signals to be used in implantable multi-channel recording systems. The two most critical requirements in such a front-end circuit are low power consumption and chip area, especially as number of channels increases. The presented architecture employs a single super-performing amplifier, with tunable gain and bandwidth, combined with several low-key preamplifiers and multiplexors for multi-channel recordings. This is in contrast to using copies of high performing amplifier for each channel as is typically reported in earlier literature. The resulting circuits consume lower power and require smaller area as compared to existing designs. Designed in 0.5 µmCMOS, the 8-channel prototype can simultaneously record Local Field Potentials and neural spikes, with an effective power consumption of 3.5 µW per channel and net core area of 0.407 mm(2).

A High Performance Delta-Sigma Modulator for Neurosensing

Recorded neural data are frequently corrupted by large amplitude artifacts that are triggered by a variety of sources, such as subject movements, organ motions, electromagnetic interferences and discharges at the electrode surface. To prevent the system from saturating and the electronics from malfunctioning due to these large artifacts, a wide dynamic range for data acquisition is demanded, which is quite challenging to achieve and would require excessive circuit area and power for implementation. In this paper, we present a high performance Delta-Sigma modulator along with several design techniques and enabling blocks to reduce circuit area and power. The modulator was fabricated in a 0.18-μm CMOS process. Powered by a 1.0-V supply, the chip can achieve an 85-dB peak signal-to-noise-and-distortion ratio (SNDR) and an 87-dB dynamic range when integrated over a 10-kHz bandwidth. The total power consumption of the modulator is 13 μW, which corresponds to a figure-of-merit (FOM) of 45 fJ/conversion step. These competitive circuit specifications make this design a good candidate for building high precision neurosensors.

Electromagnetic and thermal effects of IR-UWB wireless implant systems on the human head

The usage of implanted wireless transmitting devices inside the human body has become widely popular in recent years. Applications such as multi-channel neural recording systems require high data rates in the wireless transmission link. Because of the inherent advantages provided by Impulse-Radio Ultra Wide Band (IR-UWB) such as high data rate capability, low power consumption and small form factor, there has been an increased research interest in using IR-UWB for bio-medical implant applications. Hence it has become imperative to analyze the electromagnetic effects caused by the use of IR-UWB when it is operated in or near the human body. This paper reports the electromagnetic effects of head implantable transmitting devices operating based on Impulse Radio Ultra Wide Band (IR-UWB) wireless technology. Simulations illustrate the performance of an implantable UWB antenna tuned to operate at 4 GHz with an -10 dB bandwidth of approximately 1 GHz when it is implanted in a human head model. Specific Absorption Rate (SAR), Specific Absorption (SA) and temperature increase are analyzed to compare the compliance of the transmitting device with international safety regulations.

An externally head-mounted wireless neural recording device for laboratory animal research and possible human clinical use

In this paper we present a new type of head-mounted wireless neural recording device in a highly compact package, dedicated for untethered laboratory animal research and designed for future mobile human clinical use. The device, which takes its input from an array of intracortical microelectrode arrays (MEA) has ninety-seven broadband parallel neural recording channels and was integrated on to two custom designed printed circuit boards. These house several low power, custom integrated circuits, including a preamplifier ASIC, a controller ASIC, plus two SAR ADCs, a 3-axis accelerometer, a 48MHz clock source, and a Manchester encoder. Another ultralow power RF chip supports an OOK transmitter with the center frequency tunable from 3GHz to 4GHz, mounted on a separate low loss dielectric board together with a 3V LDO, with output fed to a UWB chip antenna. The IC boards were interconnected and packaged in a polyether ether ketone (PEEK) enclosure which is compatible with both animal and human use (e.g. sterilizable). The entire system consumes 17mA from a 1.2Ahr 3.6V Li-SOCl2 1/2AA battery, which operates the device for more than 2 days. The overall system includes a custom RF receiver electronics which are designed to directly interface with any number of commercial (or custom) neural signal processors for multi-channel broadband neural recording. Bench-top measurements and in vivo testing of the device in rhesus macaques are presented to demonstrate the performance of the wireless neural interface.

A closed-loop compressive-sensing-based neural recording system

OBJECTIVE

This paper describes a low power closed-loop compressive sensing (CS) based neural recording system. This system provides an efficient method to reduce data transmission bandwidth for implantable neural recording devices. By doing so, this technique reduces a majority of system power consumption which is dissipated at data readout interface. The design of the system is scalable and is a viable option for large scale integration of electrodes or recording sites onto a single device.

APPROACH

The entire system consists of an application-specific integrated circuit (ASIC) with 4 recording readout channels with CS circuits, a real time off-chip CS recovery block and a recovery quality evaluation block that provides a closed feedback to adaptively adjust compression rate. Since CS performance is strongly signal dependent, the ASIC has been tested in vivo and with standard public neural databases.

MAIN RESULTS

Implemented using efficient digital circuit, this system is able to achieve >10 times data compression on the entire neural spike band (500-6KHz) while consuming only 0.83uW (0.53 V voltage supply) additional digital power per electrode. When only the spikes are desired, the system is able to further compress the detected spikes by around 16 times. Unlike other similar systems, the characteristic spikes and inter-spike data can both be recovered which guarantes a >95% spike classification success rate. The compression circuit occupied 0.11mm(2)/electrode in a 180nm CMOS process. The complete signal processing circuit consumes <16uW/electrode.

SIGNIFICANCE

Power and area efficiency demonstrated by the system make it an ideal candidate for integration into large recording arrays containing thousands of electrode. Closed-loop recording and reconstruction performance evaluation further improves the robustness of the compression method, thus making the system more practical for long term recording.

The PennBMBI: Design of a General Purpose Wireless Brain-Machine-Brain Interface System

In this paper, a general purpose wireless Brain-Machine-Brain Interface (BMBI) system is presented. The system integrates four battery-powered wireless devices for the implementation of a closed-loop sensorimotor neural interface, including a neural signal analyzer, a neural stimulator, a body-area sensor node and a graphic user interface implemented on the PC end. The neural signal analyzer features a four channel analog front-end with configurable bandpass filter, gain stage, digitization resolution, and sampling rate. The target frequency band is configurable from EEG to single unit activity. A noise floor of 4.69 μVrms is achieved over a bandwidth from 0.05 Hz to 6 kHz. Digital filtering, neural feature extraction, spike detection, sensing-stimulating modulation, and compressed sensing measurement are realized in a central processing unit integrated in the analyzer. A flash memory card is also integrated in the analyzer. A 2-channel neural stimulator with a compliance voltage up to ± 12 V is included. The stimulator is capable of delivering unipolar or bipolar, charge-balanced current pulses with programmable pulse shape, amplitude, width, pulse train frequency and latency. A multi-functional sensor node, including an accelerometer, a temperature sensor, a flexiforce sensor and a general sensor extension port has been designed. A computer interface is designed to monitor, control and configure all aforementioned devices via a wireless link, according to a custom designed communication protocol. Wireless closed-loop operation between the sensory devices, neural stimulator, and neural signal analyzer can be configured. The proposed system was designed to link two sites in the brain, bridging the brain and external hardware, as well as creating new sensory and motor pathways for clinical practice. Bench test and in vivo experiments are performed to verify the functions and performances of the system.

320-channel active probe for high-resolution neuromonitoring and responsive neurostimulation

We present a 320-channel active probe for high-spatial-resolution neuromonitoring and responsive neurostimulation. The probe comprises an integrated circuit (IC) cell array bonded to the back side of a pitch-matched microelectrode array. The IC enables up to 256-site neural recording and 64-site neural stimulation at the spatial resolution of 400 μ m and 200 μ m, respectively. It is suitable for direct integration with electrode arrays with the shank pitch of integer multiples of 200 μm. In the presented configuration, the IC is bonded with a 8 × 8 400 μ m-pitch Utah electrode array (UEA) and up to additional 192 recording channels are used for peripheral neuromonitoring. The 0.35 μ m CMOS circuit array has a total die size of 3.5 mm × 3.65 mm. Each stimulator channel employs a current memory for simultaneous multi-site neurostimulation, outputs 20 μA-250 μA square or arbitrary waveform current, occupies 0.02 mm (2), and dissipates 2.76 μ W quiescent power. Each fully differential recording channel has two stages of amplification and filtering and an 8-bit single-slope ADC, occupies 0.035 mm (2) , and consumes 51.9 μ W. The neural probe has been experimentally validated in epileptic seizure propagation studies in a mouse hippocampal slice in vitro and in responsive neurostimulation for seizure suppression in an acute epilepsy rat model in vivo .

An integrated power, area and noise efficient AFE for large scale multichannel neural recording systems

A wideband, low-power, low-noise and area-efficient analog front-end (AFE) for acquiring neural signals is described. The AFE builds upon existing architectures but uses block-wise optimization to achieve superior performance when used in a multichannel system with scalable channel count. The AFE is also the first of its kind to enable acquisition from extended neural bandwidths greater than 10 kHz. The AFE is designed in 65 nm CMOS technology and consumes 11.3 μW of power while occupying 0.06 mm(2) per channel and delivering an NEF of 2.92.