A memristor-based hybrid analog-digital computing platform for mobile robotics

Coupled Memristor Oscillators for Neuromorphic Locomotion Control: Modeling and Analysis

The recent surge of interest in brain-inspired architectures along with the development of nonlinear dynamical electronic devices and circuits has enabled energy-efficient hardware realizations of several important neurobiological systems and features. Central pattern generator (CPG) is one such neural system underlying the control of various rhythmic motor behaviors in animals. A CPG can produce spontaneous coordinated rhythmic output signals without any feedback mechanism, ideally realizable by a system of coupled oscillators. Bio-inspired robotics aims to use this approach to control the limb movement for synchronized locomotion. Hence, devising a compact and energy-efficient hardware platform to implement neuromorphic CPGs would be of great benefit for bio-inspired robotics. In this work, we demonstrate that four capacitively coupled vanadium dioxide (VO2) memristor-based oscillators can produce spatiotemporal patterns corresponding to the primary quadruped gaits. The phase relationships underlying the gait patterns are governed by four tunable bias voltages (or four coupling strengths) making the network programmable, reducing the complex problem of gait selection and dynamic interleg coordination to the choice of four control parameters. To this end, we first introduce a dynamical model for the VO2 memristive nanodevice, then perform analytical and bifurcation analysis of a single oscillator, and finally demonstrate the dynamics of coupled oscillators through extensive numerical simulations. We also show that adopting the presented model for a VO2 memristor reveals a striking resemblance between VO2 memristor oscillators and conductance-based biological neuron models such as the Morris-Lecar (ML) model. This can inspire and guide further research on implementation of neuromorphic memristor circuits that emulate neurobiological phenomena.

Integration of MoS2 Memtransistor Devices and Analogue Circuits for Sensor Fusion in Autonomous Vehicle Target Localization

In contemporary autonomous driving systems relying on sensor fusion, traditional digital processors encounter challenges associated with analogue-to-digital conversion and iterative vector-matrix operations, which are encumbered by limitations in terms of response time and energy consumption. In this study, we present an analogue Kalman filter circuit based on molybdenum disulfide (MoS2) memtransistor, designed to accelerate sensor fusion for precise localization in autonomous vehicle applications. The nonvolatile memory characteristics of the memtransistor allow for the storage of a fixed Kalman gain, which eliminates the data convergence and thus accelerates the processing speeds. Additionally, the modulation of multiple conductance states by the gate terminal enables fast adaptability to diverse autonomous driving scenarios by tuning multiple Kalman filter gains. Our proposed analogue Kalman filter circuit accurately estimates the position coordinates of target vehicles by fusing sensor data from light detection and ranging (LiDAR), millimeter-wave radar (Radar), and camera, and it successfully solves real-word problems in a signal-free crossroad intersection. Notably, our system achieves a 1000-fold improvement in energy efficiency compared to that of digital circuits. This work underscores the viability of a memtransistor for achieving fast, energy-efficient real-time sensing, and continuous signal processing in advanced sensor fusion technology.

Firing feature-driven neural circuits with scalable memristive neurons for robotic obstacle avoidance

Neural circuits with specific structures and diverse neuronal firing features are the foundation for supporting intelligent tasks in biology and are regarded as the driver for catalyzing next-generation artificial intelligence. Emulating neural circuits in hardware underpins engineering highly efficient neuromorphic chips, however, implementing a firing features-driven functional neural circuit is still an open question. In this work, inspired by avoidance neural circuits of crickets, we construct a spiking feature-driven sensorimotor control neural circuit consisting of three memristive Hodgkin-Huxley neurons. The ascending neurons exhibit mixed tonic spiking and bursting features, which are used for encoding sensing input. Additionally, we innovatively introduce a selective communication scheme in biology to decode mixed firing features using two descending neurons. We proceed to integrate such a neural circuit with a robot for avoidance control and achieve lower latency than conventional platforms. These results provide a foundation for implementing real brain-like systems driven by firing features with memristive neurons and put constructing high-order intelligent machines on the agenda.

All-Photolithography Fabrication of Ion-Gated Flexible Organic Transistor Array for Multimode Neuromorphic Computing

Organic ion-gated transistors (OIGTs) demonstrate commendable performance for versatile neuromorphic systems. However, due to the fragility of organic materials to organic solvents, efficient and reliable all-photolithography methods for scalable manufacturing of high-density OIGT arrays with multimode neuromorphic functions are still missing, especially when all active layers are patterned in high-density. Here, a flexible high-density (9662 devices per cm2) OIGT array with high yield and minimal device-to-device variation is fabricated by a modified all-photolithography method. The unencapsulated flexible array can withstand 1000 times' bending at a radius of 1 mm, and 3 months' storage test in air, without obvious performance degradation. More interesting, the OIGTs can be configured between volatile and nonvolatile modes, suitable for constructing reservoir computing systems to achieve high accuracy in classifying handwritten digits with low training costs. This work proposes a promising design of organic and flexible electronics for affordable neuromorphic systems, encompassing both array and algorithm aspects.

Graphene oxide-DNA/graphene oxide-PDDA sandwiched membranes with neuromorphic function

The behavior of polyelectrolytes in confined spaces has direct relevance to the protein mediated ion transport in living organisms. In this paper, we govern lithium chloride transport by the interface provided by polyelectrolytes, polycation, poly(diallyldimethylammonium chloride) (PDDA) and, polyanion, double stranded deoxyribonucleic acid (dsDNA), in confined graphene oxide (GO) membranes. Polyelectrolyte-GO interfaces demonstrate neuromorphic functions that were successfully applied with nanochannel ion interactions contributed, resulting in ion memory effects. Excitatory and inhibitory post-synaptic currents were tuned continuously as the number of pulses applied increased accordingly, increasing decay times. Furthermore, we demonstrated the short-term memory of a trained vs untrained device in computation. On account of its simple and safe production along with its robustness and stability, we anticipate our device to be a low dimensional building block for arrays to embed artificial neural networks in hardware for neuromorphic computing. Additionally, incorporating such devices with sensing and actuating parts for a complete feedback loop produces robotics with its own ability to learn by modifying actuation based on sensing data.

Neuromorphic Nanoionics for Human-Machine Interaction: From Materials to Applications

Human-machine interaction (HMI) technology has undergone significant advancements in recent years, enabling seamless communication between humans and machines. Its expansion has extended into various emerging domains, including human healthcare, machine perception, and biointerfaces, thereby magnifying the demand for advanced intelligent technologies. Neuromorphic computing, a paradigm rooted in nanoionic devices that emulate the operations and architecture of the human brain, has emerged as a powerful tool for highly efficient information processing. This paper delivers a comprehensive review of recent developments in nanoionic device-based neuromorphic computing technologies and their pivotal role in shaping the next-generation of HMI. Through a detailed examination of fundamental mechanisms and behaviors, the paper explores the ability of nanoionic memristors and ion-gated transistors to emulate the intricate functions of neurons and synapses. Crucial performance metrics, such as reliability, energy efficiency, flexibility, and biocompatibility, are rigorously evaluated. Potential applications, challenges, and opportunities of using the neuromorphic computing technologies in emerging HMI technologies, are discussed and outlooked, shedding light on the fusion of humans with machines.

A self-tuning PID controller based on analog-digital hybrid computing with a double-gate SnS2 memtransistor

Most commercial drones utilize a traditional proportional-integral-derivative (PID) controller because of its design simplicity. However, the traditional PID controller has certain limitations in terms of optimality and robustness; it is difficult to actively adjust the PID gains under some disturbances. In this study, we demonstrated an analog-digital hybrid computing platform based on double-gate SnS2 memtransistors to implement a self-tuning/energy-efficient PID controller in drones. The customized analog circuit with memtransistors executes the PID control algorithm with low power consumption; we experimentally verified that the energy consumption of the proposed hybrid computing-based PID controller is only 63% of that of the traditional PID controller. In addition, the precise tunability of analog conductance states in the memtransistor proved to be capable of reconfiguring the performance of the PID controller, where the developed self-tuning algorithm can automatically find the optimal PID control performance.

Thousands of conductance levels in memristors integrated on CMOS

Neural networks based on memristive devices^1-3 have the ability to improve throughput and energy efficiency for machine learning^4,5 and artificial intelligence⁶, especially in edge applications^7-21. Because training a neural network model from scratch is costly in terms of hardware resources, time and energy, it is impractical to do it individually on billions of memristive neural networks distributed at the edge. A practical approach would be to download the synaptic weights obtained from the cloud training and program them directly into memristors for the commercialization of edge applications. Some post-tuning in memristor conductance could be done afterwards or during applications to adapt to specific situations. Therefore, in neural network applications, memristors require high-precision programmability to guarantee uniform and accurate performance across a large number of memristive networks^22-28. This requires many distinguishable conductance levels on each memristive device, not only laboratory-made devices but also devices fabricated in factories. Analog memristors with many conductance states also benefit other applications, such as neural network training, scientific computing and even 'mortal computing'^25,29,30. Here we report 2,048 conductance levels achieved with memristors in fully integrated chips with 256 × 256 memristor arrays monolithically integrated on complementary metal-oxide-semiconductor (CMOS) circuits in a commercial foundry. We have identified the underlying physics that previously limited the number of conductance levels that could be achieved in memristors and developed electrical operation protocols to avoid such limitations. These results provide insights into the fundamental understanding of the microscopic picture of memristive switching as well as approaches to enable high-precision memristors for various applications. Fig. 1 HIGH-PRECISION MEMRISTOR FOR NEUROMORPHIC COMPUTING.: a, Proposed scheme of the large-scale application of memristive neural networks for edge computing. Neural network training is performed in the cloud. The obtained weights are downloaded and accurately programmed into a massive number of memristor arrays distributed at the edge, which imposes high-precision requirements on memristive devices. b, An eight-inch wafer with memristors fabricated by a commercial semiconductor manufacturer. c, High-resolution transmission electron microscopy image of the cross-section view of a memristor. Pt and Ta serve as the bottom electrode (BE) and top electrode (TE), respectively. Scale bars, 1 μm and 100 nm (inset). d, Magnification of the memristor material stack. Scale bar, 5 nm. e, As-programmed (blue) and after-denoising (red) currents of a memristor are read by a constant voltage (0.2 V). The denoising process eliminated the large-amplitude RTN observed in the as-programmed state (see Methods). f, Magnification of three nearest-neighbour states after denoising. The current of each state was read by a constant voltage (0.2 V). No large-amplitude RTN was observed, and all of the states can be clearly distinguished. g, An individual memristor on the chip was tuned into 2,048 resistance levels by high-resolution off-chip driving circuitry, and each resistance level was read by a d.c. voltage sweeping from 0 to 0.2 V. The target resistance was set from 50 µS to 4,144 µS with a 2-µS interval between neighbouring levels. All readings at 0.2 V are less than 1 µS from the target conductance. Bottom inset, magnification of the resistance levels. Top inset, experimental results of an entire 256 × 256 array programmed by its 6-bit on-chip circuitry into 64 32 × 32 blocks, and each block is programmed into one of the 64 conductance levels. Each of the 256 × 256 memristors has been previously switched over one million cycles, demonstrating the high endurance and robustness of the devices.

Dielectric-Engineered High-Speed, Low-Power, Highly Reliable Charge Trap Flash-Based Synaptic Device for Neuromorphic Computing beyond Inference

The coming of the big-data era brought a need for power-efficient computing that cannot be realized in the Von Neumann architecture. Neuromorphic computing which is motivated by the human brain can greatly reduce power consumption through matrix multiplication, and a device that mimics a human synapse plays an important role. However, many synaptic devices suffer from limited linearity and symmetry without using incremental step pulse programming (ISPP). In this work, we demonstrated a charge-trap flash (CTF)-based synaptic transistor using trap-level engineered Al₂O₃/Ta₂O₅/Al₂O₃ gate stack for successful neuromorphic computing. This novel gate stack provided precise control of the conductance with more than 6 bits. We chose the appropriate bias for highly linear and symmetric modulation of conductance and realized it with very short (25 ns) identical pulses at low voltage, resulting in low power consumption and high reliability. Finally, we achieved high learning accuracy in the training of 60000 MNIST images.

Humanlike spontaneous motion coordination of robotic fingers through spatial multi-input spike signal multiplexing

With advances in robotic technology, the complexity of control of robot has been increasing owing to fundamental signal bottlenecks and limited expressible logic state of the von Neumann architecture. Here, we demonstrate coordinated movement by a fully parallel-processable synaptic array with reduced control complexity. The synaptic array was fabricated by connecting eight ion-gel-based synaptic transistors to an ion gel dielectric. Parallel signal processing and multi-actuation control could be achieved by modulating the ionic movement. Through the integration of the synaptic array and a robotic hand, coordinated movement of the fingers was achieved with reduced control complexity by exploiting the advantages of parallel multiplexing and analog logic. The proposed synaptic control system provides considerable scope for the advancement of robotic control systems.

Imperceptible, designable, and scalable braided electronic cord

Flexible sensors, friendly interfaces, and intelligent recognition are important in the research of novel human-computer interaction and the development of smart devices. However, major challenges are still encountered in designing user-centered smart devices with natural, convenient, and efficient interfaces. Inspired by the characteristics of textile-based flexible electronic sensors, in this article, we report a braided electronic cord with a low-cost, and automated fabrication to realize imperceptible, designable, and scalable user interfaces. The braided electronic cord is in a miniaturized form, which is suitable for being integrated with various occasions in life. To achieve high-precision interaction, a multi-feature fusion algorithm is designed to recognize gestures of different positions, different contact areas, and different movements performed on a single braided electronic cord. The recognized action results are fed back to varieties of interactive terminals, which show the diversity of cord forms and applications. Our braided electronic cord with the features of user friendliness, excellent durability and rich interaction mode will greatly promote the development of human-machine integration in the future.

Artificial Neural Pathway Based on a Memristor Synapse for Optically Mediated Motion Learning

Animals execute intelligent and efficient interactions with their surroundings through neural pathways, exhibiting learning, memory, and cognition. Artificial autonomous devices that generate self-optimizing feedback mimicking biological systems are essential in pursuing future intelligent robots. Here, we report an artificial neural pathway (ANP) based on a memristor synapse to emulate neuromorphic learning behaviors. In our ANP, optical stimulations are detected and converted into electrical signals through a flexible perovskite photoreceptor. The acquired electrical signals are further processed in a zeolitic imidazolate frameworks-8 (ZIF-8)-based memristor device. By controlling the growth of the ZIF-8 nanoparticles, the conductance of the memristor can be finely modulated with electrical stimulations to mimic the modulation of synaptic plasticity. The device is employed in the ANP to implement synaptic functions of learning and memory. Subsequently, the synaptic feedbacks are used to direct a robotic arm to perform responding motions. Upon repeatedly "reviewing" the optical stimulation, the ANP is able to learn, memorize, and complete the specific motions. This work provides a promising strategy toward the design of intelligent autonomous devices and bioinspired robots through memristor-based systems.

Analog-digital hybrid computing with SnS2 memtransistor for low-powered sensor fusion

Algorithms for intelligent drone flights based on sensor fusion are usually implemented using conventional digital computing platforms. However, alternative energy-efficient computing platforms are required for robust flight control in a variety of environments to reduce the burden on both the battery and computing power. In this study, we demonstrated an analog–digital hybrid computing platform based on SnS₂ memtransistors for low-power sensor fusion in drones. The analog Kalman filter circuit with memtransistors facilitates noise removal to accurately estimate the rotation of the drone by combining sensing data from the gyroscope and accelerometer. We experimentally verified that the power consumption of our hybrid computing-based Kalman filter is only 1/4^th of that of the traditional software-based Kalman filter.

Analog–digital hybrid computing based on SnS2 memtransistors is demonstrated for lowpower sensor fusion in drones, where a drone with hybrid computing performs sensor fusion with higher energy efficiency than that with only a digital processor.

Organic neuromorphic electronics for sensorimotor integration and learning in robotics

In living organisms, sensory and motor processes are distributed, locally merged, and capable of forming dynamic sensorimotor associations. We introduce a simple and efficient organic neuromorphic circuit for local sensorimotor merging and processing on a robot that is placed in a maze. While the robot is exposed to external environmental stimuli, visuomotor associations are formed on the adaptable neuromorphic circuit. With this on-chip sensorimotor integration, the robot learns to follow a path to the exit of a maze, while being guided by visually indicated paths. The ease of processability of organic neuromorphic electronics and their unconventional form factors, in combination with education-purpose robotics, showcase a promising approach of an affordable, versatile, and readily accessible platform for exploring, designing, and evaluating behavioral intelligence through decentralized sensorimotor integration.

Analog-digital computing let robots go through the motions

A hybrid analog-digital computing platform using memristors enables faster, more energy-efficient, and adaptive real-time robot control.