A system-on-chip microwave photonic processor solves dynamic RF interference in real time with picosecond latency

Radio-frequency interference is a growing concern as wireless technology advances, with potentially life-threatening consequences like interference between radar altimeters and 5 G cellular networks. Mobile transceivers mix signals with varying ratios over time, posing challenges for conventional digital signal processing (DSP) due to its high latency. These challenges will worsen as future wireless technologies adopt higher carrier frequencies and data rates. However, conventional DSPs, already on the brink of their clock frequency limit, are expected to offer only marginal speed advancements. This paper introduces a photonic processor to address dynamic interference through blind source separation (BSS). Our system-on-chip processor employs a fully integrated photonic signal pathway in the analogue domain, enabling rapid demixing of received mixtures and recovering the signal-of-interest in under 15 picoseconds. This reduction in latency surpasses electronic counterparts by more than three orders of magnitude. To complement the photonic processor, electronic peripherals based on field-programmable gate array (FPGA) assess the effectiveness of demixing and continuously update demixing weights at a rate of up to 305 Hz. This compact setup features precise dithering weight control, impedance-controlled circuit board and optical fibre packaging, suitable for handheld and mobile scenarios. We experimentally demonstrate the processor's ability to suppress transmission errors and maintain signal-to-noise ratios in two scenarios, radar altimeters and mobile communications. This work pioneers the real-time adaptability of integrated silicon photonics, enabling online learning and weight adjustments, and showcasing practical operational applications for photonic processing.

Real-time photonic blind interference cancellation

mmWave devices can broadcast multiple spatially-separated data streams simultaneously in order to increase data transfer rates. Data transfer can, however, be compromised by interference. Photonic blind interference cancellation systems offer a power-efficient means of mitigating interference, but previous demonstrations of such systems have been limited by high latencies and the need for regular calibration. Here, we demonstrate real-time photonic blind interference cancellation using an FPGA-photonic system executing a zero-calibration control algorithm. Our system offers a greater than 200-fold reduction in latency compared to previous work, enabling sub-second cancellation weight identification. We further investigate key trade-offs between system latency, power consumption, and success rate, and we validate sub-Nyquist sampling for blind interference cancellation. We estimate that photonic interference cancellation can reduce the power required for digitization and signal recovery by greater than 74 times compared to the digital electronic alternative.