Capping Layers to Improve the Electrical Stress Stability of MoS2 Transistors

Enhanced Electrical Transport Properties of Molybdenum Disulfide Field-Effect Transistors by Using Alkali Metal Fluorides as Dielectric Capping Layers

The electronic properties of 2D materials are highly influenced by the molecular activity at their interfaces. A method was proposed to address this issue by employing passivation techniques using monolayer MoS2 field-effect transistors (FETs) while preserving high performance. Herein, we have used alkali metal fluorides as dielectric capping layers, including lithium fluoride (LiF), sodium fluoride (NaF), and potassium fluoride (KF) dielectric capping layers, to mitigate the environmental impact of oxygen and water exposure. Among them, the LiF dielectric capping layer significantly improved the transistor performance, specifically in terms of enhanced field effect mobility from 74 to 137 cm2/V·s, increased current density from 17 μA/μm to 32.13 μA/μm at a drain voltage of Vd of 1 V, and decreased subthreshold swing to 0.8 V/dec The results have been analytically verified by X-ray photoelectron spectroscopy (XPS) and Raman, and photoluminescence (PL) spectroscopy, and the demonstrated technique can be extended to other transition metal dichalcogenide (TMD)-based FETs, which can become a prospect for cutting-edge electronic applications. These findings highlight certain important trade-offs and provide insight into the significance of interface control and passivation material choice on the electrical stability, performance, and enhancement of the MoS2 FET.

The growth mechanism of PtS2 single crystal

PtS2, a member of the group 10 transition metal dichalcogenides (TMDs), has received extensive attention because of its excellent electrical properties and air stability. However, there are few reports on the preparation of single-crystal PtS2 in the literature, and the growth mechanism of single crystal PtS2 is not well elucidated. In this work, we proposed a method of preparation that combines magnetron sputtering and chemical vapor transport to obtain monocrystalline PtS2 on a SiO2/Si substrate. By controlling the growth temperature and time, we have synthesized a single crystalline PtS2 of hexagonal shape and size of 1-2 μm on a silicon substrate. Combining the molecular dynamics simulation, the growth mechanism of single crystal PtS2 was investigated both experimentally and theoretically. The synthesis method has a short production cycle and low cost, which opens the door for the fabrication of other TMDs single crystals.

All-Transfer Electrode Interface Engineering Toward Harsh-Environment-Resistant MoS2 Field-Effect Transistors

Nanoscale electronic devices that can work in harsh environments are in high demand for wearable, automotive, and aerospace electronics. Clean and defect-free interfaces are of vital importance for building nanoscale harsh-environment-resistant devices. However, current nanoscale devices are subject to failure in these environments, especially at defective electrode-channel interfaces. Here, harsh-environment-resistant MoS₂ transistors are developed by engineering electrode-channel interfaces with an all-transfer of van der Waals electrodes. The delivered defect-free, graphene-buffered electrodes keep the electrode-channel interfaces intact and robust. As a result, the as-fabricated MoS₂ devices have reduced Schottky barrier heights, leading to a very large on-state current and high carrier mobility. More importantly, the defect-free, hydrophobic graphene buffer layer prevents metal diffusion from the electrodes to MoS₂ and the intercalation of water molecules at the electrode-MoS₂ interfaces. This enables high resistances of MoS₂ devices with all-transfer electrodes to various harsh environments, including humid, oxidizing, and high-temperature environments, surpassing the devices with other kinds of electrodes. The work deepens the understanding of the roles of electrode-channel interfaces in nanoscale devices and provides a promising interface engineering strategy to build nanoscale harsh-environment-resistant devices.

Progress and Challenges for Memtransistors in Neuromorphic Circuits and Systems

Due to the increasing importance of artificial intelligence (AI), significant recent effort has been devoted to the development of neuromorphic circuits that seek to emulate the energy-efficient information processing of the brain. While non-volatile memory (NVM) based on resistive switches, phase-change memory, and magnetic tunnel junctions has shown potential for implementing neural networks, additional multi-terminal device concepts are required for more sophisticated bio-realistic functions. Of particular interest are memtransistors based on low-dimensional nanomaterials, which are capable of electrostatically tuning memory and learning behavior at the device level. Herein, a conceptual overview of the memtransistor is provided in the context of neuromorphic circuits. Recent progress is surveyed for memtransistors and related multi-terminal NVM devices including dual-gated floating-gate memories, dual-gated ferroelectric transistors, and dual-gated van der Waals heterojunctions. The different materials systems and device architectures are classified based on the degree of control and relative tunability of synaptic behavior, with an emphasis on device concepts that harness the reduced dimensionality, weak electrostatic screening, and phase-changes properties of nanomaterials. Finally, strategies for achieving wafer-scale integration of memtransistors and multi-terminal NVM devices are delineated, with specific attention given to the materials challenges for practical neuromorphic circuits.

Perspective of 2D Integrated Electronic Circuits: Scientific Pipe Dream or Disruptive Technology?

Within the last decade, considerable efforts have been devoted to fabricating transistors utilizing 2D semiconductors. Also, small circuits consisting of a few transistors have been demonstrated, including inverters, ring oscillators, and static random access memory cells. However, for industrial applications, both time-zero and time-dependent variability in the performance of the transistors appear critical. While time-zero variability is primarily related to immature processing, time-dependent drifts are dominated by charge trapping at defects located at the channel/insulator interface and in the insulator itself, which can substantially degrade the stability of circuits. At the current state of the art, 2D transistors typically exhibit a few orders of magnitude higher trap densities than silicon devices, which considerably increases their time-dependent variability, resulting in stability and yield issues. Here, the stability of currently available 2D electronics is carefully evaluated using circuit simulations to determine the impact of transistor-related issues on the overall circuit performance. The results suggest that while the performance parameters of transistors based on certain material combinations are already getting close to being competitive with Si technologies, a reduction in variability and defect densities is required. Overall, the criteria for parameter variability serve as guidance for evaluating the future development of 2D technologies.

Passivation Strategies for Enhancing Solution-Gated Carbon Nanotube Field-Effect Transistor Biosensing Performance and Stability in Ionic Solutions

Interest in point-of-care diagnostics has led to increasing demand for the development of nanomaterial-based electronic biosensors such as biosensor field-effect transistors (BioFETs) due to their inherent simplicity, sensitivity, and scalability. The utility of BioFETs, which use electrical transduction to detect biological signals, is directly dependent upon their electrical stability in detection-relevant environments. BioFET device structures vary substantially, especially in electrode passivation modalities. Improper passivation of electronic components in ionic solutions can lead to excessive leakage currents and signal drift, thus presenting a hinderance to signal detectability. Here, we harness the sensitivity of nanomaterials to study the effects of various passivation strategies on the performance and stability of a transistor-based biosensing platform based on aerosol-jet-printed carbon nanotube thin-film transistors. Specifically, non-passivated devices were compared to devices passivated with photoresist (SU-8), dielectric (HfO₂), or photoresist + dielectric (SU-8 followed by HfO₂) and were evaluated primarily by initial performance metrics, large-scale device yield, and stability throughout long-duration cycling in phosphate buffered saline. We find that all three passivation conditions result in improved device performance compared to non-passivated devices, with the photoresist + dielectric strategy providing the lowest average leakage current in solution (~2 nA). Notably, the photoresist + dielectric strategy also results in the greatest yield of BioFET devices meeting our selected performance criteria on a wafer scale (~90%), the highest long-term stability in solution (<0.01% change in on-current), and the best average on/off-current ratio (~10⁴), hysteresis (~32 mV), and subthreshold swing (~192 mV/decade). This passivation schema has the potential to pave the path toward a truly high-yield, stable, and robust electrical biosensing platform.

Surface Passivation of Layered MoSe2 via van der Waals Stacking of Amorphous Hydrocarbon

Development of efficient surface passivation methods for semiconductor devices is crucial to counter the degradation in their electrical performance owing to scattering or trapping of carriers in the channels induced by molecular adsorption from the ambient environment. However, conventional dielectric deposition involves the formation of additional interfacial defects associated with broken covalent bonds, resulting in accidental electrostatic doping or enhanced hysteretic behavior. In this study, centimeter-scaled van der Waals passivation of transition metal dichalcogenides (TMDCs) is demonstrated by stacking hydrocarbon (HC) dielectrics onto MoSe₂ field-effect transistors (FETs), thereby enhancing the electric performance and stability of the device, accompanied with the suppression of chemical disorder at the HC/TMDCs interface. The stacking of HC onto MoSe₂ FETs enhances the carrier mobility of MoSe₂ FET by over 50% at the n-branch, and a significant decrease in hysteresis, owing to the screening of molecular adsorption. The electron mobility and hysteresis of the HC/MoSe₂ FETs are verified to be nearly intact compared to those of the fabricated HC/MoSe₂ FETs after exposure to ambient environment for 3 months. Consequently, the proposed design can act as a model for developing advanced nanoelectronics applications based on layered materials for mass production.

Are 2D Interfaces Really Flat?

Two-dimensional (2D) van der Waals materials are subject to mechanical deformation and thus forming bubbles and wrinkles during exfoliation and transfer. A lack of interfacial "flatness" has implications for interface properties, such as those formed by metal contacts or insulating layers. Therefore, an understanding of the detailed properties of 2D interfaces, especially their flatness under different conditions, is of high importance. Here we use cross-sectional scanning transmission electron microscopy (STEM) to investigate various 2D interfaces (2D-2D and 3D-2D) under the effects of stacking, atomic layer deposition (ALD), and metallization. We characterize and compare the flatness of the hBN-2D and metal-2D interfaces down to angstrom resolution. It is observed that the dry transfer of hexagonal boron nitride (hBN) can dramatically alter the interface structure. When characterizing 3D metal-2D interfaces, we find that Ni-MoS₂ interfaces are more uneven and have larger nanocavities compared to other metal-2D interfaces. The electrical characteristics of a MoS₂-based field-effect transistor are correlated to the interfacial transformation in the contact and channel regions. The device transconductance is improved by 40% after the hBN encapsulation, likely due to the interface interactions at both the channel and contacts. Overall, these observations reveal the intricacy of 2D interfaces and their dependence on the fabrication processes.

Broadband photodetector based on ReS2/graphene/WSe2heterostructure

Two-dimensional van der Waals heterostructures can combine properties of individual materials to enable high-performance photodetection. Here, a novel ReS₂/graphene/WSe₂heterostructure, prepared by dry transfer, demonstrates air-stable, high-performance, polarization-sensitive, and broadband photodetection. Dark current can be strongly suppressed by the built-in electric field of the heterostructure. The specific detectivities are up to 10¹⁰Jones and 10⁹Jones under zero and reverse bias, respectively. Response time is on the order of a millisecond. The polarization-sensitive photodetection has been observed in the heterostructure due to the low lattice symmetry of ReS₂. Broadband photoresponse from visible to infrared range has been demonstrated. A high photoresponsivity of 1.02 A W^-1is achieved for illumination at the wavelength of 785 nm. This work provides a viable approach toward future high-performance, air-stable, and polarization-sensitive broadband photodetectors.

Understanding and Mapping Sensitivity in MoS2 Field-Effect-Transistor-Based Sensors

Sensors based on two-dimensional (2D) field-effect transistors (FETs) are extremely sensitive and can detect charged analytes with attomolar limits of detection (LOD). Despite some impressive LODs, the operating mechanisms and factors that determine the signal-to-noise ratio in 2D FET-based sensors remain poorly understood. These uncertainties, coupled with an expansive design space for sensor layout and analyte positioning, result in a field with many reported highlights but limited collective progress. Here, we provide insight into sensing mechanisms of 2D molybdenum disulfide (MoS₂) FETs by realizing precise control over the position and charge of an analyte using a customized atomic force microscope (AFM), with the AFM tip acting as an analyte. The sensitivity of the MoS₂ FET channel is revealed to be nonuniform, manifesting sensitive hotspots with locations that are stable over time. When the charge of the analyte is varied, an asymmetry is observed in the device drain-current response, with analytes acting to turn the device off leading to a 2.5× increase in the signal-to-noise ratio (SNR). We developed a numerical model, applicable to all FET-based charge-detection sensors, that confirms our experimental observation and suggests an underlying mechanism. Further, extensive characterization of a set of different MoS₂ FETs under various analyte conditions, coupled with the numerical model, led to the identification of three distinct SNRs that peak with dependence on the layout and operating conditions used for a sensor. These findings reveal the important role of analyte position and coverage in determining the optimal operating bias conditions for maximal sensitivity in 2D FET-based sensors, which provides key insights for future sensor design and control.