Memory leads the way to better computing

Retention-aware zero-shifting technique for Tiki-Taka algorithm-based analog deep learning accelerator

We present the fabrication of 4 K-scale electrochemical random-access memory (ECRAM) cross-point arrays for analog neural network training accelerator and an electrical characteristic of an 8 × 8 ECRAM array with a 100% yield, showing excellent switching characteristics, low cycle-to-cycle, and device-to-device variations. Leveraging the advances of the ECRAM array, we showcase its efficacy in neural network training using the Tiki-Taka version 2 algorithm (TTv2) tailored for non-ideal analog memory devices. Through an experimental study using ECRAM devices, we investigate the influence of retention characteristics on the training performance of TTv2, revealing that the relative location of the retention convergence point critically determines the available weight range and, consequently, affects the training accuracy. We propose a retention-aware zero-shifting technique designed to optimize neural network training performance, particularly in scenarios involving cross-point devices with limited retention times. This technique ensures robust and efficient analog neural network training despite the practical constraints posed by analog cross-point devices.

Machine learning interatomic potential: Bridge the gap between small-scale models and realistic device-scale simulations

Machine learning interatomic potential (MLIP) overcomes the challenges of high computational costs in density-functional theory and the relatively low accuracy in classical large-scale molecular dynamics, facilitating more efficient and precise simulations in materials research and design. In this review, the current state of the four essential stages of MLIP is discussed, including data generation methods, material structure descriptors, six unique machine learning algorithms, and available software. Furthermore, the applications of MLIP in various fields are investigated, notably in phase-change memory materials, structure searching, material properties predicting, and the pre-trained universal models. Eventually, the future perspectives, consisting of standard datasets, transferability, generalization, and trade-off between accuracy and complexity in MLIPs, are reported.

Ferroelectric 2D SnS2 Analog Synaptic FET

In this study, the development and characterization of 2D ferroelectric field-effect transistor (2D FeFET) devices are presented, utilizing nanoscale ferroelectric HfZrO2 (HZO) and 2D semiconductors. The fabricated device demonstrated multi-level data storage capabilities. It successfully emulated essential biological characteristics, including excitatory/inhibitory postsynaptic currents (EPSC/IPSC), Pair-Pulse Facilitation (PPF), and Spike-Timing Dependent Plasticity (STDP). Extensive endurance tests ensured robust stability (107 switching cycles, 105 s (extrapolated to 10 years)), excellent linearity, and high Gmax/Gmin ratio (>105), all of which are essential for realizing multi-level data states (>7-bit operation). Beyond mimicking synaptic functionalities, the device achieved a pattern recognition accuracy of ≈94% on the Modified National Institute of Standards and Technology (MNIST) handwritten dataset when incorporated into a neural network, demonstrating its potential as an effective component in neuromorphic systems. The successful implementation of the 2D FeFET device paves the way for the development of high-efficiency, ultralow-power neuromorphic hardware which is in sub-femtojoule (48 aJ/spike) and fast response (1 µs), which is 104 folds faster than human synapse (≈10 ms). The results of the research underline the potential of nanoscale ferroelectric and 2D materials in building the next generation of artificial intelligence technologies.

Kinetics of N- to M-Polar Switching in Ferroelectric Al1-xScxN Capacitors

Ferroelectric wurtzite-type aluminum scandium nitride (Al1-xScxN) presents unique properties that can enhance the performance of non-volatile memory technologies. The realization of the full potential of Al1-xScxN requires a comprehensive understanding of the mechanism of polarization reversal and domain structure dynamics involved in the ferroelectric switching process. In this work, transient current integration measurements performed by a pulse switching method are combined with domain imaging by piezoresponse force microscopy (PFM) to investigate the kinetics of domain nucleation and wall motion during polarization reversal in Al0.85Sc0.15N capacitors. In the studied electric field range (from 4.4 to 5.6 MV cm-1), ferroelectric switching proceeds via domain nucleation and wall movement. The currently available phenomenological models are shown to not fully capture all the details of the complex dynamics of polarization reversal in Al0.85Sc0.15N. PFM reveals a non-linear increase of both domain nucleation rate and lateral wall velocity during the switching process, as well as the dependency of the domain pattern on the polarization reversal direction. A continuously faster N- to M-polar switching upon cycling is reported and ascribed to an increasing number of M-polar nucleation sites and density of domain walls.

First-Principles Prediction of High and Low Resistance States in Ta/h-BN/Ta Atomristor

Two-dimensional (2D) materials have received significant attention for their potential use in next-generation electronics, particularly in nonvolatile memory and neuromorphic computing. This is due to their simple metal-insulator-metal (MIM) sandwiched structure, excellent switching performance, high-density capability, and low power consumption. In this work, using comprehensive material simulations and device modeling, the thinnest monolayer hexagonal boron nitride (h-BN) atomristor is studied by using a MIM configuration with Ta electrodes. Our first-principles calculations predicted both a high resistance state (HRS) and a low resistance state (LRS) in this device. We observed that the presence of van der Waals (vdW) gaps between the Ta electrodes and monolayer h-BN with a boron vacancy (VB) contributes to the HRS. The combination of metal electrode contact and the adsorption of Ta atoms onto a single VB defect (TaB) can alter the interface barrier between the electrode and dielectric layer, as well as create band gap states within the band gap of monolayer h-BN. These band gap states can shorten the effective tunneling path for electron transport from the left electrode to the right electrode, resulting in an increase in the current transmission coefficient of the LRS. This resistive switching mechanism in monolayer h-BN atomristors can serve as a theoretical reference for device design and optimization, making them promising for the development of atomristor technology with ultra-high integration density and ultra-low power consumption.

GeSe ovonic threshold switch: the impact of functional layer thickness and device size

Three-dimensional phase change memory (3D PCM), possessing fast-speed, high-density and nonvolatility, has been successfully commercialized as storage class memory. A complete PCM device is composed of a memory cell and an associated ovonic threshold switch (OTS) device, which effectively resolves the leakage current issue in the crossbar array. The OTS materials are chalcogenide glasses consisting of chalcogens such as Te, Se and S as central elements, represented by GeTe6, GeSe and GeS. Among them, GeSe-based OTS materials are widely utilized in commercial 3D PCM, their scalability, however, has not been thoroughly investigated. Here, we explore the miniaturization of GeSe OTS selector, including functional layer thickness scalability and device size scalability. The threshold switching voltage of the GeSe OTS device almost lineally decreases with the thinning of the thickness, whereas it hardly changes with the device size. This indicates that the threshold switching behavior is triggered by the electric field, and the threshold switching field of the GeSe OTS selector is approximately 105 V/μm, regardless of the change in film thickness or device size. Systematically analyzing the threshold switching field of Ge-S and Ge-Te OTSs, we find that the threshold switching field of the OTS device is larger than 75 V/μm, significantly higher than PCM devices (8.1-56 V/μm), such as traditional Ge2Sb2Te5, Ag-In-Sb-Te, etc. Moreover, the required electric field is highly correlated with the optical bandgap. Our findings not only serve to optimize GeSe-based OTS device, but also may pave the approach for exploring OTS materials in chalcogenide alloys.

An in-sensor humidity computing system for contactless human-computer interaction

Being capable of processing large amounts of redundant data and decreasing power consumption, in-sensor computing approaches play significant roles in neuromorphic computing and are attracting increasing interest in perceptual information processing. Herein, we proposed a high performance humidity-sensitive memristor based on a Ti/graphene oxide (GO)/HfOx/Pt structure and verified its potential for application in remote health management and contactless human-machine interfaces. Since GO possesses abundant hydrophilic groups (carbonyl, epoxide, and hydroxyl), the memristor shows a high humidity sensitivity, fast response, and wide response range. By utilizing the proton-modulated redox reaction, humidity exposure to the memristor induces a dynamic change in the switching between high and low resistance states, ensuring essential synaptic learning functions, such as paired-pulse facilitation, spike number-dependent plasticity, and spike amplitude-dependent plasticity. More importantly, based on the humidity-induced salient features originating from the abundant hydrophilic functional groups in GO, we have implemented a noncontact human-machine interface utilizing the respiratory mode in humans, demonstrating the potential of promoting health monitoring applications and effectively blocking virus transmission. In addition, the high recognition accuracy of contactless handwriting in a 5 × 5 array artificial neural network was successfully achieved, which is attributed to the excellent emulated synaptic behaviors. This study provides a feasible method to develop an excellent humidity-sensitive memristor for constructing efficient in-sensor computing for application in health management and contactless human-computer interaction.

Optical readout of charge carriers stored in a 2D memory cell of monolayer WSe2

Owing to their superior charge retaining and transport characteristics, 2D transition metal dichalcogenides are investigated for practical applications in various memory-cell structures. Herein, we fabricated a quasi-one-terminal 2D memory cell by partially depositing a WSe2 monolayer on an Au electrode, which can be manipulated to achieve efficient charge injection upon the application or removal of external bias. Furthermore, the amount of charge carriers stored in the memory cell could be optically probed because of its close correlation with the fluorescence efficiency of WSe2, allowing us to achieve an electron retention time of ∼300 s at the cryogenic temperature of 4 K. Accordingly, the simplified device structure and the non-contact optical readout of the stored charge carriers present new research opportunities for 2D memory cells in terms of both fundamental mechanism studies and practical development for integrated nanophotonic devices.

Artificial sensory system based on memristive devices

In the biological nervous system, the integration and cooperation of parallel system of receptors, neurons, and synapses allow efficient detection and processing of intricate and disordered external information. Such systems acquire and process environmental data in real-time, efficiently handling complex tasks with minimal energy consumption. Memristors can mimic typical biological receptors, neurons, and synapses by implementing key features of neuronal signal-processing functions such as selective adaption in receptors, leaky integrate-and-fire in neurons, and synaptic plasticity in synapses. External stimuli are sensitively detected and filtered by "artificial receptors," encoded into spike signals via "artificial neurons," and integrated and stored through "artificial synapses." The high operational speed, low power consumption, and superior scalability of memristive devices make their integration with high-performance sensors a promising approach for creating integrated artificial sensory systems. These integrated systems can extract useful data from a large volume of raw data, facilitating real-time detection and processing of environmental information. This review explores the recent advances in memristor-based artificial sensory systems. The authors begin with the requirements of artificial sensory elements and then present an in-depth review of such elements demonstrated by memristive devices. Finally, the major challenges and opportunities in the development of memristor-based artificial sensory systems are discussed.

Read Operation Mechanism of Feedback Field-Effect Transistors with Quasi-Nonvolatile Memory States

In this study, the read operation of feedback field-effect transistors (FBFETs) with quasi-nonvolatile memory states was analyzed using a device simulator. For FBFETs, write pulses of 40 ns formed potential barriers in their channels, and charge carriers were accumulated (depleted) in these channels, generating the memory state "State 1 (State 0)". Read pulses of 40 ns read these states with a retention time of 3 s, and the potential barrier formation and carrier accumulation were influenced by these read pulses. The potential barriers were analyzed, using junction voltage and current density to explore the memory states. Moreover, FBFETs exhibited nondestructive readout characteristics during the read operation, which depended on the read voltage and pulse width.

Memristor-Based Artificial Chips

Memristors, promising nanoelectronic devices with in-memory resistive switching behavior that is assembled with a physically integrated core processing unit (CPU) and memory unit and even possesses highly possible multistate electrical behavior, could avoid the von Neumann bottleneck of traditional computing devices and show a highly efficient ability of parallel computation and high information storage. These advantages position them as potential candidates for future data-centric computing requirements and add remarkable vigor to the research of next-generation artificial intelligence (AI) systems, particularly those that involve brain-like intelligence applications. This work provides an overview of the evolution of memristor-based devices, from their initial use in creating artificial synapses and neural networks to their application in developing advanced AI systems and brain-like chips. It offers a broad perspective of the key device primitives enabling their special applications from the view of materials, nanostructure, and mechanism models. We highlight these demonstrations of memristor-based nanoelectronic devices that have potential for use in the field of brain-like AI, point out the existing challenges of memristor-based nanodevices toward brain-like chips, and propose the guiding principle and promising outlook for future device promotion and system optimization in the biomedical AI field.

TCAD Simulation Studies on Ultra-Low-Power Non-Volatile Memory

Ultra-Low-Power Non-Volatile Memory (UltraRAM), as a promising storage device, has attracted wide research attention from the scientific community. Non-volatile data retention in combination with switching at ≤2.6 V is achieved through the use of the extraordinary 2.1 eV conduction band offsets of InAs/AlSb and a triple-barrier resonant tunnelling structure. Along these lines, in this work, the structure, storage mechanism, and improvement strategies of UltraRAM were systematically investigated to enhance storage window clarity and speed performance. First, the basic structure and working principle of UltraRAM were introduced, and its comparative advantages over traditional memory devices were highlighted. Furthermore, through the validation of the band structure and storage mechanism, the superior performance of UltraRAM, including its low operating voltage and excellent non-volatility, was further demonstrated. To address the issue of the small storage window, an improvement strategy was proposed by reducing the thickness of the channel layer to increase the storage window. The feasibility of this strategy was validated by performing a series of simulation-based experiments. From our analysis, a significant 80% increase in the storage window after thinning the channel layer was demonstrated, providing an important foundation for enhancing the performance of UltraRAM. Additionally, the data storage capability of this strategy was examined under the application of short pulse widths, and a data storage operation with a 10 ns pulse width was successfully achieved. In conclusion, valuable insights into the application of UltraRAM in the field of non-volatile storage were provided. Our work paves the way for further optimizing the memory performance and expanding the functionalities of UltraRAM.

Self-Assembled Lanthanum Oxide Nanoflakes by Electrodeposition Technique for Resistive Switching Memory and Artificial Synaptic Devices

In recent years, many metal oxides have been rigorously studied to be employed as solid electrolytes for resistive switching (RS) devices. Among these solid electrolytes, lanthanum oxide (La2 O3 ) is comparatively less explored for RS applications. Given this, the present work focuses on the electrodeposition of La2 O3 switching layers and the investigation of their RS properties for memory and neuromorphic computing applications. Initially, the electrodeposited La2 O3 switching layers are thoroughly characterized by various analytical techniques. The electrochemical impedance spectroscopy (EIS) and Mott-Schottky techniques are probed to understand the in situ electrodeposition, RS mechanism, and n-type semiconducting nature of the fabricated La2 O3 switching layers. All the fabricated devices exhibit bipolar RS characteristics with excellent endurance and stable retention. Moreover, the device mimics the various bio-synaptic properties such as potentiation-depression, excitatory post-synaptic currents, and paired-pulse facilitation. It is demonstrated that the fabricated devices are non-ideal memristors based on double-valued charge-flux characteristics. The switching variation of the device is studied using the Weibull distribution technique and modeled and predicted by the time series analysis technique. Based on electrical and EIS results, a possible filamentary-based RS mechanism is suggested. The present results assert that La2 O3 is a promising solid electrolyte for memory and brain-inspired applications.

Designing a Multilayered Oxygen Barrier Structure to Tackle Oxidation Challenges in Phase-Change Memory for Improved Reliability

Phase-change memory (PCM) is considered one of the most promising candidates for universal memory. However, during the manufacturing process of PCM, phase-change materials (PCMs) encounter severe oxidation, which can cause degraded performance and reduced stability of PCM, hindering its industrialization process. In this work, a multilayered oxygen barrier (MOB) structure is proposed to tackle this challenge. Material characterization shows that the MOB structure can significantly reduce the extent of oxidation of PCMs from around 70% to as low as around 10%, achieving a remarkably low level of oxidation. Moreover, the material in the MOB structure exhibits notable enhancements in crystallization temperature and cycling capability. The improved stability is attributed to the oxygen barrier effect and the suppression of elemental segregation within the material, which are both conferred by the MOB structure. In summary, this work provides an effective solution to address the oxidation of PCMs, offering valuable guidance for realizing a high-reliability PCM in practical production.

Demonstration of the threshold-switching memory devices using EMIm(AlCl3)Cl and ZnO for neuromorphic applications

The threshold-switching behaviors of the synapses lead to energy-efficient operation in the neural computing system. Here, we demonstrated the threshold-switching memory devices by inserting the ZnO layer into the ionic synaptic devices. The EMIm(AlCl3)Cl is utilized as the electrolyte because its conductance can be tuned by the charge states of the Al-based ions. The redox reactions of the Al ions in the electrolyte can lead to the analog resistive switching characteristics, such as excitatory postsynaptic current, paired-pulse facilitation, potentiation, and depression. By inserting the ZnO layer into the EMIm(AlCl3)-based ionic synaptic devices, the threshold switching behaviors are demonstrated. Using the resistivity difference between ZnO and EMIm(AlCl3)Cl, the analog resistive switching behaviors are tunned as the threshold-switching behaviors. The threshold-switching behaviors are achieved by applying the spike stimuli to the device. Demonstration of the threshold-switching behaviors of the ionic synaptic devices has a possibility to achieve high energy-efficiency for the ion-based artificial synapses.

Revival of Ferroelectric Memories Based on Emerging Fluorite-Structured Ferroelectrics

Over the last few decades, the research on ferroelectric memories has been limited due to their dimensional scalability and incompatibility with complementary metal-oxide-semiconductor (CMOS) technology. The discovery of ferroelectricity in fluorite-structured oxides revived interest in the research on ferroelectric memories, by inducing nanoscale nonvolatility in state-of-the-art gate insulators by minute doping and thermal treatment. The potential of this approach has been demonstrated by the fabrication of sub-30 nm electronic devices. Nonetheless, to realize practical applications, various technical limitations, such as insufficient reliability including endurance, retention, and imprint, as well as large device-to-device-variation, require urgent solutions. Furthermore, such limitations should be considered based on targeting devices as well as applications. Various types of ferroelectric memories including ferroelectric random-access-memory, ferroelectric field-effect-transistor, and ferroelectric tunnel junction should be considered for classical nonvolatile memories as well as emerging neuromorphic computing and processing-in-memory. Therefore, from the viewpoint of materials science, this review covers the recent research focusing on ferroelectric memories from the history of conventional approaches to future prospects.

Monolithic 3D integration of 2D transistors and vertical RRAMs in 1T-4R structure for high-density memory

Emerging data-intensive computation has driven the advanced packaging and vertical stacking of integrated circuits, for minimized latency and energy consumption. Yet a monolithic three-dimensional (3D) integrated structure with interleaved logic and high-density memory layers has been difficult to achieve due to challenges in managing the thermal budget. Here we experimentally demonstrate a monolithic 3D integration of atomically-thin molybdenum disulfide (MoS2) transistors and 3D vertical resistive random-access memories (VRRAMs), with the MoS2 transistors stacked between the bottom-plane and top-plane VRRAMs. The whole fabrication process is integration-friendly (below 300 °C), and the measurement results confirm that the top-plane fabrication does not affect the bottom-plane devices. The MoS2 transistor can drive each layer of VRRAM into four resistance states. Circuit-level modeling of the monolithic 3D structure demonstrates smaller area, faster data transfer, and lower energy consumption than a planar memory. Such platform holds a high potential for energy-efficient 3D on-chip memory systems.

Edge learning using a fully integrated neuro-inspired memristor chip

Learning is highly important for edge intelligence devices to adapt to different application scenes and owners. Current technologies for training neural networks require moving massive amounts of data between computing and memory units, which hinders the implementation of learning on edge devices. We developed a fully integrated memristor chip with the improvement learning ability and low energy cost. The schemes in the STELLAR architecture, including its learning algorithm, hardware realization, and parallel conductance tuning scheme, are general approaches that facilitate on-chip learning by using a memristor crossbar array, regardless of the type of memristor device. Tasks executed in this study included motion control, image classification, and speech recognition.

Simultaneously ultrafast and robust two-dimensional flash memory devices based on phase-engineered edge contacts

As the prevailing non-volatile memory (NVM), flash memory offers mass data storage at high integration density and low cost. However, due to the 'speed-retention-endurance' dilemma, their typical speed is limited to ~microseconds to milliseconds for program and erase operations, restricting their application in scenarios with high-speed data throughput. Here, by adopting metallic 1T-LixMoS2 as edge contact, we show that ultrafast (10-100 ns) and robust (endurance>106 cycles, retention>10 years) memory operation can be simultaneously achieved in a two-dimensional van der Waals heterostructure flash memory with 2H-MoS2 as semiconductor channel. We attribute the superior performance to the gate tunable Schottky barrier at the edge contact, which can facilitate hot carrier injection to the semiconductor channel and subsequent tunneling when compared to a conventional top contact with high density of defects at the metal interface. Our results suggest that contact engineering can become a strategy to further improve the performance of 2D flash memory devices and meet the increasing demands of high speed and reliable data storage.

Suppressing Structural Relaxation in Nanoscale Antimony to Enable Ultralow-Drift Phase-Change Memory Applications

Phase-change random-access memory (PCRAM) devices suffer from pronounced resistance drift originating from considerable structural relaxation of phase-change materials (PCMs), which hinders current developments of high-capacity memory and high-parallelism computing that both need reliable multibit programming. This work realizes that compositional simplification and geometrical miniaturization of traditional GeSbTe-like PCMs are feasible routes to suppress relaxation. While to date, the aging mechanisms of the simplest PCM, Sb, at nanoscale, have not yet been unveiled. Here, this work demonstrates that in an optimal thickness of only 4 nm, the thin Sb film can enable a precise multilevel programming with ultralow resistance drift coefficients, in a regime of ≈10-4 -10-3 . This advancement is mainly owed to the slightly changed Peierls distortion in Sb and the less-distorted octahedral-like atomic configurations across the Sb/SiO2 interfaces. This work highlights a new indispensable approach, interfacial regulation of nanoscale PCMs, for pursuing ultimately reliable resistance control in aggressively-miniaturized PCRAM devices, to boost the storage and computing efficiencies substantially.

Electrochemical-Memristor-Based Artificial Neurons and Synapses-Fundamentals, Applications, and Challenges

Artificial neurons and synapses are considered essential for the progress of the future brain-inspired computing, based on beyond von Neumann architectures. Here, a discussion on the common electrochemical fundamentals of biological and artificial cells is provided, focusing on their similarities with the redox-based memristive devices. The driving forces behind the functionalities and the ways to control them by an electrochemical-materials approach are presented. Factors such as the chemical symmetry of the electrodes, doping of the solid electrolyte, concentration gradients, and excess surface energy are discussed as essential to understand, predict, and design artificial neurons and synapses. A variety of two- and three-terminal memristive devices and memristive architectures are presented and their application for solving various problems is shown. The work provides an overview of the current understandings on the complex processes of neural signal generation and transmission in both biological and artificial cells and presents the state-of-the-art applications, including signal transmission between biological and artificial cells. This example is showcasing the possibility for creating bioelectronic interfaces and integrating artificial circuits in biological systems. Prospectives and challenges of the modern technology toward low-power, high-information-density circuits are highlighted.

Thin film epitaxial [111] Co[Formula: see text]Pt[Formula: see text]: structure, magnetisation, and spin polarisation

Ferromagnetic films with perpendicular magnetic anisotropy are of interest in spintronics and superconducting spintronics. Perpendicular magnetic anisotropy can be achieved in thin ferromagnetic multilayer structures, when the anisotropy is driven by carefully engineered interfaces. Devices with multiple interfaces are disadvantageous for our application in superconducting spintronics, where the current perpendicular to plane is affected by the interfaces. Robust intrinsic PMA can be achieved in certain Co[Formula: see text]Pt[Formula: see text] alloys and compounds at any thickness, without increasing the number of interfaces. Here, we grow equiatomic Co[Formula: see text]Pt[Formula: see text] and report a comprehensive study on the structural, magnetic, and spin-polarisation properties in the [Formula: see text] and [Formula: see text] ordered compounds. Primarily, interest in Co[Formula: see text]Pt[Formula: see text] has been in the [Formula: see text] crystal structure, where layers of Pt and Co are stacked alternately in the [100] direction. There has been less work on [Formula: see text] crystal structure, where the stacking is in the [111] direction. For the latter [Formula: see text] crystal structure, we find magnetic anisotropy perpendicular to the film plane. For the former [Formula: see text] crystal structure, the magnetic anisotropy is perpendicular to the [100] plane, which is neither in-plane or out-of-plane in our samples. We obtain a value for the ballistic spin polarisation of the [Formula: see text] and [Formula: see text] Co[Formula: see text]Pt[Formula: see text] to be [Formula: see text].

Reversible Diode with Tunable Band Alignment for Photoelectricity-Induced Artificial Synapse

The advent of big data era has put forward higher requirements for electronic nanodevices that have low energy consumption for their application in analog computing with memory and logic circuit to address attendant energy efficiency issues. Here, a miniaturized diode with a reversible switching state based on N-n MoS2 homojunction used a bandgap renormalization effect through the band alignment type regulated by both dielectric and polarization, controllably switched between type-I and type-II, which can be simulated as artificial synapse for sensing memory processing because of its rectification, nonvolatile characteristic and high optical responsiveness. The device demonstrates a rectification ratio of 103 . When served as memory retention time, it can attain at least 7000 s. For the synapse simulation, it has an ultralow-level energy consumption because of the pA-level operation current with 5 pJ for long-term potentiation and 7.8 fJ for long-term depression. Furthermore, the paired pulse facilitation index reaches up to 230%, and it realizes the function of optical storage that can be applied to simulate visual cells.

Polymeric Memristor Based Artificial Synapses with Ultra-Wide Operating Temperature

Neuromorphic electronics, being inspired by how the brain works, hold great promise to the successful implementation of smart artificial systems. Among several neuromorphic hardware issues, a robust device functionality under extreme temperature is of particular importance for practical applications. Given that the organic memristors for artificial synapse applications are demonstrated under room temperature, achieving a robust device performance at extremely low or high temperature is still utterly challenging. In this work, the temperature issue is addressed by tuning the functionality of the solution-based organic polymeric memristor. The optimized memristor demonstrates a reliable performance under both the cryogenic and high-temperature environments. The unencapsulated organic polymeric memristor shows a robust memristive response under test temperature ranging from 77 to 573 K. Utilizing X-ray photoelectron spectroscopy (XPS) and time-of-flight secondary-ion mass spectrometry (ToF-SIMS) depth profiling, the device working mechanism is unveiled by comparing the compositional profiles of the fresh and written organic polymeric memristors. A reversible ion migration induced by an applied voltage contributes to the characteristic switching behavior of the memristor. Herein, both the robust memristive response achieved at extreme temperatures and the verified device working mechanism will remarkably accelerate the development of memristors in neuromorphic systems.

Two-Dimensional Layered Materials Meet Perovskite Oxides: A Combination for High-Performance Electronic Devices

As the Si-based transistors scale down to atomic dimensions, the basic principle of current electronics, which heavily relies on the tunable charge degree of freedom, faces increasing challenges to meet the future requirements of speed, switching energy, heat dissipation, and packing density as well as functionalities. Heterogeneous integration, where dissimilar layers of materials and functionalities are unrestrictedly stacked at an atomic scale, is appealing for next-generation electronics, such as multifunctional, neuromorphic, spintronic, and ultralow-power devices, because it unlocks technologically useful interfaces of distinct functionalities. Recently, the combination of functional perovskite oxides and two-dimensional layered materials (2DLMs) led to unexpected functionalities and enhanced device performance. In this paper, we review the recent progress of the heterogeneous integration of perovskite oxides and 2DLMs from the perspectives of fabrication and interfacial properties, electronic applications, and challenges as well as outlooks. In particular, we focus on three types of attractive applications, namely field-effect transistors, memory, and neuromorphic electronics. The van der Waals integration approach is extendible to other oxides and 2DLMs, leading to almost unlimited combinations of oxides and 2DLMs and contributing to future high-performance electronic and spintronic devices.

In-memory factorization of holographic perceptual representations

Disentangling the attributes of a sensory signal is central to sensory perception and cognition and hence is a critical task for future artificial intelligence systems. Here we present a compute engine capable of efficiently factorizing high-dimensional holographic representations of combinations of such attributes, by exploiting the computation-in-superposition capability of brain-inspired hyperdimensional computing, and the intrinsic stochasticity associated with analogue in-memory computing based on nanoscale memristive devices. Such an iterative in-memory factorizer is shown to solve at least five orders of magnitude larger problems that cannot be solved otherwise, as well as substantially lowering the computational time and space complexity. We present a large-scale experimental demonstration of the factorizer by employing two in-memory compute chips based on phase-change memristive devices. The dominant matrix-vector multiplication operations take a constant time, irrespective of the size of the matrix, thus reducing the computational time complexity to merely the number of iterations. Moreover, we experimentally demonstrate the ability to reliably and efficiently factorize visual perceptual representations.

Switching the memory behaviour from binary to ternary by triggering S62- relaxation in polysulfide-bearing zinc-organic complex molecular memories

The use of crystalline metal-organic complexes with definite structures as multilevel memories can enable explicit structure-property correlations, which is significant for designing the next generation of memories. Here, four Zn-polysulfide complexes with different degrees of conjugation have been fabricated as memory devices. ZnS₆(L)₂-based memories (L = pyridine and 3-methylpyridine) can exhibit only bipolar binary memory performances, but ZnS₆(L)-based memories (L = 2,2'-bipyridine and 1,10-phenanthroline) illustrate non-volatile ternary memory performances with high ON2/ON1/OFF ratios (10^4.22/10^2.27/1 and 10^4.85/10^2.58/1) and ternary yields (74% and 78%). Their ON1 states stem from the packing adjustments of organic ligands upon the injection of carriers, and the ON2 states are a result of the ring-to-chain relaxation of S₆^2- anions. The lower conjugated degrees in ZnS₆(L)₂ result in less compact packing; consequently, the adjacent S₆^2- rings are too long to trigger the S₆^2- relaxation. The deep structure-property correlation in this work provides a new strategy for implementing multilevel memory by triggering polysulfide relaxation based on the conjugated degree regulation of organic ligands.

Recent progress in neuromorphic and memory devices based on graphdiyne

Graphdiyne (GDY) is an emerging two-dimensional carbon allotrope featuring a direct bandgap and fascinating physical and chemical properties, and it has demonstrated its promising potential in applications of catalysis, energy conversion and storage, electrical/optoelectronic devices, etc. In particular, the recent breakthrough in the synthesis of large-area, high-quality and ultrathin GDY films provides a feasible approach to developing high-performance electrical devices based on GDY. Recently, various GDY-based electrical and optoelectronic devices including multibit optoelectronic memories, ultrafast nonvolatile memories, artificial synapses and memristors have been proposed, in which GDY plays a crucial role. It is essential to summarize the recent breakthrough of GDY in device applications as a guidance, especially considering that the existing GDY-related reviews mainly focus on the applications in catalysis and energy-related fields. Herein, we review GDY-based novel memory and neuromorphic devices and their applications in neuromorphic computing and artificial visual systems. This review will provide an insight into the design and preparation of GDY-based devices and broaden the application fields of GDY.

Nanoscale Phase Change Material Array by Sub-Resolution Assist Feature for Storage Class Memory Application

High density phase change memory array requires both minimized critical dimension (CD) and maximized process window for the phase change material layer. High in-wafer uniformity of the nanoscale patterning of chalcogenides material is challenging given the optical proximity effect (OPE) in the lithography process and the micro-loading effect in the etching process. In this study, we demonstrate an approach to fabricate high density phase change material arrays with half-pitch down to around 70 nm by the co-optimization of lithography and plasma etching process. The focused-energy matrix was performed to improve the pattern process window of phase change material on a 12-inch wafer. A variety of patternings from an isolated line to a dense pitch line were investigated using immersion lithography system. The collapse of the edge line is observed due to the OPE induced shrinkage in linewidth, which is deteriorative as the patterning density increases. The sub-resolution assist feature (SRAF) was placed to increase the width of the lines at both edges of each patterning by taking advantage of the optical interference between the main features and the assistant features. The survival of the line at the edges is confirmed with around a 70 nm half-pitch feature in various arrays. A uniform etching profile across the pitch line pattern of phase change material was demonstrated in which the micro-loading effect and the plasma etching damage were significantly suppressed by co-optimizing the etching parameters. The results pave the way to achieve high density device arrays with improved uniformity and reliability for mass storage applications.

Research progress in architecture and application of RRAM with computing-in-memory

The development of new technologies has led to an explosion of data, while the computation ability of traditional computers is approaching its upper limit. The dominant system architecture is the von Neumann architecture, with the processing and storage units working independently. The data migrate between them via buses, reducing computing speed and increasing energy loss. Research is underway to increase computing power, such as developing new chips and adopting new system architectures. Computing-in-memory (CIM) technology allows data to be computed directly on the memory, changing the current computation-centric architecture and designing a new storage-centric architecture. Resistive random access memory (RRAM) is one of the advanced memories which has appeared in recent years. RRAM can change its resistance with electrical signals at both ends, and the state will be preserved after power-down. It has potential in logic computing, neural networks, brain-like computing, and fused technology of sense-storage-computing. These advanced technologies promise to break the performance bottleneck of traditional architectures and dramatically increase computing power. This paper introduces the basic concepts of computing-in-memory technology and the principle and applications of RRAM and finally gives a conclusion about these new technologies.

Resistive random access memory: introduction to device mechanism, materials and application to neuromorphic computing

The modern-day computing technologies are continuously undergoing a rapid changing landscape; thus, the demands of new memory types are growing that will be fast, energy efficient and durable. The limited scaling capabilities of the conventional memory technologies are pushing the limits of data-intense applications beyond the scope of silicon-based complementary metal oxide semiconductors (CMOS). Resistive random access memory (RRAM) is one of the most suitable emerging memory technologies candidates that have demonstrated potential to replace state-of-the-art integrated electronic devices for advanced computing and digital and analog circuit applications including neuromorphic networks. RRAM has grown in prominence in the recent years due to its simple structure, long retention, high operating speed, ultra-low-power operation capabilities, ability to scale to lower dimensions without affecting the device performance and the possibility of three-dimensional integration for high-density applications. Over the past few years, research has shown RRAM as one of the most suitable candidates for designing efficient, intelligent and secure computing system in the post-CMOS era. In this manuscript, the journey and the device engineering of RRAM with a special focus on the resistive switching mechanism are detailed. This review also focuses on the RRAM based on two-dimensional (2D) materials, as 2D materials offer unique electrical, chemical, mechanical and physical properties owing to their ultrathin, flexible and multilayer structure. Finally, the applications of RRAM in the field of neuromorphic computing are presented.

Toward the Speed Limit of Phase-Change Memory

Phase-change memory (PCM) is one of the most promising candidates for next-generation data-storage technology, the programming speed of which has enhanced within a timescale from milliseconds to sub-nanosecond (≈500 ps) through decades of effort. As the potential applications of PCM strongly depend on the switching speed, namely, the time required for the recrystallization of amorphous chalcogenide media, the finding of the ultimate crystallization speed is of great importance both theoretically and practically. In this work, through systematic analysis of discovered phase-change materials and ab initio molecular dynamics simulations, elemental Sb-based PCM is predicted to have a superfast crystallization speed. Indeed, such cells experimentally present extremely fast crystallization speeds within 360 ps. Remarkably, the recrystallization process is further sped up as the device shrinks, and a record-fast crystallization speed of only 242 ps is achieved in 60 nm-size devices. These findings open opportunities for dynamic random-access memory (DRAM)-like and even cache-like PCM using appropriate storage materials.

The Effect of Carbon Doping on the Crystal Structure and Electrical Properties of Sb2Te3

As a new generation of non-volatile memory, phase change random access memory (PCRAM) has the potential to fill the hierarchical gap between DRAM and NAND FLASH in computer storage. Sb₂Te₃, one of the candidate materials for high-speed PCRAM, has high crystallization speed and poor thermal stability. In this work, we investigated the effect of carbon doping on Sb₂Te₃. It was found that the FCC phase of C-doped Sb₂Te₃ appeared at 200 °C and began to transform into the HEX phase at 25 °C, which is different from the previous reports where no FCC phase was observed in C-Sb₂Te₃. Based on the experimental observation and first-principles density functional theory calculation, it is found that the formation energy of FCC-Sb₂Te₃ structure decreases gradually with the increase in C doping concentration. Moreover, doped C atoms tend to form C molecular clusters in sp² hybridization at the grain boundary of Sb₂Te₃, which is similar to the layered structure of graphite. And after doping C atoms, the thermal stability of Sb₂Te₃ is improved. We have fabricated the PCRAM device cell array of a C-Sb₂Te₃ alloy, which has an operating speed of 5 ns, a high thermal stability (10-year data retention temperature 138.1 °C), a low device power consumption (0.57 pJ), a continuously adjustable resistance value, and a very low resistance drift coefficient.

The Relationship between Electron Transport and Microstructure in Ge2Sb2Te5 Alloy

Phase-change random-access memory (PCRAM) holds great promise for next-generation information storage applications. As a mature phase change material, Ge₂Sb₂Te₅ alloy (GST) relies on the distinct electrical properties of different states to achieve information storage, but there are relatively few studies on the relationship between electron transport and microstructure. In this work, we found that the first resistance dropping in GST film is related to the increase of carrier concentration, in which the atomic bonding environment changes substantially during the crystallization process. The second resistance dropping is related to the increase of carrier mobility. Besides, during the cubic to the hexagonal phase transition, the nanograins grow significantly from ~50 nm to ~300 nm, which reduces the carrier scattering effect. Our study lays the foundation for precisely controlling the storage states of GST-based PCRAM devices.

Nonvolatile Logic and Ternary Content-Addressable Memory Based on Complementary Black Phosphorus and Rhenium Disulfide Transistors

Hardware realization of in-memory computing for efficient data-intensive computation is regarded as a promising paradigm beyond the Moore era. However, to realize such functions, the device structure using traditional Si complementary metal-oxide-semiconductor (CMOS) technology is complex with a large footprint. 2D material-based heterostructures have a unique advantage to build versatile logic functions based on novel heterostructures with simplified device footprint and low power. Here, by adopting the charge-trapping mechanism between a black phosphorus (BP) channel and a phosphorus oxide (PO_x ) layer, a nonvolatile CMOS logic circuit based on 2D BP and rhenium disulfide (ReS₂ ) with a high voltage gain of ≈275 is realized with a persistent hysteresis window. A Schmidt-like flip-flop using only two transistors is also demonstrated, with far fewer transistor numbers than the conventional silicon counterpart, which usually requires six transistors. Furthermore, four-transistor (4T) nonvolatile ternary content-addressable memory (nvTCAM) cells are demonstrated with far fewer transistors for parallel data search. The nvTCAM cells exhibit high resistance ratios (R_ratio ) up to ≈10³ between match and mismatch states with zero standby power thanks to the nonvolatility of the BP transistors. This back-end-of-line compatible nvTCAM shows advantages over other structures with reduced complexity and thermal budget.

Integrated Memory Devices Based on 2D Materials

With the advent of the Internet of Things and big data, massive data must be rapidly processed and stored within a short timeframe. This imposes stringent requirements on memory hardware implementation in terms of operation speed, energy consumption, and integration density. To fulfill these demands, 2D materials, which are excellent electronic building blocks, provide numerous possibilities for developing advanced memory device arrays with high performance, smart computing architectures, and desirable downscaling. Over the past few years, 2D-material-based memory-device arrays with different working mechanisms, including defects, filaments, charges, ferroelectricity, and spins, have been increasingly developed. These arrays can be used to implement brain-inspired computing or sensing with extraordinary performance, architectures, and functionalities. Here, recent research into integrated, state-of-the-art memory devices made from 2D materials, as well as their implications for brain-inspired computing are surveyed. The existing challenges at the array level are discussed, and the scope for future research is presented.

Robust 2D MoS2 Artificial Synapse Device Based on a Lithium Silicate Solid Electrolyte for High-Precision Analogue Neuromorphic Computing

High-precision artificial synaptic devices compatible with existing CMOS technology are essential for realizing robust neuromorphic hardware systems with reliable parallel analogue computation beyond the von Neumann serial digital computing architecture. However, critical issues related to reliability and variability, such as nonlinearity and asymmetric weight updates, have been great challenges in the implementation of artificial synaptic devices in practical neuromorphic hardware systems. Herein, a robust three-terminal two-dimensional (2D) MoS₂ artificial synaptic device combined with a lithium silicate (LSO) solid-state electrolyte thin film is proposed. The rationally designed synaptic device exhibits excellent linearity and symmetry upon electrical potentiation and depression, benefiting from the reversible intercalation of Li ions into the MoS₂ channel. In particular, extremely low cycle-to-cycle variations (3.01%) during long-term potentiation and depression processes over 500 pulses are achieved, causing statistical analogue discrete states. Thus, a high classification accuracy of 96.77% (close to the software baseline of 98%) is demonstrated in the Modified National Institute of Standards and Technology (MNIST) simulations. These results provide a future perspective for robust synaptic device architecture of lithium solid-state electrolytes stacked with 2D van der Waals layered channels for high-precision analogue neuromorphic computing systems.

Full-Inorganic Flexible Ag2S Memristor with Interface Resistance-Switching for Energy-Efficient Computing

Flexible memristor-based neural network hardware is capable of implementing parallel computation within the memory units, thus holding great promise for fast and energy-efficient neuromorphic computing in flexible electronics. However, the current flexible memristor (FM) is mostly operated with a filamentary mechanism, which demands large energy consumption in both setting and computing. Herein, we report an Ag₂S-based FM working with distinct interface resistance-switching (RS) mechanism. In direct contrast to conventional filamentary memristors, RS in this Ag₂S device is facilitated by the space charge-induced Schottky barrier modification at the Ag/Ag₂S interface, which can be achieved with the setting voltage below the threshold voltage required for filament formation. The memristor based on interface RS exhibits 10⁵ endurance cycles and 10⁴ s retention under bending condition, and multiple level conductive states with exceptional tunability and stability. Since interface RS does not require the formation of a continuous Ag filament via Ag⁺ ion reduction, it can achieve an ultralow switching energy of ∼0.2 fJ. Furthermore, a hardware-based image processing with a software-comparable computing accuracy is demonstrated using the flexible Ag₂S memristor array. And the image processing with interface RS indeed consumes 2 orders of magnitude lower power than that with filamentary RS on the same hardware. This study demonstrates a new resistance-switching mechanism for energy-efficient flexible neural network hardware.

Reconfigurable Compute-In-Memory on Field-Programmable Ferroelectric Diodes

The deluge of sensors and data generating devices has driven a paradigm shift in modern computing from arithmetic-logic centric to data-centric processing. Data-centric processing require innovations at the device level to enable novel compute-in-memory (CIM) operations. A key challenge in the construction of CIM architectures is the conflicting trade-off between the performance and their flexibility for various essential data operations. Here, we present a transistor-free CIM architecture that permits storage, search, and neural network operations on sub-50 nm thick Aluminum Scandium Nitride ferroelectric diodes (FeDs). Our circuit designs and devices can be directly integrated on top of Silicon microprocessors in a scalable process. By leveraging the field-programmability, nonvolatility, and nonlinearity of FeDs, search operations are demonstrated with a cell footprint <0.12 μm² when projected onto 45 nm node technology. We further demonstrate neural network operations with 4-bit operation using FeDs. Our results highlight FeDs as candidates for efficient and multifunctional CIM platforms.

In-Memory Mathematical Operations with Spin-Orbit Torque Devices

Analog arithmetic operations are the most fundamental mathematical operations used in image and signal processing as well as artificial intelligence (AI).  In-memory computing (IMC) offers a high performance and energy-efficient computing paradigm. To date, in-memory analog arithmetic operations with emerging nonvolatile devices are usually implemented using discrete components, which limits the scalability and blocks large scale integration. Here, a prototypical implementation of in-memory analog arithmetic operations (summation, subtraction and multiplication) is experimentally demonstrated, based on in-memory electrical current sensing units using spin-orbit torque (SOT) devices. The proposed structures for analog arithmetic operations are smaller than the state-of-the-art complementary metal oxide semiconductor (CMOS) counterparts by several orders of magnitude. Moreover, data to be processed and computing results can be locally stored, or the analog computing can be done in the nonvolatile SOT devices, which are exploited to experimentally implement the image edge detection and signal amplitude modulation with a simple structure. Furthermore, an artificial neural network (ANN) with SOT devices based synapses is constructed to realize pattern recognition with high accuracy of ≈95%.

Controlled Growth of Wafer-Scale Transition Metal Dichalcogenides with a Vertical Composition Gradient for Artificial Synapses with High Linearity

Artificial synapses are promising for dealing with large amounts of data computing. Great progress has been made recently in terms of improving the on/off current ratio, the number of states, and the energy efficiency of synapse devices. However, the nonlinear weight update behavior of a synapse caused by the uncertain direction of the conductive filament leads to complex weight modulation, which degrades the delivery accuracy of information. Here we propose a strategy to improve the weight update behavior of synapses using chemical-vapor-deposition-grown transition metal dichalcogenides (TMDCs) with a vertical composition gradient, where the sulfur concentration decreases gradually along the thickness direction of TMDCs and thus forms a certain direction of the conduction filament for synapse devices. It is worth noting that the devices show an excellent linear conductance of potentiation and depression with a high linearity of 0.994 (surpassing most state-of-the-art synapses), have a large number of states, and are able to fabricate synapse arrays with wafer-scale. Furthermore, the devices based on the TMDCs with the vertical composition gradient exhibit an asymmetric feature of potentiation and depression behaviors with high linearity and follow the simulated linear Leaky ReLU function, resulting in a high recognition accuracy of 94.73%, which overcomes the unreliability issue in the Sigmoid function due to the vanishing gradient phenomenon. This study not only provides a universal method to grow TMDCs with a vertical composition gradient but also contributes to exploring highly linear synapses toward neuromorphic computing.

Image processing with a multi-level ultra-fast three dimensionally integrated perovskite nanowire array

Besides its ubiquitous applications in optoelectronics, halide-perovskites (HPs) have also carved a niche in the domain of resistive switching memories (Re-RAMs). However owing to the material and electrical instability challenges faced by HP thin-films, rarely perovskite Re-RAMs are used to experimentally demonstrate data processing which is a fundamental requirement for neuromorphic applications. Here, for the first time, lead-free, ultrahigh density HP nanowire (NW) array Re-RAM has been utilized to demonstrate image processing via design of convolutional kernels. The devices exhibited superior switching characteristics including a high endurance of 5 × 10⁶ cycles, an ultra-fast erasing and writing speed of 900 ps and 2 ns, respectively, and a retention time >5 × 10⁴ s for the resistances. The work is bolstered by an in-depth mechanistic study and first-principles simulations which provide evidence of electrochemical metallization triggering the switching. Employing the robust multi-level switching behaviour, image processing functions of embossing, outlining and sharpening were successfully implemented.

Robust Resistive Switching Constancy and Quantum Conductance in High-k Dielectric-Based Memristor for Neuromorphic Engineering

For neuromorphic computing and high-density data storage memory, memristive devices have recently gained a lot of interest. So far, memristive devices have suffered from switching parameter instability, such as distortions in resistance values of low- and high-resistance states (LRSs and HRSs), dispersion in working voltage (set and reset voltages), and a small ratio of high and low resistance, among other issues. In this context, interface engineering is a critical technique for addressing the variation issues that obstruct the use of memristive devices. Herein, we engineered a high band gap, low Gibbs free energy Al₂O₃ interlayer between the HfO₂ switching layer and the tantalum oxy-nitride electrode (TaN) bottom electrode to operate as an oxygen reservoir, increasing the resistance ratio between HRS and LRS and enabling multilayer data storage. The Pt/HfO₂/Al₂O₃/TaN memristive device demonstrates analog bipolar resistive switching behavior with a potential ratio of HRS and LRS of > 10⁵ and the ability to store multi-level data with consistent retention and uniformity. On set and reset voltages, statistical analysis is used; the mean values (µ) of set and reset voltages are determined to be - 2.7 V and + 1.9 V, respectively. There is a repeatable durability over DC 1000 cycles, 10⁵ AC cycles, and a retention time of 10⁴ s at room temperature. Quantum conductance was obtained by increasing the reset voltage with step of 0.005 V with delay time of 0.1 s. Memristive device has also displayed synaptic properties like as potentiation/depression and paired-pulse facilitation (PPF). Results show that engineering of interlayer is an effective approach to improve the uniformity, ratio of high and low resistance, and multiple conductance quantization states and paves the way for research into neuromorphic synapses.

Synaptic Current Response of a Liquid Ga Electrode via a Surface Electrochemical Redox Reaction in a NaOH Solution

An ionic device using a liquid Ga electrode in a 1 M NaOH solution is proposed to generate artificial neural spike signals. The oxidation and reduction at the liquid Ga surface were investigated for different bias voltages at 50 °C. When the positive sweep voltage from the starting voltage (V _S) of 1 V was applied to the Ga electrode, the oxidation current flowed immediately and decreased exponentially with time. The spike and decay current behavior resembled the polarization and depolarization at the influx and extrusion of Ca²⁺ in biological synapses. Different average decay times of ∼81 and ∼310 ms were implemented for V _S of -2 and -5 V, respectively, to mimic the synaptic responses to short- and long-term plasticity; these decay states can be exploited for application in binary electrochemical memory devices. The oxidation mechanism of liquid Ga was studied. The differences in Ga ion concentration due to V _S led to differences in oxidation behavior. Our device is beneficial for the organ cell-machine interface system because liquid Ga is biocompatible and flexible; thus, it can be applied in biocompatible and flexible neuromorphic device development for neuroprosthetics, human cell-machine interface formation, and personal health care monitoring.

Pt Modified Sb2Te3 Alloy Ensuring High-Performance Phase Change Memory

Phase change memory (PCM), due to the advantages in capacity and endurance, has the opportunity to become the next generation of general−purpose memory. However, operation speed and data retention are still bottlenecks for PCM development. The most direct way to solve this problem is to find a material with high speed and good thermal stability. In this paper, platinum doping is proposed to improve performance. The 10-year data retention temperature of the doped material is up to 104 °C; the device achieves an operation speed of 6 ns and more than 3 × 10⁵ operation cycles. An excellent performance was derived from the reduced grain size (10 nm) and the smaller density change rate (4.76%), which are less than those of Ge₂Sb₂Te₅ (GST) and Sb₂Te₃. Hence, platinum doping is an effective approach to improve the performance of PCM and provide both good thermal stability and high operation speed.

Hafnium Oxide (HfO2 ) - A Multifunctional Oxide: A Review on the Prospect and Challenges of Hafnium Oxide in Resistive Switching and Ferroelectric Memories

Hafnium oxide (HfO₂ ) is one of the mature high-k dielectrics that has been standing strong in the memory arena over the last two decades. Its dielectric properties have been researched rigorously for the development of flash memory devices. In this review, the application of HfO₂ in two main emerging nonvolatile memory technologies is surveyed, namely resistive random access memory and ferroelectric memory. How the properties of HfO₂ equip the former to achieve superlative performance with high-speed reliable switching, excellent endurance, and retention is discussed. The parameters to control HfO₂ domains are further discussed, which can unleash the ferroelectric properties in memory applications. Finally, the prospect of HfO₂ materials in emerging applications, such as high-density memory and neuromorphic devices are examined, and the various challenges of HfO₂ -based resistive random access memory and ferroelectric memory devices are addressed with a future outlook.

High On/Off Ratio Spintronic Multi-Level Memory Unit for Deep Neural Network

Spintronic devices are considered as one of the most promising technologies for non-volatile memory and computing. However, two crucial drawbacks, that is, lack of intrinsic multi-level operation and low on/off ratio, greatly hinder their further application for advanced computing concepts, such as deep neural network (DNN) accelerator. In this paper, a spintronic multi-level memory unit with high on/off ratio is proposed by integrating several series-connected magnetic tunnel junctions (MTJs) with perpendicular magnetic anisotropy (PMA) and a Schottky diode in parallel. Due to the rectification effect on the PMA MTJ, an on/off ratio over 100, two orders of magnitude higher than intrinsic values, is obtained under proper proportion of alternating current and direct current. Multiple resistance states are stably achieved and can be reconfigured by spin transfer torque effect. A computing-in-memory architecture based DNN accelerator for image classification with the experimental parameters of this proposal to evidence its application potential is also evaluated. This work can satisfy the rigorous requirements of DNN for memory unit and promote the development of high-accuracy and robust artificial intelligence applications.

Tactile tribotronic reconfigurable p-n junctions for artificial synapses

The emulation of biological synapses with learning and memory functions and versatile plasticity is significantly promising for neuromorphic computing systems. Here, a robust and continuously adjustable mechanoplastic semifloating-gate transistor is demonstrated based on an integrated graphene/hexagonal boron nitride/tungsten diselenide van der Waals heterostructure and a triboelectric nanogenerator (TENG). The working states (p-n junction or n⁺-n junction) can be manipulated and switched under the sophisticated modulation of triboelectric potential derived from mechanical actions, which is attributed to carriers trapping and detrapping in the graphene layer. Furthermore, a reconfigurable artificial synapse is constructed based on such mechanoplastic transistor that can simulate typical synaptic plasticity and implement dynamic control correlations in each response mode by further designing the amplitude and duration. The artificial synapse can work with ultra-low energy consumption at 74.2 fJ per synaptic event and the extended synaptic weights. Under the synergetic effect of the semifloating gate, the synaptic device can enable successive mechanical facilitation/depression, short-/long-term plasticity and learning-experience behavior, exhibiting the mechanical behavior derived synaptic plasticity. Such reconfigurable and mechanoplastic features provide an insight into the applications of energy-efficient and real-time interactive neuromodulation in the future artificial intelligent system beyond von Neumann architecture.

Design and Simulation of Logic-In-Memory Inverter Based on a Silicon Nanowire Feedback Field-Effect Transistor

In this paper, we propose a logic-in-memory (LIM) inverter comprising a silicon nanowire (SiNW) n-channel feedback field-effect transistor (n-FBFET) and a SiNW p-channel metal oxide semiconductor field-effect transistor (p-MOSFET). The hybrid logic and memory operations of the LIM inverter were investigated by mixed-mode technology computer-aided design simulations. Our LIM inverter exhibited a high voltage gain of 296.8 (V/V) when transitioning from logic ‘1’ to ‘0’ and 7.9 (V/V) when transitioning from logic ‘0’ to ‘1’, while holding calculated logic at zero input voltage. The energy band diagrams of the n-FBFET structure demonstrated that the holding operation of the inverter was implemented by controlling the positive feedback loop. Moreover, the output logic can remain constant without any supply voltage, resulting in zero static power consumption.

Direct measurement of nanoscale filamentary hot spots in resistive memory devices

Resistive random access memory (RRAM) is an important candidate for both digital, high-density data storage and for analog, neuromorphic computing. RRAM operation relies on the formation and rupture of nanoscale conductive filaments that carry enormous current densities and whose behavior lies at the heart of this technology. Here, we directly measure the temperature of these filaments in realistic RRAM with nanoscale resolution using scanning thermal microscopy. We use both conventional metal and ultrathin graphene electrodes, which enable the most thermally intimate measurement to date. Filaments can reach 1300°C during steady-state operation, but electrode temperatures seldom exceed 350°C because of thermal interface resistance. These results reveal the importance of thermal engineering for nanoscale RRAM toward ultradense data storage or neuromorphic operation.