Activation Enhancement and Grain Size Improvement for Poly-Si Channel Vertical Transistor by Laser Thermal Annealing in 3D NAND Flash

The bit density is generally increased by stacking more layers in 3D NAND Flash. Lowering dopant activation of select transistors results from complex integrated processes. To improve channel dopant activation, the test structure of vertical channel transistors was used to investigate the influence of laser thermal annealing on dopant activation. The activation of channel doping by different thermal annealing methods was compared. The laser thermal annealing enhanced the channel activation rate by at least 23% more than limited temperature rapid thermal annealing. We then comprehensively explore the laser thermal annealing energy density on the influence of Poly-Si grain size and device performance. A clear correlation between grain size mean and grain size sigma, large grain size mean and sigma with large laser thermal annealing energy density. Large laser thermal annealing energy density leads to tightening threshold voltage and subthreshold swing distribution since Poly-Si grain size regrows for better grain size distribution with local grains optimization. As an enabler for next-generation technologies, laser thermal annealing will be highly applied in 3D NAND Flash for better device performance with stacking more layers, and opening new opportunities of novel 3D architectures in the semiconductor industry.

Accelerated Aging Stability of β-Ga2O3-Titanium/Gold Ohmic Interfaces

Stable ohmic contacts are critical to enable efficient operation of high-voltage electronic devices using ultrawide bandgap semiconductors. Here we perform, for the first time, thermally accelerated aging of Ti/Au ohmic interfaces to (010) β-Ga₂O₃. We find that a heavily doped semiconductor, doped n-type by Si-ion implantation, treated with reactive ion etch (RIE), results in a low specific contact resistance of ∼10^-5 Ω cm² that is stable upon accelerated thermal aging at 300 °C for 108 h. The low resistance interface is due to thermionic field emission of electrons over an inhomogeneous barrier. Scanning/transmission electron microscopy indicates that the multi-layered structure and elemental distribution across the contact interface, formed during a 1 min 470 °C post-metallization anneal, do not change noticeably over the aging period. A ∼1 nm interfacial layer is observed by high-resolution microscopy at the Ti-TiO_x/Ga₂O₃ interface on all samples exposed to RIE, which may contribute to their excellent stability. In addition, longer-range facet-like interfacial features are observed, which may contribute to the inhomogeneous barrier. In contrast, Ti/Au junctions to moderately doped (010) Ga₂O₃ made with no RIE treatment exhibit a high contact resistance that increases upon accelerated aging, along with a partially lattice-matched interface. The methods used here to understand the process, structure, and electrical property relationships for Ti/Au contact interfaces to β-Ga₂O₃ can be applied to assess and tune the stability of a variety of other oxide-semiconductor interfaces.

A differential Hall effect measurement method with sub-nanometre resolution for active dopant concentration profiling in ultrathin doped Si1-x Ge x and Si layers

In this paper, we present an enhanced differential Hall effect measurement method (DHE) for ultrathin Si and SiGe layers for the investigation of dopant activation in the surface region with sub-nanometre resolution. In the case of SiGe, which constitutes the most challenging process, we show the reliability of the SC1 chemical solution (NH₄OH/H₂O₂/H₂O) with its slow etch rate, stoichiometry conservation and low roughness generation. The reliability of a complete DHE procedure, with an etching step as small as 0.5 nm, is demonstrated on a dedicated 20 nm thick SiGe test structure fabricated by CVD and uniformly doped in situ during growth. The developed method is finally applied to the investigation of dopant activation achieved by advanced annealing methods (including millisecond and nanosecond laser annealing) in two material systems: 6 nm thick SiGeOI and 11 nm thick SOI. In both cases, DHE is shown to be a uniquely sensitive characterisation technique for a detailed investigation of dopant activation in ultrashallow layers, providing sub-nanometre resolution for both dopant concentration and carrier mobility depth profiles.

Localized Electrothermal Annealing with Nanowatt Power for a Silicon Nanowire Field-Effect Transistor

This work investigates localized electrothermal annealing (ETA) with extremely low power consumption. The proposed method utilizes, for the first time, tunneling-current-induced Joule heat in a p-i-n diode, consisting of p-type, intrinsic, and n-type semiconductors. The consumed power used for dopant control is the lowest value ever reported. A metal-oxide-semiconductor field-effect transistor (MOSFET) composed of a p-i-n silicon nanowire, which is a substructure of a tunneling FET (TFET), was fabricated and utilized as a test platform to examine the annealing behaviors. A more than 2-fold increase in the on-state (I_ON) current was achieved using the ETA. Simulations are conducted to investigate the location of the hot spot and how its change in heat profile activates the dopants.

Shallow Heavily Doped n++ Germanium by Organo-Antimony Monolayer Doping

Functionalization of Ge surfaces with the aim of incorporating specific dopant atoms to form high-quality junctions is of particular importance for the development of solid-state devices. In this study, we report the shallow doping of Ge wafers with a monolayer doping strategy that is based on the controlled grafting of Sb precursors and the subsequent diffusion of Sb into the wafer upon annealing. We also highlight the key role of citric acid in passivating the surface before its reaction with the Sb precursors and the benefit of a protective SiO₂ overlayer that enables an efficient incorporation of Sb dopants with a concentration higher than 10²⁰ cm^-3. Microscopic four-point probe measurements and photoconductivity experiments show the full electrical activation of the Sb dopants, giving rise to the formation of an n++ Sb-doped layer and an enhanced local field-effect passivation at the surface of the Ge wafer.