MoS2 Field-Effect Transistor with Sub-10 nm Channel Length

Contact Resistance Engineering in WS2-Based FET with MoS2 Under-Contact Interlayer: A Statistical Approach

One of the primary factors hindering the development of 2D material-based devices is the difficulty of overcoming fabrication processes, which pose a challenge in achieving low-resistance contacts. Widely used metal deposition methods lead to unfavorable Fermi level pinning effect (FLP), which prevents control over the Schottky barrier height at the metal/2D material junction. We propose to harness the FLP effect to lower contact resistance in field-effect transistors (FETs) by using an additional 2D interlayer at the conducting channel and metallic contact interface (under-contact interlayer). To do so, we developed a new approach using the gold-assisted transfer method, which enables the fabrication of heterostructures consisting of TMDs monolayers with complex shapes, prepatterned using e-beam lithography, with lateral dimensions even down to 100 nm. We designed and demonstrated tungsten disulfide (WS2) monolayer-based devices in which the molybdenum disulfide (MoS2) monolayer is placed only in the contact area of the FET, creating an Au/MoS2/WS2 junction, which effectively reduces contact resistance by over 60% and improves the Ion/Ioff ratio 10 times in comparison to WS2-based devices without MoS2 under-contact interlayer. The enhancement in the device operation arises from the FLP effect occurring only at the interface between the metal and the first layer of the MoS2/WS2 heterostructure. This results in favorable band alignment, which enhances the current flow through the junction. To ensure the reproducibility of our devices, we systematically analyzed 160 FET devices fabricated with under-contact interlayer and without it. Statistical analysis shows a consistent improvement in the operation of the device and reveals the impact of contact resistance on key FET performance indicators.

Synthesis, Modulation, and Application of Two-Dimensional TMD Heterostructures

Two-dimensional (2D) transition metal dichalcogenide (TMD) heterostructures have attracted a lot of attention due to their rich material diversity and stack geometry, precise controllability of structure and properties, and potential practical applications. These heterostructures not only overcome the inherent limitations of individual materials but also enable the realization of new properties through appropriate combinations, establishing a platform to explore new physical and chemical properties at micro-nano-pico scales. In this review, we systematically summarize the latest research progress in the synthesis, modulation, and application of 2D TMD heterostructures. We first introduce the latest techniques for fabricating 2D TMD heterostructures, examining the rationale, mechanisms, advantages, and disadvantages of each strategy. Furthermore, we emphasize the importance of characteristic modulation in 2D TMD heterostructures and discuss some approaches to achieve novel functionalities. Then, we summarize the representative applications of 2D TMD heterostructures. Finally, we highlight the challenges and future perspectives in the synthesis and device fabrication of 2D TMD heterostructures and provide some feasible solutions.

Processes to enable hysteresis-free operation of ultrathin ALD Te p-channel field-effect transistors

Recently, tellurium (Te) has been proposed as a promising p-type material; however, even the state-of-the-art results couldn't overcome the critical roadblocks for its practical applications, such as large I-V hysteresis and high off-state leakage current. We developed a novel Te atomic layer deposition (ALD) process combined with a TeOx seed layer and Al2O3 passivation to detour the limitations of p-type Te semiconducting materials. Also, we have identified the origins of high hysteresis and off current using the 77 K operation study and passivation process optimization. As a result, a p-type Te field-effect transistor exhibits less than 23 mV hysteresis and a high field-effect mobility of 33 cm2 V-1 s-1 after proper channel thickness modulation and passivation. Also, an ultralow off-current of approximately 1 × 10-14 A, high on/off ratios in the order of 108, and a steep slope subthreshold swing of 79 mV dec-1 could be achieved at 77 K. These enhancements strongly indicate that the previously reported high off-state current was originated from interfacial defects formed at the metal-Te contact interface. Although further studies concerning this interface are still necessary, the findings herein demonstrate that the major obstacles hindering the use of Te for ultrathin p-channel device applications can be eliminated by proper process optimization.

Simulation of Novel Nano Low-Dimensional FETs at the Scaling Limit

The scaling of bulk Si-based transistors has reached its limits, while novel architectures such as FinFETs and GAAFETs face challenges in sub-10 nm nodes due to complex fabrication processes and severe drain-induced barrier lowering (DIBL) effects. An effective strategy to avoid short-channel effects (SCEs) is the integration of low-dimensional materials into novel device architectures, leveraging the coupling between multiple gates to achieve efficient electrostatic control of the channel. We employed TCAD simulations to model multi-gate FETs based on various dimensional systems and comprehensively investigated electric fields, potentials, current densities, and electron densities within the devices. Through continuous parameter scaling and extracting the sub-threshold swing (SS) and DIBL from the electrical outputs, we offered optimal MoS2 layer numbers and single-walled carbon nanotube (SWCNT) diameters, as well as designed structures for multi-gate FETs based on monolayer MoS2, identifying dual-gate transistors as suitable for high-speed switching applications. Comparing the switching performance of two device types at the same node revealed CNT's advantages as a channel material in mitigating SCEs at sub-3 nm nodes. We validated the performance enhancement of 2D materials in the novel device architecture and reduced the complexity of the related experimental processes. Consequently, our research provides crucial insights for designing next-generation high-performance transistors based on low-dimensional materials at the scaling limit.

A next-generation transistor with low supply voltage operation constructed based on 2D materials' metal-semiconductor phase transition

Power dissipation, a fundamental limitation for realizing high-performance electronic devices, may be effectively reduced by an external supply voltage. However, a small supply voltage simultaneously brings another serious challenge, that is, a remarkable device inability in transistors. To deal with this issue, we propose a new transistor design based on the metal-semiconductor phase transition in a AsGeC3 monolayer, which provides a switching mechanism of band-to-band tunneling at on- and off-states by gate-voltage modulation. Our first-principles calculations uncover that the monolayer AsGeC3 field-effect transistors (FETs) with gate lengths of 5, 4, and 3 nm may meet well the requirements for on-state current (Ion), power dissipation (PDP), and delay period (τ) as outlined by the International Technology Roadmap for Semiconductors (ITRS) in 2013 to achieve higher performance by the year 2028. Importantly, high performances are achieved only under a very low supply voltage (VDD = 0.05/0.10 V). Significantly, the AsGeC3 FETs exhibit remarkably lower values of both PDP and τ than those of nearly all the transistors reported up to date. These novel 2D metal-semiconductor phase transition-based FETs open up a new door for designing next-generation low-power electronic devices.

Performance Limits and Advancements in Single 2D Transition Metal Dichalcogenide Transistor

Two-dimensional (2D) transition metal dichalcogenides (TMDs) allow for atomic-scale manipulation, challenging the conventional limitations of semiconductor materials. This capability may overcome the short-channel effect, sparking significant advancements in electronic devices that utilize 2D TMDs. Exploring the dimension and performance limits of transistors based on 2D TMDs has gained substantial importance. This review provides a comprehensive investigation into these limits of the single 2D-TMD transistor. It delves into the impacts of miniaturization, including the reduction of channel length, gate length, source/drain contact length, and dielectric thickness on transistor operation and performance. In addition, this review provides a detailed analysis of performance parameters such as source/drain contact resistance, subthreshold swing, hysteresis loop, carrier mobility, on/off ratio, and the development of p-type and single logic transistors. This review details the two logical expressions of the single 2D-TMD logic transistor, including current and voltage. It also emphasizes the role of 2D TMD-based transistors as memory devices, focusing on enhancing memory operation speed, endurance, data retention, and extinction ratio, as well as reducing energy consumption in memory devices functioning as artificial synapses. This review demonstrates the two calculating methods for dynamic energy consumption of 2D synaptic devices. This review not only summarizes the current state of the art in this field but also highlights potential future research directions and applications. It underscores the anticipated challenges, opportunities, and potential solutions in navigating the dimension and performance boundaries of 2D transistors.

Epitaxial Integration of Transferable High-κ Dielectric and 2D Semiconductor

The synthesis of high-dielectric-constant (high-κ) dielectric materials and their integration with channel materials have been the key challenges in the state-of-the-art transistor architecture, as they can provide strong gate control and low operating voltage. For next-generation electronics, high-mobility two-dimensional (2D) layered semiconductors with dangling-bond-free surfaces and an atomic-thick thickness are being explored as channel materials to achieve shorter channel lengths and less interfacial scattering. Nowadays, the integration of high-κ dielectrics with high-mobility 2D semiconductors mainly relies on atomic layer deposition or transfer stacking, which may cause several undesirable problems, such as channel damage and interface traps. Here, we demonstrate the integration of high-mobility 2D semiconducting Bi2O2Se with transferable high-κ SrTiO3 as a 2D field-effect transistor by direct epitaxial growth. Remarkably, such 2D heterostructures can be efficiently transferred from the water-soluble Sr3Al2O6 sacrificial layer onto arbitrary substrates. The as-fabricated 2D Bi2O2Se/SrTiO3 transistors exhibit an on/off ratio over 104 and a subthreshold swing down to 90 mV/dec. Furthermore, the 2D Bi2O2Se/SrTiO3 heterostructures can be easily transferred onto flexible polyethylene terephthalate (PET) substrates, and the as-fabricated transistors exhibit good potential in flexible electronics. Our study opens up a new avenue for the integration of high-κ dielectrics with high-mobility 2D semiconductors and paves the way for the exploration of multifunctional electronic devices.

Small Feature-Size Transistors Based on Low-Dimensional Materials: From Structure Design to Nanofabrication Techniques

For several decades after Moore's Law is proposed, there is a continuous effort to reduce the feature-size of transistors. However, as the size of transistors continues to decrease, numerous challenges and obstacles including severe short channel effects (SCEs) are emerging. Recently, low-dimensional materials have provided new opportunities for constructing small feature-size transistors due to their superior electrical properties compared to silicon. Here, state-of-the-art low-dimensional materials-based transistors with small feature-sizes are reviewed. Different from other works that mainly focus on material characteristics of a specific device structure, the discussed topics are utilizing device structure design including vertical structure and nano-gate structure, and nanofabrication techniques to achieve small feature-sizes of transistors. A comprehensive summary of these small feature-size transistors is presented by illustrating their operation mechanism, relevant fabrication processes, and corresponding performance parameters. Besides, the role of small feature-size transistors based on low-dimensional materials in further reducing the small footprint is also clarified and their cutting-edge applications are highlighted. Finally, a comparison and analysis between state-of-art transistors is made, as well as a glimpse into the future research trajectory of low dimensional materials-based small feature-size transistors is briefly outlined.

High-Performance Sub-10 nm Two-Dimensional SbSeBr Transistors through Transport Orientation

Exploring two-dimensional (2D) materials with a small carrier effective mass and suitable band gap is crucial for the design of metal oxide semiconductor field effect transistors (MOSFETs). Here, the quantum transport properties of stable 2D SbSeBr are simulated on the basis of first-principles calculations. Monolayer SbSeBr proves to be a competitive channel material, offering a suitable band gap of 1.18 eV and a small electron effective mass (me*) of 0.22m0. The 2D SbSeBr field effect transistor (FET) with 8 nm channel length exhibits a high on-state current of 1869 μA/μm, low power consumption of 0.080 fJ/μm, and small delay time of 0.062 ps, which can satisfy the requirements of the International Technology Roadmap for Semiconductors for high-performance devices. Moreover, despite the monolayer SbSeBr having an isotropic me*, the asymmetrical band trends enable SbSeBr FETs to display transport orientation, which emphasizes the importance of band trends and provides valuable insights for selecting channel materials.

Magneto-transport in the monolayer MoS2material system for high-performance field-effect transistor applications

Electronic transport in monolayer MoS2is significantly constrained by several extrinsic factors despite showing good prospects as a transistor channel material. Our paper aims to unveil the underlying mechanisms of the electrical and magneto-transport in monolayer MoS2. In order to quantitatively interpret the magneto-transport behavior of monolayer MoS2on different substrate materials, identify the underlying bottlenecks, and provide guidelines for subsequent improvements, we present a deep analysis of the magneto-transport properties in the diffusive limit. Our calculations are performed on suspended monolayer MoS2and MoS2on different substrate materials taking into account remote impurity and the intrinsic and extrinsic phonon scattering mechanisms. We calculate the crucial transport parameters such as the Hall mobility, the conductivity tensor elements, the Hall factor, and the magnetoresistance over a wide range of temperatures, carrier concentrations, and magnetic fields. The Hall factor being a key quantity for calculating the carrier concentration and drift mobility, we show that for suspended monolayer MoS2at room temperature, the Hall factor value is around 1.43 for magnetic fields ranging from 0.001 to 1 Tesla, which deviates significantly from the usual value of unity. In contrast, the Hall factor for various substrates approaches the ideal value of unity and remains stable in response to the magnetic field and temperature. We also show that the MoS2over an Al2O3substrate is a good choice for the Hall effect detector. Moreover, the magnetoresistance increases with an increase in magnetic field strength for smaller magnetic fields before reaching saturation at higher magnetic fields. The presented theoretical model quantitatively captures the scaling of mobility and various magnetoresistance coefficients with temperature, carrier densities, and magnetic fields.

High-Performance Contact-Doped WSe2 Transistors Using TaSe2 Electrodes

Two-dimensional (2D) transitional metal dichalcogenides (TMDs) have garnered significant attention due to their potential for next-generation electronics, which require device scaling. However, the performance of TMD-based field-effect transistors (FETs) is greatly limited by the contact resistance. This study develops an effective strategy to optimize the contact resistance of WSe2 FETs by combining contact doping and 2D metallic electrode materials. The contact regions were doped using a laser, and the metallic TaSe2 flakes were stacked on doped WSe2 as electrodes. Doping the contact areas decreases the depletion width, while introducing the TaSe2 contact results in a lower Schottky barrier. This method significantly improves the electrical performance of the WSe2 FETs. The doped WSe2/TaSe2 contact exhibits an ultralow Schottky barrier height of 65 meV and a contact resistance of 11 kΩ·μm, which is a 50-fold reduction compared to the conventional Cr/Au contact. Our method offers a way on fabricating high-performance 2D FETs.

Nanoscale Channel Length MoS2 Vertical Field-Effect Transistor Arrays with Side-Wall Source/Drain Electrodes

Two-dimensional transition metal dichalcogenides (TMDCs) have natural advantages in overcoming the short-channel effect in field-effect transistors (FETs) and in fabricating three-dimensional FETs, which benefit in increasing device density. However, so far, most reported works related to MoS2 FETs with a sub-100 nm channel employ mechanically exfoliated materials and all of the works involve electron beam lithography (EBL), which may limit their application in fabricating wafer-scale device arrays as demanded in integrated circuits (ICs). In this work, MoS2 FET arrays with a side-wall source and drain electrodes vertically distributed are designed and fabricated. The channel length of the as-fabricated FET is basically determined by the thickness of an insulating layer between the source and drain electrodes. The vertically distributed source and drain electrodes enable to reduce the electrode-occupied area and increase in the device density. The as-fabricated vertical FETs exhibit on/off ratios comparable to those of mechanically exfoliated MoS2 FETs with a nanoscale channel length under identical VDS. In addition, the as-fabricated FETs can work at a VDS as low as 10 mV with a desirable on/off ratio (1.9 × 107), which benefits in developing low-power devices. Moreover, the fabrication process is free from EBL and can be applied to wafer-scale device arrays. The statistical results show that the fabricated FET arrays have a device yield of 87.5% and an average on/off ratio of about 1.7 × 106 at a VDS of 10 mV, with the lowest and highest ones to be about 1.3 × 104 and 1.9 × 107, respectively, demonstrating the good reliability of our fabrication process. Our work promises a bright future for TMDCs in realizing high-density and low-power nanoelectronic devices in ICs.

Epitaxy of wafer-scale single-crystal MoS2 monolayer via buffer layer control

Monolayer molybdenum disulfide (MoS2), an emergent two-dimensional (2D) semiconductor, holds great promise for transcending the fundamental limits of silicon electronics and continue the downscaling of field-effect transistors. To realize its full potential and high-end applications, controlled synthesis of wafer-scale monolayer MoS2 single crystals on general commercial substrates is highly desired yet challenging. Here, we demonstrate the successful epitaxial growth of 2-inch single-crystal MoS2 monolayers on industry-compatible substrates of c-plane sapphire by engineering the formation of a specific interfacial reconstructed layer through the S/MoO3 precursor ratio control. The unidirectional alignment and seamless stitching of MoS2 domains across the entire wafer are demonstrated through cross-dimensional characterizations ranging from atomic- to centimeter-scale. The epitaxial monolayer MoS2 single crystal shows good wafer-scale uniformity and state-of-the-art quality, as evidenced from the ~100% phonon circular dichroism, exciton valley polarization of ~70%, room-temperature mobility of ~140 cm2v-1s-1, and on/off ratio of ~109. Our work provides a simple strategy to produce wafer-scale single-crystal 2D semiconductors on commercial insulator substrates, paving the way towards the further extension of Moore's law and industrial applications of 2D electronic circuits.

Comprehensive understanding of electron mobility and superior performance in sub-10 nm DG ML tetrahex-GeC2 n-type MOSFETs

In this study, we have investigated the electron mobility of monolayered (ML) tetrahex-GeC2 by solving the linearized Boltzmann transport equation (BTE) with the normalized full-band relaxation time approximation (RTA) using density functional theory (DFT). Contrary to what the deformation potential theory (DPT) suggested, the ZA acoustic mode was determined to be the most restrictive for electron mobility, not the LA mode. The electron mobility at 300 K is 803 cm2 (V s)-1, exceeding the 400 cm2 (V s)-1 of MoS2 which was calculated using the same method and measured experimentally. The ab initio quantum transport simulations were performed to assess the performance limits of sub-10 nm DG ML tetrahex-GeC2 n-type MOSFETs, including gate lengths (Lg) of 3 nm, 5 nm, 7 nm, and 9 nm, with the underlap (UL) effect considered for the first two. For both high-performance (HP) and low-power (LP) applications, their on-state currents (Ion) can meet the requirements of similar nodes in the ITRS 2013. In particular, the Ion is more remarkable for HP applications than that of the extensively studied MoS2. For LP applications, the Ion values at Lg of 7 and 9 nm surpass those of arsenene, known for having the largest Ion among 2D semiconductors. Subthreshold swings (SSs) as low as 69/53 mV dec-1 at an Lg of 9 nm were observed for HP/LP applications, and 73 mV dec-1 at an Lg of 5 nm for LP applications, indicating the excellent gate control capability. Moreover, the delay time τ and power dissipation (PDP) at Lg values of 3 nm, 5 nm, 7 nm, and 9 nm are all below the upper limits of the ITRS 2013 HP/LP proximity nodes and are comparable to or lower than those of typical 2D semiconductors. The sub-10 nm DG ML tetrahex-GeC2 n-type MOSFETs can be down-scaled to 9 nm and 5 nm for HP and LP applications, respectively, displaying desirable Ion, delay time τ, and PDP in the ballistic limit, making them a potential choice for sub-10 nm transistors.

High-performance monolayer MoS2nanosheet GAA transistor

In this article, a 0.7 nm thick monolayer MoS2nanosheet gate-all-around field effect transistors (NS-GAAFETs) with conformal high-κmetal gate deposition are demonstrated. The device with 40 nm channel length exhibits a high on-state current density of ~410μAμm-1with a large on/off ratio of 6 × 108at drain voltage = 1 V. The extracted contact resistance is 0.48 ± 0.1 kΩμm in monolayer MoS2NS-GAAFETs, thereby showing the channel-dominated performance with the channel length scaling from 80 to 40 nm. The successful demonstration of device performance in this work verifies the integration potential of transition metal dichalcogenides for future logic transistor applications.

Ultrashort vertical-channel MoS2 transistor using a self-aligned contact

Two-dimensional (2D) semiconductors hold great promises for ultra-scaled transistors. In particular, the gate length of MoS2 transistor has been scaled to 1 nm and 0.3 nm using single wall carbon nanotube and graphene, respectively. However, simultaneously scaling the channel length of these short-gate transistor is still challenging, and could be largely attributed to the processing difficulties to precisely align source-drain contact with gate electrode. Here, we report a self-alignment process for realizing ultra-scaled 2D transistors. By mechanically folding a graphene/BN/MoS2 heterostructure, source-drain metals could be precisely aligned around the folded edge, and the channel length is only dictated by heterostructure thickness. Together, we could realize sub-1 nm gate length and sub-50 nm channel length for vertical MoS2 transistor simultaneously. The self-aligned device exhibits on-off ratio over 105 and on-state current of 250 μA/μm at 4 V bias, which is over 40 times higher compared to control sample without self-alignment process.

Physical vapor deposition-free scalable high-efficiency electrical contacts to MoS2

Fermi-level pinning caused by the kinetic damage during metallization has been recognized as one of the major reasons for the non-ideal behavior of electrical contacts, forbidding reaching the Schottky-Mott limit. In this manuscript, we present a scalable technique wherein Indium, a low-work-function metal, is diffused to contact a few-layered MoS2flake. The technique exploits a smooth outflow of Indium over gold electrodes to make edge contacts to pre-transferred MoS2flakes. We compare the performance of three pairs of contacts made onto the same MoS2flake, the bottom-gold, top-gold, and Indium contacts, and find that the Indium contacts are superior to other contacts. The Indium contacts maintain linearI-Vcharacteristics down to cryogenic temperatures with an extracted Schottky barrier height of ∼2.1 meV. First-principle calculations show the induced in-gap states close to the Fermi level, and the damage-free contact interface could be the reason for the nearly Ohmic behavior of the Indium/MoS2interface.

The device performance limit of in-plane monolayer VTe2/WTe2 heterojunction-based field-effect transistors

To overcome the scaling restriction on silicon-based field-effect transistors (FETs), two-dimensional (2D) transition metal dichalcogenides (TMDs) have been strongly proposed as alternative materials. To explore the device performance limit of TMD-based FETs, in this work, the ab initio quantum transport approach is utilized to study the transport properties of monolayer VTe2/WTe2 heterojunction-based FETs possessing double gates (DGs) with a 5 nm gate length (Lg). Our theoretical simulations demonstrate that the DG-cold-source VTe2/WTe2 FETs with a 5 nm Lg and 2 or 3 nm proper underlap (UL) meet the basic requirements of the on-state current (Ion), power dissipation (PDP), and delay time (τ) for the 2028 needs of the International Technology Roadmap for Semiconductor (ITRS) 2013, which ensures their high-performance and low-power-dissipation device applications. Moreover, the DG-cold-source VTe2/WTe2-based FETs with a 3 nm Lg and 2 or 3 nm UL meet the high-performance requirements of Ion, τ, and PDP for the 2028 needs of ITRS 2013. Additionally, by further considering the negative capacitance technology in devices, the parameters τ, Ion, and PDP of the VTe2/WTe2-based FETs with a 1 nm Lg and 3 nm UL meet well with the 2028 needs for ITRS 2013 towards high-performance device applications. Our theoretical results uncover that the 2D DG-cold-source VTe2/WTe2 FETs can be used as a new kind of promising material candidate to drive the scaling of Moore's law down to 1 nm.

Sub-9 nm high-performance and low-power transistors based on an in-plane NbSe2/MoSe2/NbSe2 heterojunction

Due to the ability to reduce the gate length of field-effect transistors (FETs) down to sub-10 nm without obviously affecting the performance of the device, the utilization of two-dimensional (2D) semiconductor materials as channel materials for FETs is of great interest. However, in-plane 2D/2D heterojunction FETs have received less attention in previous studies than vertical van der Waals heterojunction devices. Based on the above reasons, this study has investigated the transport properties of an in-plane NbSe2/MoSe2/NbSe2 heterojunction FET with different gate lengths by using ab initio quantum transport simulation. The results reveal that a gate length of sub-9 nm gives the device a low subthreshold swing down to 62 mV dec-1 and a high on-state current up to 1040 μA μm-1. Most importantly, the on-state current, delay time, and power dissipation of the FET with the optimized channel length can nearly meet or even exceed the high-performance and low-power requirements of the International Technology Roadmap for Semiconductors. The findings for this FET can provide the design and development guidance for other in-plane heterojunction electrical devices in the post-Moore era.

LaOMS2 (M = Ti, V, and Cr): novel crystal spin valves without contact

2D materials are widely investigated for application in nanodevices and spintronics. Here, we demonstrate that a family of structures, LaOMS2 (M = Ti, V, and Cr), where a La2O2 layer is sandwiched between two magnetic MS2 layers, are suitable to be used as spin valves without contact. We show that they are stable and exhibit unique magnetic and electronic properties. We find that (1) each MS2 layer is ferromagnetic with the magnetic moment mainly contributed by the M ion and the coupling between the two MS2 layers in one structure is negligible due to the blocking of the La2O2 layer; (2) LaOMS2 can be a half-metal in the ferromagnetic (FM) state and a conductor in the interlayer antiferromagnetic (inter-AFM) state, and the total energies of the two states are almost identical; (3) the magnetic properties and exchange energy can be effectively controlled by contacting with other materials; and (4) a 100% spin current is achieved in FM LaOMS2. Our results provide not only novel structures for practical application in spintronics, but also strategies for designing new devices.

Polarization-tunable interfacial properties in monolayer-MoS2 transistors integrated with ferroelectric BiAlO3(0001) polar surfaces

With the explosion of data-centric applications, new in-memory computing technologies, based on nonvolatile memory devices, have become competitive due to their merged logic-memory functionalities. Herein, employing first-principles quantum transport simulation, we theoretically investigate for the first time the electronic and contact properties of two types of monolayer (ML)-MoS2 ferroelectric field-effect transistors (FeFETs) integrated with ferroelectric BiAlO3(0001) (BAO(0001)) polar surfaces. Our study finds that the interfacial properties of the investigated partial FeFET devices are highly tunable by switching the electric polarization of the ferroelectric BAO(0001) dielectric. Specifically, the transition from quasi-Ohmic to the Schottky contact, as well as opposite contact polarity of respective n-type and p-type Schottky contact under two polarization states can be obtained, suggesting their superior performance metrics in terms of nonvolatile information storage. In addition, due to the feature of (quasi-)Ohmic contact in some polarization states, the explored FeFET devices, even when operating in the regular field-effect transistor (FET) mode, can be extremely significant in realizing a desirable low threshold voltage and interfacial contact resistance. In conjunction with the formed van der Waals (vdW) interfaces in ML-MoS2/ferroelectric systems with an interlayer, the proposed FeFETs are expected to provide excellent device performance with regard to cycling endurance and memory density.

Tunable Contact Types and Interfacial Electronic Properties in TaS2/MoS2 and TaS2/WSe2 Heterostructures

Following the successful experimental synthesis of single-layer metallic 1T-TaS₂ and semiconducting 2H-MoS₂, 2H-WSe₂, we perform a first-principles study to investigate the electronic and interfacial features of metal/semiconductor 1T-TaS₂/2H-MoS₂ and 1T-TaS₂/2H-WSe₂ van der Waals heterostructures (vdWHs) contact. We show that 1T-TaS₂/2H-MoS₂ and 1T-TaS₂/2H-WSe₂ form n-type Schottky contact (n-ShC type) and p-type Schottky contact (p-ShC type) with ultralow Schottky barrier height (SBH), respectively. This indicates that 1T-TaS₂ can be considered as an effective metal contact with high charge injection efficiency for 2H-MoS₂, 2H-WSe₂ semiconductors. In addition, the electronic structure and interfacial properties of 1T-TaS₂/2H-MoS₂ and 1T-TaS₂/2H-WSe₂ van der Waals heterostructures can be transformed from n-type to p-type Schottky contact through the effect of layer spacing and the electric field. At the same time, the transition from Schottky contact to Ohmic contact can also occur by relying on the electric field and different interlayer spacing. Our results may provide a new approach for photoelectric application design based on metal/semiconductor 1T-TaS₂/2H-MoS₂ and 1T-TaS₂/2H-WSe₂ van der Waals heterostructures.

Scaling of MoS2 Transistors and Inverters to Sub-10 nm Channel Length with High Performance

Two-dimensional (2D) semiconductors such as monolayer molybdenum disulfide (MoS₂) are promising building blocks for ultrascaled field effect transistors (FETs), benefiting from their atomic thickness, dangling-bond-free flat surface, and excellent gate controllability. However, despite great prospects, the fabrication of 2D ultrashort channel FETs with high performance and uniformity remains a challenge. Here, we report a self-encapsulated heterostructure undercut technique for the fabrication of sub-10 nm channel length MoS₂ FETs. The fabricated 9 nm channel MoS₂ FETs exhibit superior performances compared with sub-15 nm channel length including the competitive on-state current density of 734/433 μA/μm at V_DS = 2/1 V, record-low DIBL of ∼50 mV/V, and superior on/off ratio of 3 × 10⁷ and low subthreshold swing of ∼100 mV/dec. Furthermore, the ultrashort channel MoS₂ FETs fabricated by this new technique show excellent homogeneity. Thanks to this, we scale the monolayer inverter down to sub-10 nm channel length.

Ballistic two-dimensional InSe transistors

The International Roadmap for Devices and Systems (IRDS) forecasts that, for silicon-based metal-oxide-semiconductor (MOS) field-effect transistors (FETs), the scaling of the gate length will stop at 12 nm and the ultimate supply voltage will not decrease to less than 0.6 V (ref. 1). This defines the final integration density and power consumption at the end of the scaling process for silicon-based chips. In recent years, two-dimensional (2D) layered semiconductors with atom-scale thicknesses have been explored as potential channel materials to support further miniaturization and integrated electronics. However, so far, no 2D semiconductor-based FETs have exhibited performances that can surpass state-of-the-art silicon FETs. Here we report a FET with 2D indium selenide (InSe) with high thermal velocity as channel material that operates at 0.5 V and achieves record high transconductance of 6 mS μm-1 and a room-temperature ballistic ratio in the saturation region of 83%, surpassing those of any reported silicon FETs. An yttrium-doping-induced phase-transition method is developed for making ohmic contacts with InSe and the InSe FET is scaled down to 10 nm in channel length. Our InSe FETs can effectively suppress short-channel effects with a low subthreshold swing (SS) of 75 mV per decade and drain-induced barrier lowering (DIBL) of 22 mV V-1. Furthermore, low contact resistance of 62 Ω μm is reliably extracted in 10-nm ballistic InSe FETs, leading to a smaller intrinsic delay and much lower energy-delay product (EDP) than the predicted silicon limit.

Measuring Band Modulation of MoS2 with Ferroelectric Gates

Electronic properties of two-dimensional (2D) materials can be significantly tuned by an external electric field. Ferroelectric gates can provide a strong polarization electric field. Here, we report the measurements of the band structure of few-layer MoS₂ modulated by a ferroelectric P(VDF-TrFE) gate with contact-mode scanning tunneling spectroscopy. When P(VDF-TrFE) is fully polarized, an electric field up to ∼0.62 V/nm through the MoS₂ layers is inferred from the measured band edges, which affects the band structure significantly. First, strong band bending in the vertical direction signifies the Franz-Keldysh effect and a large extension of the optical absorption edge. Photons with energy of half the band gap are still absorbed with 20% of the absorption probability of photons at the band gap. Second, the electric field greatly enlarges the energy separations between the quantum-well subbands. Our study intuitively demonstrates the great potential of ferroelectric gates in band structure manipulation of 2D materials.

Dichalcogenide and Metal Oxide Semiconductor-Based Composite to Support Plasmonic Catalysis

Nanocomposites comprising plasmon active metal nanostructures and semiconductors have been used to control the charge states in the metal to support catalytic activity. In this context dichalcogenides when combined with metal oxides offer the potential to control charge states in plasmonic nanomaterials. Using a model plasmonic mediated oxidation reaction p-amino thiophenol ↔ p-nitrophenol, we show that through the introduction of transition metal dichalcogenide nanomaterial, reaction outcomes can be influenced, achieved through controlling the occurrence of the reaction intermediate dimercaptoazobenzene by opening new electron transfer routes in a semiconductor-plasmonic system. This study demonstrates the ability to control plasmonic reactions by carefully controlling the choice of semiconductors.

Atomistic Insight into the Epitaxial Growth Mechanism of Single-Crystal Two-Dimensional Transition-Metal Dichalcogenides on Au(111) Substrate

A mechanistic understanding of interactions between atomically thin two-dimensional (2D) transition-metal dichalcogenides (TMDs) and their growth substrates is important for achieving the unidirectional alignment of nuclei and seamless stitching of 2D TMD domains and thus 2D wafers. In this work, we conduct a cross-sectional scanning transmission electron microscopy (STEM) study to investigate the atomic-scale nucleation and early stage growth behaviors of chemical vapor deposited monolayer (ML-) MoS₂ and molecular beam epitaxy ML-MoSe₂ on a Au(111) substrate. Statistical analysis reveals the majority of as-grown domains, i.e., ∼88% for MoS₂ and 90% for MoSe₂, nucleate on surface terraces, with the rest (i.e., ∼12% for MoS₂ and 10% for MoSe₂) on surface steps. Moreover, within the latter case, step-associated nucleation, ∼64% of them are terminated with a Mo-zigzag edge in connection with the Au surface steps, with the rest (∼36%) being S-zigzag edges. In conjunction with ab initio density functional theory calculations, the results confirm that van der Waals epitaxy, rather than the surface step guided epitaxy, plays deterministic roles for the realization of unidirectional ML-MoS₂ (MoSe₂) domains on a Au(111) substrate. In contrast, surface steps, particularly their step height, are mainly responsible for the integrity and thickness of MoS₂/MoSe₂ films. In detail, it is found that the lateral growth of monolayer thick MoS₂/MoSe₂ domains only proceeds across mono-Au-atom high surface steps (∼2.4 Å), but fail for higher ones (bi-Au atom step and higher) during the growth. Our cross-sectional STEM study also confirms the existence of considerable compressive residual strain that reaches ∼3.0% for ML-MoS₂/MoSe₂ domains on Au(111). The present study aims to understand the growth mechanism of 2D TMD wafers.

Two dimensional semiconducting materials for ultimately scaled transistors

Two dimensional (2D) semiconductors have been established as promising candidates to break through the short channel effect that existed in Si metal-oxide-semiconductor field-effect-transistor (MOSFET), owing to their unique atomically layered structure and dangling-bond-free surface. The last decade has witnessed the significant progress in the size scaling of 2D transistors by various approaches, in which the physical gate length of the transistors has shrank from micrometer to sub-one nanometer with superior performance, illustrating their potential as a replacement technology for Si MOSFETs. Here, we review state-of-the-art techniques to achieve ultra-scaled 2D transistors with novel configurations through the scaling of channel, gate, and contact length. We provide comprehensive views of the merits and drawbacks of the ultra-scaled 2D transistors by summarizing the relevant fabrication processes with the corresponding critical parameters achieved. Finally, we identify the key opportunities and challenges for integrating ultra-scaled 2D transistors in the next-generation heterogeneous circuitry.

Statistical Assessment of High-Performance Scaled Double-Gate Transistors from Monolayer WS2

Scaling of monolayer transition metal dichalcogenide (TMD) field-effect transistors (FETs) is an important step toward evaluating the application space of TMD materials. Although some work on ultrashort channel monolayer (ML) TMD FETs has been published, there exist no comprehensive studies that assess their performance in a statistically relevant manner, providing critical insights into the impact of the device geometry. Part of the reason for the absence of such a study is the substantial variability of TMD devices when processes are not carefully controlled. In this work, we show a statistical study of ultrashort channel double-gated ML WS₂ FETs exhibiting excellent device performance and limited device-to-device variations. From a detailed analysis of cross-sectional scanning transmission electron microscopy (STEM) images and careful technology computer aided design (TCAD) simulations, we evaluated, in particular, an unexpected deterioration of the subthreshold characteristics for our shortest devices. Two potential candidates for the observed behavior were identified, i.e., buckling of the TMD on the substrate and loss of gate control due to the source geometry and the high-k dielectric between the metal gate and the metal source electrode.

Patterned Growth of Transition Metal Dichalcogenide Monolayers and Multilayers for Electronic and Optoelectronic Device Applications

A simple, large area, and cost-effective soft lithographic method is presented for the patterned growth of high-quality 2D transition metal dichalcogenides (TMDs). Initially, a liquid precursor (Na₂ MoO₄ in an aqueous solution) is patterned on the growth substrate using the micromolding in capillaries technique. Subsequently, a chemical vapor deposition step is employed to convert the precursor patterns to monolayer, few layers, or bulk TMDs, depending on the precursor concentration. The grown patterns are characterized using optical microscopy, atomic force microscopy, Raman spectroscopy, X-ray photoelectron spectroscopy, scanning electron microscopy, and photoluminescence spectroscopy to reveal their morphological, chemical, and optical characteristics. Additionally, electronic and optoelectronic devices are realized using the patterned TMDs and tested for their applicability in field effect transistors and photodetectors. The photodetectors made of MoS₂ line patterns show a very high responsivity of 7674 A W^-1 and external quantum efficiency of 1.49 × 10⁶ %. Furthermore, the multiple grain boundaries present in patterned TMDs enable the fabrication of memtransistor devices. The patterning technique presented here may be applied to many other TMDs and related heterostructures, potentially advancing the fabrication of TMDs-based device arrays.

Natural p-n Junctions at the MoS2 Flake Edges

Two-dimensional (2D) semiconductors are holding promises as channel materials for field-effect transistors. Compared to traditional three-dimensional (3D) semiconductors whose electronic and optical properties are hindered by dangling bonds and trap states at the surfaces, 2D materials with saturated chemical bonds on the surface maintain the excellent properties even when device thickness scales down to monolayer. However, dangling bonds are unavoidable at their edges, which are often overlooked and should have important effects on the devices. Here, we show that the edges of as-exfoliated and etched MoS₂ are naturally p-type doped and can form p-n junctions with the bulk of the flake. The width of these edge regions is around 20 nm. While their existence could present challenges for the shrinkage of devices, they can be exploited to form rectifying or optoelectronic devices based on a single flake of MoS₂ without the need of an elaborate extrinsic doping process.

Epitaxial Growth of SnS2 Ribbons on a Au-Sn Alloy Seed Film Surface

Two-dimensional metal chalcogenide film has attracted considerable interest for its use as an emerging device material for nanoelectronics. The film has been synthesized by various methods such as chemical vapor deposition, molecular beam epitaxy, and thermal vapor sulfurization. In this study, we took a new approach to synthesize tin disulfide (SnS₂) by using Au-Sn alloy film as a metal seed deposited on a sapphire substrate. Multilayer SnS₂ films were formed in a ribbon shape on (111)-oriented Au film and were aligned in the directions of threefold rotational symmetry. Furthermore, the SnS₂ was found to have an epitaxial relationship relative to the Au film and the sapphire substrate as follows: SnS₂[2̅110] || Au[101̅] || Al₂O₃[011̅0]. The segregation of grains consisting of a Sn-rich phase on the Au film surface and the subsequent sulfurization of these grains can be the key to the epitaxial SnS₂ ribbon formation.

Enhanced Catalytic Activity of a New Nanobiocatalytic System Formed by the Adsorption of Cytochrome c on Pluronic Triblock Copolymer Stabilized MoS2 Nanosheets

The formation of nanobiohybrids through the immobilization of enzymes on functional nanomaterials has opened up exciting research opportunities at the nanobiointerfaces. These systems hold great promise for a wide range of applications in biosensing, biocatalytic, and biomedical fields. Here, we report the formation of a hybrid nanobiocatalytic system through the adsorption of cytochrome c (Cyt c) on pluronic triblock copolymer, P123 (PEO-b-PPO-b-PEO), stabilized MoS2 nanosheets. The use of pluronic polymer has helped not only to greatly stabilize the exfoliated MoS2 nanosheets but also to allow easy adsorption of Cyt c on the nanosheets without major structural changes due to its excellent biocompatibility and soft protein-binding property. By comparing the catalytic activity of the Cyt c-MoS2 nanobiohybrid with that of the free Cyt c and as-prepared MoS2 nanosheets, we have demonstrated the active role of the nanobiointeractions in enhancing the catalytic activity of the hybrid. Slight structural perturbation at the active site of the Cyt c upon adsorption on MoS2 has primarily facilitated the peroxidase activity of the Cyt c. As the MoS2 nanosheets and the native Cyt c individually exhibit weaker intrinsic peroxidase activities, their mutual modulation at the nanobiointerface has made the Cyt c-MoS2 a novel nanobiocatalyst with superior activity.

Performance Limit of Ultrathin GaAs Transistors

High-electron-mobility group III-V compounds have been regarded as a promising successor to silicon in next-generation field-effect transistors (FETs). Gallium arsenide (GaAs) is an outstanding member of the III-V family due to its advantage of both good n- and p-type device performance. Monolayer (ML) GaAs is the limit form of ultrathin GaAs. Here, a hydrogenated ML GaAs (GaAsH2) FET is simulated by ab initio quantum-transport methods. The n- and p-type ML GaAsH2 metal-oxide-semiconductor FETs (MOSFETs) can well satisfy the on-state current, delay time, power dissipation, and energy-delay product requirements of the International Technology Roadmap for Semiconductors until the gate length is scaled down to 3/4 and 3/5 nm for the high-performance/low-power applications, respectively. Therefore, ultrathin GaAs is a prominent channel candidate for devices in the post-Moore era. The p-type ML GaAsH2 MOSFETs with a 2% uniaxially compressive strain and the unstrained n-type counterparts have symmetrical performance for the high-performance application, making ultrathin GaAs applicable for complementary MOS integrated circuits.

Quantum transport of short-gate MOSFETs based on monolayer MoSi2N4

The high carrier mobility, appropriate band gap and good environmental stability of two-dimensional (2D) MoSi₂N₄ enable it to be an appropriate channel material for transistors with excellent performance. Therefore, we predict the performance of double-gate (DG) metal-oxide-semiconductor field-effect transistors (MOSFETs) based on monolayer (ML) MoSi₂N₄ by ab initio quantum-transport calculations. The results show that the on-state current of the p-type device is remarkable when the gate length is greater than 4 nm, which can meet the high performance requirements of the International Technology Roadmap for Semiconductors (ITRS), 2013 version. Moreover, the gate length can be reduced to 3 nm when an underlap (UL) structure is employed in the MOSFET, and the sub-threshold swing, intrinsic delay time and power consumption also perform well. The calculation results reveal that ML MoSi₂N₄ will be a promising alternative for transistor channel materials in the post-silicon era.

Atomic Layer Deposition of Ultrathin La2O3/Al2O3 Nanolaminates on MoS2 with Ultraviolet Ozone Treatment

Due to the chemically inert surface of MoS2, uniform deposition of ultrathin high-κ dielectric using atomic layer deposition (ALD) is difficult. However, this is crucial for the fabrication of field-effect transistors (FETs). In this work, the atomic layer deposition growth of sub-5 nm La2O3/Al2O3 nanolaminates on MoS2 using different oxidants (H2O and O3) was investigated. To improve the deposition, the effects of ultraviolet ozone treatment on MoS2 surface are also evaluated. It is found that the physical properties and electrical characteristics of La2O3/Al2O3 nanolaminates change greatly for different oxidants and treatment processes. These changes are found to be associated with the residual of metal carbide caused by the insufficient interface reactions. Ultraviolet ozone pretreatment can substantially improve the initial growth of sub-5 nm H2O-based or O3-based La2O3/Al2O3 nanolaminates, resulting in a reduction of residual metal carbide. All results indicate that O3-based La2O3/Al2O3 nanolaminates on MoS2 with ultraviolet ozone treatment yielded good electrical performance with low leakage current and no leakage dot, revealing a straightforward approach for realizing sub-5 nm uniform La2O3/Al2O3 nanolaminates on MoS2.

Defects, band bending and ionization rings in MoS2

Chalcogen vacancies in transition metal dichalcogenides are widely acknowledged as both donor dopants and as a source of disorder. The electronic structure of sulphur vacancies in MoS₂however is still controversial, with discrepancies in the literature pertaining to the origin of the in-gap features observed via scanning tunneling spectroscopy (STS) on single sulphur vacancies. Here we use a combination of scanning tunnelling microscopy and STS to study embedded sulphur vacancies in bulk MoS₂crystals. We observe spectroscopic features dispersing in real space and in energy, which we interpret as tip position- and bias-dependent ionization of the sulphur vacancy donor due to tip induced band bending. The observations indicate that care must be taken in interpreting defect spectra as reflecting in-gap density of states, and may explain discrepancies in the literature.

Anisotropic Carrier Mobility from 2H WSe2

Transition metal dichalcogenides (TMDCs) with 2H phase are expected to be building blocks in next-generation electronics; however, they suffer from electrical anisotropy, which is the basics for multi-terminal artificial synaptic devices, digital inverters, and anisotropic memtransistors, which are highly desired in neuromorphic computing. Herein, the anisotropic carrier mobility from 2H WSe₂ is reported, where the anisotropic degree of carrier mobility spans from 0.16 to 0.95 for various WSe₂ field-effect transistors under a gate voltage of -60 V. Phonon scattering, impurity ions scattering, and defect scattering are excluded for anisotropic mobility. An intrinsic screening layer is proposed and confirmed by Z-contrast scanning transmission electron microscopy (STEM) imaging to respond to the electrical anisotropy. Seven types of intrinsic screening layers are created and calculated by density functional theory to evaluate the modulated electronic structures, effective masses, and scattering intensities, resulting in anisotropic mobility. The discovery of anisotropic carrier mobility from 2H WSe₂ provides a degree of freedom for adjusting the physical properties of 2H TMDCs and fertile ground for exploring and integrating TMDC electronic transistors with better performance along the direction of high mobility.

Monolayer WS2 Lateral Homosuperlattices with Two-dimensional Periodic Localized Photoluminescence

Homojunctions and homosuperlattices are essential structures and have been widely explored for use in advanced electronic and optoelectronic devices. However, artificially manipulating crystalline phases in two-dimensional (2D) monolayers is still challenging, especially when attempting to engineer lateral homogeneous junctions in a single monolayer of transition metal dichalcogenides (TMDs). Herein, we demonstrate a lateral homosuperlattice (MLHS) with alternating 1T and 2H domains in a 2D WS₂ monolayer plane. In MLHSs, the 2H domains, which are laterally localized and isolated by potential wells, manifest junction interfaces and irradiated photoluminescence (PL) with a lateral periodic distribution in the two-dimensional plane. The studies on MLHSs here can provide further understanding of lateral homojunctions and homosuperlattices in a monolayer plane, providing an alternative route to modulate optical and electronic behaviors in TMD monolayers.

Highly Sensitive NO2 Detection by TVS-Grown Multilayer MoS2 Films

Two-dimensional layered materials have been investigated for sensor applications over the last decade due to their very high specific surface area and excellent electrical characteristics. Although grain boundaries are inevitably present in polycrystalline-layered materials used for real applications, few studies have investigated their effects on sensing properties. In this study, we demonstrate the growth of two distinct MoS₂ films that differ in grain size by means of chemical vapor deposition (CVD) and thermal vapor sulfurization (TVS) methods. Transistor-based sensors are fabricated using these films, and their NO₂ sensing properties are evaluated. The adsorption behavior of NO₂ on MoS₂ is considered in terms of the Langmuir isotherm, and the experimental results can be well fitted by the equation. The CVD-grown film exhibits electrical properties 1-2 orders of magnitude superior to those of the TVS-grown one, which is attributed to the large grain size of the CVD-grown film. In contrast, the sensitivity to NO₂ is unexpectedly found to be higher in the TVS-grown film and is of the same order of a previously reported record value. Transmission electron microscopy observations suggest that the TVS-grown film consists of multiple rotationally oriented grains that are connected by mirror twin grain boundaries. Theoretical calculation results reveal that the adsorption of NO₂ on the grain boundary that we modeled is equal to that on the ideal basal plane surface of MoS₂. In addition, the porous structure in the TVS-grown film may also contribute to enhancing the sensor response to NO₂. This study suggests that a highly sensitive MoS₂ sensor can also be fabricated by using a polycrystalline film with small grain size, which can possibly be applied to other two-dimensional materials.

An all two-dimensional vertical heterostructure graphene/CuInP2S6/MoS2for negative capacitance field effect transistor

As scaling down the size of metal oxide semiconductor field-effect transistors (FETs), power dissipation has become a major challenge. Lowering down the sub-threshold swing (SS) is known as an effective technique to decrease the operating voltage of FETs and hence lower down the power consumption. However, the Boltzmann distribution of electrons (so-called 'Boltzmann tyranny') implements a physical limit to the SS value. Use of negative capacitance (NC) effect has enabled a new path to achieve a low SS below the Boltzmann limit (60 mV dec^-1at room temperature). In this work, we have demonstrated a NC-FET from an all two-dimensional (2D) metal ferroelectric semiconductor (MFS) vertical heterostructure: Graphene/CuInP₂S₆/MoS₂. The negative capacitance from the ferroelectric CuInP₂S₆has enabled the breaking of the 'Boltzmann tyranny'. The heterostructure based device has shown steep slopes switching below 60 mV dec^-1(lowest to < 10 mV dec^-1) over 3 orders of source-drain current, which provides an avenue for all 2D material based steep slope FETs.

2D material based field effect transistors and nanoelectromechanical systems for sensing applications

Sensors are ubiquitous in modern society because of their wide applications in healthcare, security, forensic industries as well as environmental protection. Specifically, sensors which can be microfabricated employing very-large-scale-integration (VLSI) compatible microfabrication techniques are particularly desirable. This is because they can provide several advantages: small size, low cost, and possibility of mass fabrication. 2D materials are a promising building block for such sensors. Their atomically thin nature, flat surfaces and ability to form van der Waals hetero junctions opens up the pathway for versatile functionalities. Here, we review 2D material-based field-effect-transistors (FETs) and nano-electro-mechanical systems (NEMs) for applications in detecting different gases, chemicals, and biomolecules. We will provide insights into the unique advantages of these materials for these sensing applications and discuss the fabrication methods, detection schemes and performance pertaining to these technologies. Finally, we will discuss the current challenges and prospects for this field.

Nickel particle-enabled width-controlled growth of bilayer molybdenum disulfide nanoribbons

Transition metal dichalcogenides exhibit a variety of electronic behaviors depending on the number of layers and width. Therefore, developing facile methods for their controllable synthesis is of central importance. We found that nickel nanoparticles promote both heterogeneous nucleation of the first layer of molybdenum disulfide and simultaneously catalyzes homoepitaxial tip growth of a second layer via a vapor-liquid-solid (VLS) mechanism, resulting in bilayer nanoribbons with width controlled by the nanoparticle diameter. Simulations further confirm the VLS growth mechanism toward nanoribbons and its orders of magnitude higher growth speed compared to the conventional noncatalytic growth of flakes. Width-dependent Coulomb blockade oscillation observed in the transfer characteristics of the nanoribbons at temperatures up to 60 K evidences the value of this proposed synthesis strategy for future nanoelectronics.

Two-Dimensional GeC2 with Tunable Electronic and Carrier Transport Properties and a High Current ON/OFF Ratio

In this study, we present that 2D tetrahex-GeC₂ materials possess novel electronic and carrier transport properties based on density functional theory computations combined with the nonequilibrium Green's function method. We show that under the 4% (-4%) in-plane expansion (compression) along the a-direction (b-direction) of the tetrahex-GeC₂ monolayer, the bandgap can be enlarged to a desirable 1.26 eV (1.32 eV), close to that of silicon. The carrier transport properties of both the sub-10 nm tetrahex-GeC₂ monolayer and the bilayer show strong anisotropy within the bias from -1 to 1 V. The current ON (a-direction)/OFF (b-direction) ratio amounts to 10⁵ for the tetrahex-GeC₂ monolayer. A striking negative differential conductance arises with the maximum I_peak/I_valley on the order of 10⁴ under the 4% uniaxial expansion along the b-direction of the tetrahex-GeC₂ monolayer. Overall, the 2D tetrahex-GeC₂ monolayer and bilayer possess highly tunable electronic and carrier transport properties under uniaxial strain, which can be exploited for potential applications in nanoelectronics.

Recent Progress on the Scanning Tunneling Microscopy and Spectroscopy Study of Semiconductor Heterojunctions

The band alignment, interface states, interface coupling, and carrier transport of semiconductor heterojunctions (SHs) need to be well understood for the design and fabrication of various important semiconductor structures and devices. Scanning tunneling microscopy (STM) with high spatial resolution and scanning tunneling spectroscopy (STS) with high energy resolution are significantly contributing to the understanding on the important properties of SHs. In this work, the recent progress on the use of STM and STS to study lateral, vertical and bulk SHs is reviewed. The spatial structures of SHs with atomically flat surface have been examined with STM. The electronic band structures (e. g., the band offset, interface state, and space charge region) of SHs are measured with STS. Combined with the spatial structures and the tunneling spectra features, the mechanism for the carrier transport in the SH may be proposed.

Molecular Dopant-Dependent Charge Transport in Surface-Charge-Transfer-Doped Tungsten Diselenide Field Effect Transistors

The controllability of carrier density and major carrier type of transition metal dichalcogenides(TMDCs) is critical for electronic and optoelectronic device applications. To utilize doping in TMDC devices, it is important to understand the role of dopants in charge transport properties of TMDCs. Here, the effects of molecular doping on the charge transport properties of tungsten diselenide (WSe₂ ) are investigated using three p-type molecular dopants, 2,3,5,6-tetrafluoro-7,7,8,8-tetracyanoquinodimethane (F₄ -TCNQ), tris(4-bromophenyl)ammoniumyl hexachloroantimonate (magic blue), and molybdenum tris(1,2-bis(trifluoromethyl)ethane-1,2-dithiolene) (Mo(tfd-COCF₃ )₃ ). The temperature-dependent transport measurements show that the dopant counterions on WSe₂ surface can induce Coulomb scattering in WSe₂ channel and the degree of scattering is significantly dependent on the dopant. Furthermore, the quantitative analysis revealed that the amount of charge transfer between WSe₂ and dopants is related to not only doping density, but also the contribution of each dopant ion toward Coulomb scattering. The first-principles density functional theory calculations show that the amount of charge transfer is mainly determined by intrinsic properties of the dopant molecules such as relative frontier orbital positions and their spin configurations. The authors' systematic investigation of the charge transport of doped TMDCs will be directly relevant for pursuing molecular routes for efficient and controllable doping in TMDC nanoelectronic devices.

Origin of phonon-limited mobility in two-dimensional metal dichalcogenides

Metal dichalcogenides are novel two-dimensional (2D) semiconductors after the discovery of graphene. In this article, phonon-limited mobility for six kinds of 2D semiconductors with the composition of MX₂is reviewed, in which M (Cr, Mo and W) is the transition metal, and X (S and Se) is the chalcogen element. The review is divided into three parts. In the first part, we briefly introduce the calculation method of mobility, including the empirical model and Boltzmann transport theory (BTE). The application scope, merits and limitations of these methods are summarized. In the second part, we explore empirical models to calculate the mobility of MX₂, including longitudinal acoustic phonon, optical phonon (OP) and polar optical phonon (POP) models. The contribution of multi-valley to mobility is reviewed in the calculation. The differences between static and high-frequency dielectric constants (Δϵ) are only 0.13 and 0.03 for MoS₂and WS₂. Such a low value indicates that the polarization hardly changes in the external field. So, their mobility is not determined by POP, but by deformation potential models. Different from GaAs, POP scattering plays a decisive role in its mobility. Our investigations also reveal that the scattering from POP cannot be ignored in CrSe₂, MoSe₂and WSe₂. In the third parts, we investigate the mobility of MX₂using electron-phonon coupling matrix element, which is based on BTE from the framework of a many-body quantum-field theory. Valence band splitting of MoS₂and WS₂is induced by spin-orbit coupling effect, which leads to the increase of hole mobility. In particular, we review in detail the theoretical and experimental results of MoS₂mobility in recent ten years, and its mobility is also compared with other materials to deepen the understanding.

Toward Optimal Heat Transfer of 2D-3D Heterostructures via van der Waals Binding Effects

Two-dimensional (2D) materials and their heterogeneous integration have enabled promising electronic and photonic applications. However, significant thermal challenges arise due to numerous van der Waals (vdW) interfaces limiting the dissipation of heat generated in the device. In this work, we investigate the vdW binding effect on heat transport through a MoS₂-amorphous silica heterostructure. We show using atomistic simulations that the cross-plane thermal conductance starts to saturate with the increase of vdW binding energy, which is attributed to substrate-induced localized phonons. With these atomistic insights, we perform device-level heat transfer optimizations. Accordingly, we identify a regime, characterized by the coupling of in-plane and cross-plane heat transport mediated by vdW binding energy, where maximal heat dissipation in the device is achieved. These results elucidate fundamental heat transport through the vdW heterostructure and provide a pathway toward optimizing thermal management in 2D nanoscale devices.

Load-dependent energy dissipation induced by the tip-membrane friction on suspended 2D materials

The tip-membrane interface plays a critical role in characterizing the mechanical properties of ultrathin 2D materials by commonly employed nanoindentation based on atomic force microscopy (AFM). However, the reliability of the assumption that the tip-membrane interface remains pinned during nanoindentation remains unclear, which may introduce unignorable uncertainty in evaluating their true mechanical properties. In this work, it is reported that load-dependent frictional behavior would occur on the tip-membrane interface during nanoindentation tests on monolayer and multilayer suspended WS₂ and graphene, and the curve hysteresis could be well explained by the stick-slip behavior. Further analyses and finite element simulations demonstrated that the frictional energy dissipation should be mainly attributed to the frictional behavior along the direction parallel to the cantilever beam. Meanwhile, the in-plane membrane stiffness was mainly responsible for the different frictional behavior on monolayer and multilayer 2D materials. Based on these analyses, some suggestions were proposed to help reduce the uncertainty when extracting the mechanical properties of 2D materials. These findings not only facilitate the deep understanding of the origin of the curve hysteresis during nanoindentation, but also help to evaluate the mechanical properties of 2D materials in a more reliable way.