Low-Power Perovskite Neuromorphic Synapse with Enhanced Photon Efficiency for Directional Motion Perception

The advancement of artificial intelligent vision systems heavily relies on the development of fast and accurate optical imaging detection, identification, and tracking. Framed by restricted response speeds and low computational efficiency, traditional optoelectronic information devices are facing challenges in real-time optical imaging tasks and their ability to efficiently process complex visual data. To address the limitations of current optoelectronic information devices, this study introduces a novel photomemristor utilizing halide perovskite thin films. The fabrication process involves adjusting the iodide proportion to enhance the quality of the halide perovskite films and minimize the dark current. The photomemristor exhibits a high external quantum efficiency of over 85%, which leads to a low energy consumption of 0.6 nJ. The spike timing-dependent plasticity characteristics of the device are leveraged to construct a spiking neural network and achieve a 99.1% accuracy rate of directional perception for moving objects. The notable results offer a promising hardware solution for efficient optoneuromorphic and edge computing applications.

Optimizing event-based neural networks on digital neuromorphic architecture: a comprehensive design space exploration

Neuromorphic processors promise low-latency and energy-efficient processing by adopting novel brain-inspired design methodologies. Yet, current neuromorphic solutions still struggle to rival conventional deep learning accelerators' performance and area efficiency in practical applications. Event-driven data-flow processing and near/in-memory computing are the two dominant design trends of neuromorphic processors. However, there remain challenges in reducing the overhead of event-driven processing and increasing the mapping efficiency of near/in-memory computing, which directly impacts the performance and area efficiency. In this work, we discuss these challenges and present our exploration of optimizing event-based neural network inference on SENECA, a scalable and flexible neuromorphic architecture. To address the overhead of event-driven processing, we perform comprehensive design space exploration and propose spike-grouping to reduce the total energy and latency. Furthermore, we introduce the event-driven depth-first convolution to increase area efficiency and latency in convolutional neural networks (CNNs) on the neuromorphic processor. We benchmarked our optimized solution on keyword spotting, sensor fusion, digit recognition and high resolution object detection tasks. Compared with other state-of-the-art large-scale neuromorphic processors, our proposed optimizations result in a 6× to 300× improvement in energy efficiency, a 3× to 15× improvement in latency, and a 3× to 100× improvement in area efficiency. Our optimizations for event-based neural networks can be potentially generalized to a wide range of event-based neuromorphic processors.

Programmable Threshold Logic Implementations in a Memristor Crossbar Array

In this study, we demonstrate the implementation of programmable threshold logics using a 32 × 32 memristor crossbar array. Thanks to forming-free characteristics obtained by the annealing process, its accurate programming characteristics are presented by a 256-level grayscale image. By simultaneous subtraction between weighted sum and threshold values with a differential pair in an opposite way, 3-input and 4-input Boolean logics are implemented in the crossbar without additional reference bias. Also, we verify a full-adder circuit and analyze its fidelity, depending on the device programming accuracy. Lastly, we successfully implement a 4-bit ripple carry adder in the crossbar and achieve reliable operations by read-based logic operations. Compared to stateful logic driven by device switching, a 4-bit ripple carry adder on a memristor crossbar array can perform more reliably in fewer steps thanks to its read-based parallel logic operation.

Proposition of Adaptive Read Bias: A Solution to Overcome Power and Scaling Limitations in Ferroelectric-Based Neuromorphic System

Hardware neuromorphic systems are crucial for the energy-efficient processing of massive amounts of data. Among various candidates, hafnium oxide ferroelectric tunnel junctions (FTJs) are highly promising for artificial synaptic devices. However, FTJs exhibit non-ideal characteristics that introduce variations in synaptic weights, presenting a considerable challenge in achieving high-performance neuromorphic systems. The primary objective of this study is to analyze the origin and impact of these variations in neuromorphic systems. The analysis reveals that the major bottleneck in achieving a high-performance neuromorphic system is the dynamic variation, primarily caused by the intrinsic 1/f noise of the device. As the device area is reduced and the read bias (VRead ) is lowered, the intrinsic noise of the FTJs increases, presenting an inherent limitation for implementing area- and power-efficient neuromorphic systems. To overcome this limitation, an adaptive read-biasing (ARB) scheme is proposed that applies a different VRead to each layer of the neuromorphic system. By exploiting the different noise sensitivities of each layer, the ARB method demonstrates significant power savings of 61.3% and a scaling effect of 91.9% compared with conventional biasing methods. These findings contribute significantly to the development of more accurate, efficient, and scalable neuromorphic systems.

Ion-Mediated Recombination Dynamics in Perovskite-Based Memory Light-Emitting Diodes for Neuromorphic Control Systems

Neuromorphic devices can help perform memory-heavy tasks more efficiently due to the co-localization of memory and computing. In biological systems, fast dynamics are necessary for rapid communication, while slow dynamics aid in the amplification of signals over noise and regulatory processes such as adaptation- such dual dynamics are key for neuromorphic control systems. Halide perovskites exhibit much more complex phenomena than conventional semiconductors due to their coupled ionic, electronic, and optical properties which result in modulatable drift, diffusion of ions, carriers, and radiative recombination dynamics. This is exploited to engineer a dual-emitter tandem device with the requisite dual slow-fast dynamics. Here, a perovskite-organic tandem light-emitting diode (LED) capable of modulating its emission spectrum and intensity owing to the ion-mediated recombination zone modulation between the green-emitting quasi-2D perovskite layer and the red-emitting organic layer is introduced. Frequency-dependent response and high dynamic range memory of emission intensity and spectra in a LED are demonstrated. Utilizing the emissive read-out, image contrast enhancement as a neuromorphic pre-processing step to improve pattern recognition capabilities is illustrated. As proof of concept using the device's slow-fast dynamics, an inhibition of the return mechanism is physically emulated.

Nanoscale Probing of Electrical Memory Effects in van der Waals Layered PdSe2

Tunable electronic materials that can be switched between different impedance states are fundamental to the hardware elements for neuromorphic computing architectures. This "brain-like" computing paradigm uses highly paralleled and colocated data processing, leading to greatly improved energy efficiency and performance compared to traditional architectures in which data have to be frequently transferred between processor and memory. In this work, we use scanning microwave impedance microscopy for nanoscale electrical and electronic characterization of two-dimensional layered semiconductor PdSe2 to probe neuromorphic properties. The local resolution of tens of nanometers reveals significant differences in electronic behavior between and within PdSe2 nanosheets (NSs). In particular, we detected both n-type and p-type behaviors, although previous reports only point to ambipolar n-type dominating characteristics. Nanoscale capacitance-voltage curves and subsequent calculation of characteristic maps revealed a hysteretic behavior originating from the creation and erasure of Se vacancies as well as the switching of defect charge states. In addition, stacks consisting of two NSs show enhanced resistive and capacitive switching, which is attributed to trapped charge carriers at the interfaces between the stacked NSs. Stacking n- and p-type NSs results in a combined behavior that allows one to tune electrical characteristics. As local inhomogeneities of electrical and electronic behavior can have a significant impact on the overall device performance, the demonstrated nanoscale characterization and analysis will be applicable to a wide range of semiconducting materials.

Neuron pruning in temporal domain for energy efficient SNN processor design

Recently, the accuracy of spike neural network (SNN) has been significantly improved by deploying convolutional neural networks (CNN) and their parameters to SNN. The deep convolutional SNNs, however, suffer from large amounts of computations, which is the major bottleneck for energy efficient SNN processor design. In this paper, we present an input-dependent computation reduction approach, where relatively unimportant neurons are identified and pruned without seriously sacrificing the accuracies. Specifically, a neuron pruning in temporal domain is proposed that prunes less important neurons and skips its future operations based on the layer-wise pruning thresholds of membrane voltages. To find the pruning thresholds, two pruning threshold search algorithms are presented that can efficiently trade-off accuracy and computational complexity with a given computation reduction ratio. The proposed neuron pruning scheme has been implemented using 65 nm CMOS process. The SNN processor achieves a 57% energy reduction and a 2.68× speed up, with up to 0.82% accuracy loss and 7.3% area overhead for CIFAR-10 dataset.

Graphene-In2Se3 van der Waals Heterojunction Neuristor for Optical In-Memory Bimodal Operation

Functional diversification at the single-device level has become essential for emerging optical neural network (ONN) development. Stable ferroelectricity harnessed with strong light sensitivity in α-In2Se3 holds great potential for developing ultrathin neuromorphic devices. Herein, we demonstrated an all-2D van der Waals heterostructure-based programmable synaptic field effect transistor (FET) utilizing a ferroelectric α-In2Se3 nanosheet and monolayer graphene. The devices exhibited reconfigurable, multilevel nonvolatile memory (NVM) states, which can be successively modulated by multiple dual-mode (optical and electrical) stimuli and thereby used to realize energy-efficient, heterosynaptic functionalities in a biorealistic fashion. Furthermore, under light illumination, the prototypical device can toggle between volatile (photodetector) and nonvolatile optical random-access memory (ORAM) logic operation, depending upon the ferroelectric-dipole induced band adjustment. Finally, plasticity modulation from short-term to prominent long-term characteristics over a wide dynamic range was demonstrated. The inherent operation mechanism owing to the switchable polarization-induced electronic band alignment and bidirectional barrier height modulation at the heterointerface was revealed by conjugated electronic transport and Kelvin-probe force microscopy (KPFM) measurements. Overall, robust (opto)electronic weight controllability for integrated in-sensor and in-memory logic processors and multibit ORAM systems was readily accomplished by the synergistic ferrophotonic heterostructure properties. Our presented results facilitate the technological implementation of versatile all-2D heterosynapses for next-generation perception, optoelectronic logic systems, and Internet-of-Things (IoT) entities.

Emulating learning behavior in a flexible device with self-formed Ag dewetted nanostructure as active element

Neuromorphic devices are a promising alternative to the traditional von Neumann architecture. These devices have the potential to achieve high-speed, efficient, and low-power artificial intelligence. Flexibility is required in these devices so that they can bend and flex without causing damage to the underlying electronics. This feature shows a possible use in applications that require flexible electronics, such as robotics and wearable electronics. Here, we report a flexible self-formed Ag-based neuromorphic device that emulates various brain-inspired synaptic activities, such as short-term plasticity and long-term potentiation (STP and LTP) in both the flat and bent states. Half and full-integer quantum conductance jumps were also observed in the flat and bent states. The device showed excellent switching and endurance behaviors. The classical conditioning could be emulated even in the bent state.

Magnetic field sensors using VO2/Fe3O4nanoparticle devices. Nanotechnology 2023;34. [PMID: 37506680 DOI: 10.1088/1361-6528/aceb6c] [Citation(s) in RCA: 0] [Impact Index Per Article: 0]

We combined the metal-insulator transition (MIT) properties of VO2and the magnetic properties of Fe3O4to realize a magnetometer with very large nonlinearity and switching characteristics. VO2, Fe3O4nanoparticles, and a conductive binder (silver paint) were mixed and drop-casted onto two-terminal gap junction devices. The device's current-voltage characteristics exhibited current-switching behavior related to MIT in VO2which changed with the external magnetic field. The magnetoresistance and magnetostriction in Fe3O4both contributed to the field sensitivity of the sensor. Sensitivities as high as 1 A nT-1(or 50.8 V T-1with a current bias) were observed near the MIT voltage. The resulting minimum detectable signal was 20 pT/SQRT(Hz).

Device-Algorithm Co-Optimization for an On-Chip Trainable Capacitor-Based Synaptic Device with IGZO TFT and Retention-Centric Tiki-Taka Algorithm

Analog in-memory computing synaptic devices are widely studied for efficient implementation of deep learning. However, synaptic devices based on resistive memory have difficulties implementing on-chip training due to the lack of means to control the amount of resistance change and large device variations. To overcome these shortcomings, silicon complementary metal-oxide semiconductor (Si-CMOS) and capacitor-based charge storage synapses are proposed, but it is difficult to obtain sufficient retention time due to Si-CMOS leakage currents, resulting in a deterioration of training accuracy. Here, a novel 6T1C synaptic device using only n-type indium gaIlium zinc oxide thin film transistor (IGZO TFT) with low leakage current and a capacitor is proposed, allowing not only linear and symmetric weight update but also sufficient retention time and parallel on-chip training operations. In addition, an efficient and realistic training algorithm to compensate for any remaining device non-idealities such as drifting references and long-term retention loss is proposed, demonstrating the importance of device-algorithm co-optimization.

Gradient-based feature-attribution explainability methods for spiking neural networks

Introduction

Spiking neural networks (SNNs) are a model of computation that mimics the behavior of biological neurons. SNNs process event data (spikes) and operate more sparsely than artificial neural networks (ANNs), resulting in ultra-low latency and small power consumption. This paper aims to adapt and evaluate gradient-based explainability methods for SNNs, which were originally developed for conventional ANNs.

Methods

The adapted methods aim to create input feature attribution maps for SNNs trained through backpropagation that process either event-based spiking data or real-valued data. The methods address the limitations of existing work on explainability methods for SNNs, such as poor scalability, limited to convolutional layers, requiring the training of another model, and providing maps of activation values instead of true attribution scores. The adapted methods are evaluated on classification tasks for both real-valued and spiking data, and the accuracy of the proposed methods is confirmed through perturbation experiments at the pixel and spike levels.

Results and discussion

The results reveal that gradient-based SNN attribution methods successfully identify highly contributing pixels and spikes with significantly less computation time than model-agnostic methods. Additionally, we observe that the chosen coding technique has a noticeable effect on the input features that will be most significant. These findings demonstrate the potential of gradient-based explainability methods for SNNs in improving our understanding of how these networks process information and contribute to the development of more efficient and accurate SNNs.

From Ferroelectric Material Optimization to Neuromorphic Devices

Due to the voltage driven switching at low voltages combined with nonvolatility of the achieved polarization state, ferroelectric materials have a unique potential for low power nonvolatile electronic devices. The competitivity of such devices is hindered by compatibility issues of well-known ferroelectrics with established semiconductor technology. The discovery of ferroelectricity in hafnium oxide changed this situation. The natural application of nonvolatile devices is as a memory cell. Nonvolatile memory devices also built the basis for other applications like in-memory or neuromorphic computing. Three different basic ferroelectric devices can be constructed: ferroelectric capacitors, ferroelectric field effect transistors and ferroelectric tunneling junctions. In this article first the material science of the ferroelectricity in hafnium oxide will be summarized with a special focus on tailoring the switching characteristics towards different applications.The current status of nonvolatile ferroelectric memories then lays the ground for looking into applications like in-memory computing. Finally, a special focus will be given to showcase how the basic building blocks of spiking neural networks, the neuron and the synapse, can be realized and how they can be combined to realize neuromorphic computing systems. A summary, comparison with other technologies like resistive switching devices and an outlook completes the paper.

Reinforcing Synaptic Plasticity of Defect-Tolerant States in Alloyed 2D Artificial Transistors

While two-dimensional (2D) materials possess the desirable future of neuromorphic computing platforms, unstable charging and de-trapping processes, which are inherited from uncontrollable states, such as the interface trap between nanocrystals and dielectric layers, can deteriorate the synaptic plasticity in field-effect transistors. Here, we report a facile and effective strategy to promote artificial synaptic devices by providing physical doping in 2D transition-metal dichalcogenide nanomaterials. Our experiments demonstrate that the introduction of niobium (Nb) into 2D WSe2 nanomaterials produces charge trap levels in the band gap and retards the decay of the trapped charges, thereby accelerating the artificial synaptic plasticity by encouraging improved short-/long-term plasticity, increased multilevel states, lower power consumption, and better symmetry and asymmetry ratios. Density functional theory calculations also proved that the addition of Nb to 2D WSe2 generates defect tolerance levels, thereby governing the charging and de-trapping mechanisms of the synaptic devices. Physically doped electronic synapses are expected to be a promising strategy for the development of bioinspired artificial electronic devices.

A Compact and Low-Power SoC Design for Spiking Neural Network Based on Current Multiplier Charge Injector Synapse

This paper presents a compact analog system-on-chip (SoC) implementation of a spiking neural network (SNN) for low-power Internet of Things (IoT) applications. The low-power implementation of an SNN SoC requires the optimization of not only the SNN model but also the architecture and circuit designs. In this work, the SNN has been constituted from the analog neuron and synaptic circuits, which are designed to optimize both the chip area and power consumption. The proposed synapse circuit is based on a current multiplier charge injector (CMCI) circuit, which can significantly reduce power consumption and chip area compared with the previous work while allowing for design scalability for higher resolutions. The proposed neuron circuit employs an asynchronous structure, which makes it highly sensitive to input synaptic currents and enables it to achieve higher energy efficiency. To compare the performance of the proposed SoC in its area and power consumption, we implemented a digital SoC for the same SNN model in FPGA. The proposed SNN chip, when trained using the MNIST dataset, achieves a classification accuracy of 96.56%. The presented SNN chip has been implemented using a 65 nm CMOS process for fabrication. The entire chip occupies 0.96 mm2 and consumes an average power of 530 μW, which is 200 times lower than its digital counterpart.

Exploiting semantic information in a spiking neural SLAM system

To navigate in new environments, an animal must be able to keep track of its position while simultaneously creating and updating an internal map of features in the environment, a problem formulated as simultaneous localization and mapping (SLAM) in the field of robotics. This requires integrating information from different domains, including self-motion cues, sensory, and semantic information. Several specialized neuron classes have been identified in the mammalian brain as being involved in solving SLAM. While biology has inspired a whole class of SLAM algorithms, the use of semantic information has not been explored in such work. We present a novel, biologically plausible SLAM model called SSP-SLAM-a spiking neural network designed using tools for large scale cognitive modeling. Our model uses a vector representation of continuous spatial maps, which can be encoded via spiking neural activity and bound with other features (continuous and discrete) to create compressed structures containing semantic information from multiple domains (e.g., spatial, temporal, visual, conceptual). We demonstrate that the dynamics of these representations can be implemented with a hybrid oscillatory-interference and continuous attractor network of head direction cells. The estimated self-position from this network is used to learn an associative memory between semantically encoded landmarks and their positions, i.e., an environment map, which is used for loop closure. Our experiments demonstrate that environment maps can be learned accurately and their use greatly improves self-position estimation. Furthermore, grid cells, place cells, and object vector cells are observed by this model. We also run our path integrator network on the NengoLoihi neuromorphic emulator to demonstrate feasibility for a full neuromorphic implementation for energy efficient SLAM.

Spin-Controlled Helical Quantum Sieve Chiral Spectrometer

This article reports on a molecular-spin-sensitive-antenna (MSSA) that is based on stacked layers of organically functionalized graphene on a fibrous helical cellulose network for carrying out spatiotemporal identification of chiral enantiomers. The MSSA structures combine three complementary features: (i) chiral separation via a helical quantum sieve for chiral trapping, (ii) chiral recognition by a synthetically implanted spin-sensitive center in a graphitic lattice; and (iii) chiral selectivity by a chirality-induced-spin mechanism that polarizes the local electronic band-structure in graphene through chiral-activated Rashba spin-orbit interaction field. Combining the MSSA structures with decision-making principles based on neuromorphic artificial intelligence shows fast, portable, and wearable spectrometry for the detection and classification of pure and a mixture of chiral molecules, such as butanol (S and R), limonene (S and R), and xylene isomers, with 95-98% accuracy. These results can have a broad impact where the MSSA approach is central as a precautionary risk assessment against potential hazards impacting human health and the environment due to chiral molecules; furthermore, it acts as a dynamic monitoring tool of all parts of the chiral molecule life cycles.

NET-TEN: a silicon neuromorphic network for low-latency detection of seizures in local field potentials

Objective. Therapeutic intervention in neurological disorders still relies heavily on pharmacological solutions, while the treatment of patients with drug resistance remains an unresolved issue. This is particularly true for patients with epilepsy, 30% of whom are refractory to medications. Implantable devices for chronic recording and electrical modulation of brain activity have proved a viable alternative in such cases. To operate, the device should detect the relevant electrographic biomarkers from local field potentials (LFPs) and determine the right time for stimulation. To enable timely interventions, the ideal device should attain biomarker detection with low latency while operating under low power consumption to prolong battery life.Approach. Here we introduce a fully-analog neuromorphic device implemented in CMOS technology for analyzing LFP signals in anin vitromodel of acute ictogenesis. Neuromorphic networks have progressively gained a reputation as low-latency low-power computing systems, which makes them a promising candidate as processing core of next-generation implantable neural interfaces.Main results. The developed system can detect ictal and interictal events with ms-latency and with high precision, consuming on average 3.50 nW during the task.Significance. The work presented in this paper paves the way to a new generation of brain implantable devices for personalized closed-loop stimulation for epilepsy treatment.

Neuromorphic-P2M: processing-in-pixel-in-memory paradigm for neuromorphic image sensors

Edge devices equipped with computer vision must deal with vast amounts of sensory data with limited computing resources. Hence, researchers have been exploring different energy-efficient solutions such as near-sensor, in-sensor, and in-pixel processing, bringing the computation closer to the sensor. In particular, in-pixel processing embeds the computation capabilities inside the pixel array and achieves high energy efficiency by generating low-level features instead of the raw data stream from CMOS image sensors. Many different in-pixel processing techniques and approaches have been demonstrated on conventional frame-based CMOS imagers; however, the processing-in-pixel approach for neuromorphic vision sensors has not been explored so far. In this work, for the first time, we propose an asynchronous non-von-Neumann analog processing-in-pixel paradigm to perform convolution operations by integrating in-situ multi-bit multi-channel convolution inside the pixel array performing analog multiply and accumulate (MAC) operations that consume significantly less energy than their digital MAC alternative. To make this approach viable, we incorporate the circuit's non-ideality, leakage, and process variations into a novel hardware-algorithm co-design framework that leverages extensive HSpice simulations of our proposed circuit using the GF22nm FD-SOI technology node. We verified our framework on state-of-the-art neuromorphic vision sensor datasets and show that our solution consumes ~2× lower backend-processor energy while maintaining almost similar front-end (sensor) energy on the IBM DVS128-Gesture dataset than the state-of-the-art while maintaining a high test accuracy of 88.36%.

Dynamic Stabilization of Metastable States in Triple-Well Ferroelectric Sn2 P2 S6

Polarization dynamics in ferroelectric materials is governed by the effective potential energy landscape of the order parameter. The unique aspect of ferroelectrics compared to many other transitions is the possibility of more than two potential wells, leading to complicated energy landscapes with new fundamental and functional properties. Here, direct dynamic evidence is revealed of a triple-well potential in the metal thiophosphate Sn₂ P₂ S₆ compound using multivariate scanning probe microscopy combined with theoretical simulations. The key finding is that the metastable zero polarization state can be accessed through a gradual switching process and is stabilized over a broad range of electric fields. Simulations confirm that the observed zero polarization state originates from a kinetic stabilization of the nonpolar state of the triple-well, as opposed to domain walls. Dynamically, the triple-well of Sn₂ P₂ S₆ becomes equivalent to antiferroelectric hysteresis loops. Therefore, this material combines the robust and well-defined domain structure of a proper ferroelectric with dynamic hysteresis loops present in antiferroelectrics. Moreover, the triple-well enhances mem-capacitive effects in Sn₂ P₂ S₆ , which are forbidden for ideal double-well ferroelectrics. These findings provide a path to tunable electronic elements for beyond binary high-density computing devices and neuromorphic circuits based on dynamic properties of the triple-well.

High-Performance Artificial Synapse Based on CVD-Grown WSe2 Flakes with Intrinsic Defects

High-performance artificial synaptic devices with rich functions are highly desired for the development of an advanced brain-like neuromorphic system. Here, we prepare synaptic devices based on a CVD-grown WSe₂ flake, which has an unusual morphology of nested triangles. The WSe₂ transistor exhibits robust synaptic behaviors such as excitatory postsynaptic current, paired-pulse facilitation, short-time plasticity, and long-time plasticity. Furthermore, due to its high sensitivity to light illumination, the WSe₂ transistor exhibits excellent light-dosage-dependent and light wavelength-dependent plasticity, which endow the synaptic device with more intelligent learning and memory functions. In addition, WSe₂ optoelectronic synapses can mimic "learning experience" behavior and associative learning behavior like the brain. An artificial neural network is simulated for pattern recognition of hand-written digital images in the MNIST data set and the best recognition accuracy could reach 92.9% based on weight updating training of our WSe₂ device. Detailed surface potential analysis and PL characterization reveal that the intrinsic defects generated in growth are dominantly responsible for the controllable synaptic plasticity. Our work suggests that the CVD-grown WSe₂ flake with intrinsic defects capable of robust trapping/de-trapping charges holds great application prospects in future high-performance neuromorphic computation.

Cycling Waveform Dependent Wake-Up and ON/OFF Ratio in Al2O3/Hf0.5Zr0.5O2 Ferroelectric Tunnel Junction Devices

The wake-up behavior and ON/OFF current ratio of TiN-Al₂O₃-Hf_0.5Zr_0.5O₂-W ferroelectric tunnel junction (FTJ) devices were investigated for different wake-up voltage waveforms. We studied triangular and square waves, as well as square pulse trains of equal or unequal voltage amplitudes for positive and negative polarities. We find that the wake-up behavior in these FTJ stacks is highly influenced by the field cycling waveform. A square waveform is observed to provide wake-up with the lowest number of cycles, concomitantly resulting in higher remnant polarization and a higher ON/OFF ratio in the devices, compared to a triangular waveform. We further show that wake-up is dependent on the number of cycles rather than the total time of the applied electric field during cycling. We also demonstrate that different voltage magnitudes are necessary for positive and negative polarities during field cycling for efficient wake-up. Utilizing an optimized waveform with unequal magnitudes for the two polarities during field cycling, we achieve a reduction in wake-up cycles and a large enhancement of the ON/OFF ratio from ∼5 to ∼35 in our ferroelectric tunnel junctions.

Metal doped polyaniline as neuromorphic circuit elements for in-materia computing

Polyaniline-based atomic switches are material building blocks whose nanoscale structure and resultant neuromorphic character provide a new physical substrate for the development next-generation, nanoarchitectonic-enabled computing systems. Metal ion-doped devices consisting of a Ag/metal ion doped polyaniline/Pt sandwich structure were fabricated using an in situ wet process. The devices exhibited repeatable resistive switching between high (ON) and low (OFF) conductance states in both Ag⁺ and Cu²⁺ ion-doped devices. The threshold voltage for switching was>0.8 V and average ON/OFF conductance ratios (30 cycles for 3 samples) were 13 and 16 for Ag⁺ and Cu²⁺ devices, respectively. The ON state duration was determined by the decay to an OFF state after pulsed voltages of differing amplitude and frequency. The switching behaviour is analagous to short-term (STM) and long-term (LTM) memories of biological synapses. Memristive behaviour and evidence of quantized conductance were also observed and interpreted in terms of metal filament formation bridging the metal doped polymer layer. The successful realization of these properties within physical material systems indicate polyaniline frameworks as suitable neuromorphic substrates for in materia computing.

Organic Bioelectronics Development in Italy: A Review

In recent years, studies concerning Organic Bioelectronics have had a constant growth due to the interest in disciplines such as medicine, biology and food safety in connecting the digital world with the biological one. Specific interests can be found in organic neuromorphic devices and organic transistor sensors, which are rapidly growing due to their low cost, high sensitivity and biocompatibility. This trend is evident in the literature produced in Italy, which is full of breakthrough papers concerning organic transistors-based sensors and organic neuromorphic devices. Therefore, this review focuses on analyzing the Italian production in this field, its trend and possible future evolutions.

Artificial Multisensory Neuron with a Single Transistor for Multimodal Perception through Hybrid Visual and Thermal Sensing

An artificial multisensory device applicable to in-sensor computing is demonstrated with a single-transistor neuron (1T-neuron) for multimodal perception. It simultaneously receives two sensing signals from visual and thermal stimuli. The 1T-neuron transforms these signals into electrical signals in the form of spiking and then fires them for a spiking neural network at the same time. This feature makes it feasible to realize input neurons for multimodal sensing. Visual and thermal sensing is achieved due to the inherent optical and thermal behaviors of the 1T-neuron. To demonstrate a neuromorphic multimodal sensing system with the artificial multisensory 1T-neuron, fingerprint recognition, widely used for biometric security, is implemented. Owing to the simultaneous sensing of heat as well as light, the proposed fingerprint recognition system composed of multisensory 1T-neurons not only identifies a genuine pattern but also judges whether or not it is forged.

On-device synaptic memory consolidation using Fowler-Nordheim quantum-tunneling

Introduction

For artificial synapses whose strengths are assumed to be bounded and can only be updated with finite precision, achieving optimal memory consolidation using primitives from classical physics leads to synaptic models that are too complex to be scaled in-silico. Here we report that a relatively simple differential device that operates using the physics of Fowler-Nordheim (FN) quantum-mechanical tunneling can achieve tunable memory consolidation characteristics with different plasticity-stability trade-offs.

Methods

A prototype FN-synapse array was fabricated in a standard silicon process and was used to verify the optimal memory consolidation characteristics and used for estimating the parameters of an FN-synapse analytical model. The analytical model was then used for large-scale memory consolidation and continual learning experiments.

Results

We show that compared to other physical implementations of synapses for memory consolidation, the operation of the FN-synapse is near-optimal in terms of the synaptic lifetime and the consolidation properties. We also demonstrate that a network comprising FN-synapses outperforms a comparable elastic weight consolidation (EWC) network for some benchmark continual learning tasks.

Discussions

With an energy footprint of femtojoules per synaptic update, we believe that the proposed FN-synapse provides an ultra-energy-efficient approach for implementing both synaptic memory consolidation and continual learning on a physical device.

Dynamical memristive neural networks and associative self-learning architectures using biomimetic devices

While there is an abundance of research on neural networks that are "inspired" by the brain, few mimic the critical temporal compute features that allow the brain to efficiently perform complex computations. Even fewer methods emulate the heterogeneity of learning produced by biological neurons. Memory devices, such as memristors, are also investigated for their potential to implement neuronal functions in electronic hardware. However, memristors in computing architectures typically operate as non-volatile memories, either as storage or as the weights in a multiply-and-accumulate function that requires direct access to manipulate memristance via a costly learning algorithm. Hence, the integration of memristors into architectures as time-dependent computational units is studied, starting with the development of a compact and versatile mathematical model that is capable of emulating flux-linkage controlled analog (FLCA) memristors and their unique temporal characteristics. The proposed model, which is validated against experimental FLCA Li_xNbO₂ intercalation devices, is used to create memristive circuits that mimic neuronal behavior such as desensitization, paired-pulse facilitation, and spike-timing-dependent plasticity. The model is used to demonstrate building blocks of biomimetic learning via dynamical memristive circuits that implement biomimetic learning rules in a self-training neural network, with dynamical memristive weights that are capable of associative lifelong learning. Successful training of the dynamical memristive neural network to perform image classification of handwritten digits is shown, including lifelong learning by having the dynamical memristive network relearn different characters in succession. An analog computing architecture that learns to associate input-to-input correlations is also introduced, with examples demonstrating image classification and pattern recognition without convolution. The biomimetic functions shown in this paper result from fully ion-driven memristive circuits devoid of integrating capacitors and thus are instructive for exploiting the immense potential of memristive technology for neuromorphic computation in hardware and allowing a common architecture to be applied to a wide range of learning rules, including STDP, magnitude, frequency, and pulse shape among others, to enable an inorganic implementation of the complex heterogeneity of biological neural systems.

Retention Secured Nonlinear and Self-Rectifying Analog Charge Trap Memristor for Energy-Efficient Neuromorphic Hardware

A memristive crossbar array (MCA) is an ideal platform for emerging memory and neuromorphic hardware due to its high bitwise density capability. A charge trap memristor (CTM) is an attractive candidate for the memristor cell of the MCA, because the embodied rectifying characteristic frees it from the sneak current issue. Although the potential of the CTM devices has been suggested, their practical viability needs to be further proved. Here, a Pt/Ta₂ O₅ /Nb₂ O_{5- x} /Al₂ O_{3- y} /Ti CTM stack exhibiting high retention and array-level uniformity is proposed, allowing a highly reliable selector-less MCA. It shows high self-rectifying and nonlinear current-voltage characteristics below 1 µA of programming current with a continuous analog switching behavior. Also, its retention is longer than 10⁵ s at 150 °C, suggesting the device is highly stable for non-volatile analog applications. A plausible band diagram model is proposed based on the electronic spectroscopy results and conduction mechanism analysis. The self-rectifying and nonlinear characteristics allow reducing the on-chip training energy consumption by 71% for the MNIST dataset training task with an optimized programming scheme.

BitBrain and Sparse Binary Coincidence (SBC) memories: Fast, robust learning and inference for neuromorphic architectures

We present an innovative working mechanism (the SBC memory) and surrounding infrastructure (BitBrain) based upon a novel synthesis of ideas from sparse coding, computational neuroscience and information theory that enables fast and adaptive learning and accurate, robust inference. The mechanism is designed to be implemented efficiently on current and future neuromorphic devices as well as on more conventional CPU and memory architectures. An example implementation on the SpiNNaker neuromorphic platform has been developed and initial results are presented. The SBC memory stores coincidences between features detected in class examples in a training set, and infers the class of a previously unseen test example by identifying the class with which it shares the highest number of feature coincidences. A number of SBC memories may be combined in a BitBrain to increase the diversity of the contributing feature coincidences. The resulting inference mechanism is shown to have excellent classification performance on benchmarks such as MNIST and EMNIST, achieving classification accuracy with single-pass learning approaching that of state-of-the-art deep networks with much larger tuneable parameter spaces and much higher training costs. It can also be made very robust to noise. BitBrain is designed to be very efficient in training and inference on both conventional and neuromorphic architectures. It provides a unique combination of single-pass, single-shot and continuous supervised learning; following a very simple unsupervised phase. Accurate classification inference that is very robust against imperfect inputs has been demonstrated. These contributions make it uniquely well-suited for edge and IoT applications.

Bioinspired and Low-Power 2D Machine Vision with Adaptive Machine Learning and Forgetting

Natural intelligence has many dimensions, with some of its most important manifestations being tied to learning about the environment and making behavioral changes. In primates, vision plays a critical role in learning. The underlying biological neural networks contain specialized neurons and synapses which not only sense and process visual stimuli but also learn and adapt with remarkable energy efficiency. Forgetting also plays an active role in learning. Mimicking the adaptive neurobiological mechanisms for seeing, learning, and forgetting can, therefore, accelerate the development of artificial intelligence (AI) and bridge the massive energy gap that exists between AI and biological intelligence. Here, we demonstrate a bioinspired machine vision system based on a 2D phototransistor array fabricated from large-area monolayer molybdenum disulfide (MoS₂) and integrated with an analog, nonvolatile, and programmable memory gate-stack; this architecture not only enables dynamic learning and relearning from visual stimuli but also offers learning adaptability under noisy illumination conditions at miniscule energy expenditure. In short, our demonstrated "all-in-one" hardware vision platform combines "sensing", "computing", and "storage" to not only overcome the von Neumann bottleneck of conventional complementary metal-oxide-semiconductor (CMOS) technology but also to eliminate the need for peripheral circuits and sensors.

Enhanced Short-Term Memory Plasticity of WOx-Based Memristors by Inserting AlOx Thin Layer

ITO/WO_x/TaN and ITO/WO_x/AlO_x/TaN memory cells were fabricated as a neuromorphic device that is compatible with CMOS. They are suitable for the information age, which requires a large amount of data as next-generation memory. The device with a thin AlO_x layer deposited by atomic layer deposition (ALD) has different electrical characteristics from the device without an AlO_x layer. The low current is achieved by inserting an ultra-thin AlO_x layer between the switching layer and the bottom electrode due to the tunneling barrier effect. Moreover, the short-term memory characteristics in bilayer devices are enhanced. The WO_x/AlO_x device returns to the HRS without a separate reset process or energy consumption. The amount of gradual current reduction could be controlled by interval time. In addition, it is possible to maintain LRS for a longer time by forming it to implement long-term memory.

Evidence for long-term potentiation in phospholipid membranes

Biological supramolecular assemblies, such as phospholipid bilayer membranes, have been used to demonstrate signal processing via short-term synaptic plasticity (STP) in the form of paired pulse facilitation and depression, emulating the brain's efficiency and flexible cognitive capabilities. However, STP memory in lipid bilayers is volatile and cannot be stored or accessed over relevant periods of time, a key requirement for learning. Using droplet interface bilayers (DIBs) composed of lipids, water and hexadecane, and an electrical stimulation training protocol featuring repetitive sinusoidal voltage cycling, we show that DIBs displaying memcapacitive properties can also exhibit persistent synaptic plasticity in the form of long-term potentiation (LTP) associated with capacitive energy storage in the phospholipid bilayer. The time scales for the physical changes associated with the LTP range between minutes and hours, and are substantially longer than previous STP studies, where stored energy dissipated after only a few seconds. STP behavior is the result of reversible changes in bilayer area and thickness. On the other hand, LTP is the result of additional molecular and structural changes to the zwitterionic lipid headgroups and the dielectric properties of the lipid bilayer that result from the buildup of an increasingly asymmetric charge distribution at the bilayer interfaces.

Field-programmable encoding for address-event representation

In conventional frame-based image sensors, every pixel records brightness information and sends this information to a receiver serially in a scanning fashion. This full-frame readout approach suffers from high bandwidth requirements and increased power consumption with the increasing size of the pixel array. Event-based image sensors are gaining popularity for reducing the bandwidth and power requirements by sending only meaningful data in an event-driven approach with the help of address-event representation (AER) communication protocol. However, the event-based readout suffers from increased latency and timing error when the number of pixels with an event increase. In this paper, we introduce a new field-programmable AER (FP-AER) encoding scheme which offers benefits of both frame-based and event-based approaches. The readout design can be configured "in the field" using configuration bits. We also compare the performance of the proposed design against existing AER-based approaches for imaging applications and show that FP-AER performs best in both scanning and event-based readout.

Spiking Neural Networks for Structural Health Monitoring

This paper presents the first implementation of a spiking neural network (SNN) for the extraction of cepstral coefficients in structural health monitoring (SHM) applications and demonstrates the possibilities of neuromorphic computing in this field. In this regard, we show that spiking neural networks can be effectively used to extract cepstral coefficients as features of vibration signals of structures in their operational conditions. We demonstrate that the neural cepstral coefficients extracted by the network can be successfully used for anomaly detection. To address the power efficiency of sensor nodes, related to both processing and transmission, affecting the applicability of the proposed approach, we implement the algorithm on specialised neuromorphic hardware (Intel ® Loihi architecture) and benchmark the results using numerical and experimental data of degradation in the form of stiffness change of a single degree of freedom system excited by Gaussian white noise. The work is expected to open a new direction of SHM applications towards non-Von Neumann computing through a neuromorphic approach.

Neuromorphic-Based Neuroprostheses for Brain Rewiring: State-of-the-Art and Perspectives in Neuroengineering

Neuroprostheses are neuroengineering devices that have an interface with the nervous system and supplement or substitute functionality in people with disabilities. In the collective imagination, neuroprostheses are mostly used to restore sensory or motor capabilities, but in recent years, new devices directly acting at the brain level have been proposed. In order to design the next-generation of neuroprosthetic devices for brain repair, we foresee the increasing exploitation of closed-loop systems enabled with neuromorphic elements due to their intrinsic energy efficiency, their capability to perform real-time data processing, and of mimicking neurobiological computation for an improved synergy between the technological and biological counterparts. In this manuscript, after providing definitions of key concepts, we reviewed the first exploitation of a real-time hardware neuromorphic prosthesis to restore the bidirectional communication between two neuronal populations in vitro. Starting from that 'case-study', we provide perspectives on the technological improvements for real-time interfacing and processing of neural signals and their potential usage for novel in vitro and in vivo experimental designs. The development of innovative neuroprosthetics for translational purposes is also presented and discussed. In our understanding, the pursuit of neuromorphic-based closed-loop neuroprostheses may spur the development of novel powerful technologies, such as 'brain-prostheses', capable of rewiring and/or substituting the injured nervous system.

Neuromorphic Tactile Edge Orientation Classification in an Unsupervised Spiking Neural Network

Dexterous manipulation in robotic hands relies on an accurate sense of artificial touch. Here we investigate neuromorphic tactile sensation with an event-based optical tactile sensor combined with spiking neural networks for edge orientation detection. The sensor incorporates an event-based vision system (mini-eDVS) into a low-form factor artificial fingertip (the NeuroTac). The processing of tactile information is performed through a Spiking Neural Network with unsupervised Spike-Timing-Dependent Plasticity (STDP) learning, and the resultant output is classified with a 3-nearest neighbours classifier. Edge orientations were classified in 10-degree increments while tapping vertically downward and sliding horizontally across the edge. In both cases, we demonstrate that the sensor is able to reliably detect edge orientation, and could lead to accurate, bio-inspired, tactile processing in robotics and prosthetics applications.

An Optimization on the Neuronal Networks Based on the ADEX Biological Model in Terms of LUT-State Behaviors: Digital Design and Realization on FPGA Platforms

Design and implementation of biological neural networks is a vital research field in the neuromorphic engineering. This paper presents LUT-based modeling of the Adaptive Exponential integrate-and-fire (ADEX) model using Nyquist frequency method. In this approach, a continuous term is converted to a discrete term by sampling factor. This new modeling is called N-LUT-ADEX (Nyquist-Look Up Table-ADEX) and is based on accurate sampling of the original ADEX model. Since in this modeling, the high-accuracy matching is achieved, it can exactly reproduce the spiking patterns, which have the same behaviors of the original neuron model. To confirm the N-LUT-ADEX neuron, the proposed model is realized on Virtex-II Field-Programmable Gate Array (FPGA) board for validating the final hardware. Hardware implementation results show the high degree of similarity between the proposed and original models. Furthermore, low-cost and high-speed attributes of our proposed neuron model will be validated. Indeed, the proposed model is capable of reproducing the spiking patterns in terms of low overhead costs and higher frequencies in comparison with the original one. The properties of the proposed model cause can make it a suitable choice for neuromorphic network implementations with reduced-cost attributes.

A Bioinspired Artificial Gustatory Neuron for a Neuromorphic Based Electronic Tongue

A novel biomimicked neuromorphic sensor for an energy efficient and highly scalable electronic tongue (E-tongue) is demonstrated with a metal-oxide-semiconductor field-effect transistor (MOSFET). By mimicking a biological gustatory neuron, the proposed E-tongue can simultaneously detect ion concentrations of chemicals on an extended gate and encode spike signals on the MOSFET, which acts as an input neuron in a spiking neural network (SNN). Such in-sensor neuromorphic functioning can reduce the energy and area consumption of the conventional E-tongue hardware. pH-sensitive and sodium-sensitive artificial gustatory neurons are implemented by using two different sensing materials: Al₂O₃ for pH sensing and sodium ionophore X for sodium ion sensing. In addition, a sensitivity control function inspired by the biological sensory neuron is demonstrated. After the unit device characterization of the artificial gustatory neuron, a fully hardware-based E-tongue that can classify two distinct liquids is demonstrated to show a practical application of the artificial gustatory neurons.

Optical and optoelectronic neuromorphic devices based on emerging memory technologies

As artificial intelligence continues its rapid development, inevitable challenges arise for the mainstream computing hardware to process voluminous data (Big data). The conventional computer system based on von Neumann architecture with separated processor unit and memory is approaching the limit of computational speed and energy efficiency. Thus, novel computing architectures such as in-memory computing and neuromorphic computing based on emerging memory technologies have been proposed. In recent years, light is incorporated into computational devices, beyond the data transmission in traditional optical communications, due to its innate superiority in speed, bandwidth, energy efficiency, etc. Thereinto, photo-assisted and photoelectrical synapses are developed for neuromorphic computing. Additionally, both the storage and readout processes can be implemented in optical domain in some emerging photonic devices to leverage unique properties of photonics. In this review, we introduce typical photonic neuromorphic devices rooted from emerging memory technologies together with corresponding operational mechanisms. In the end, the advantages and limitations of these devices originated from different modulation means are listed and discussed.

Artificial neuromorphic cognitive skins based on distributed biaxially stretchable elastomeric synaptic transistors

SignificanceEnabling distributed neurologic and cognitive functions in soft deformable devices, such as robotics, wearables, skin prosthetics, bioelectronics, etc., represents a massive leap in their development. The results presented here reveal the device characteristics of the building block, i.e., a stretchable elastomeric synaptic transistor, its characteristics under various levels of biaxial strain, and performances of various stretchy distributed neuromorphic devices. The stretchable neuromorphic array of synaptic transistors and the neuromorphic imaging sensory skin enable platforms to create a wide range of soft devices and systems with implemented neuromorphic and cognitive functions, including artificial cognitive skins, wearable neuromorphic computing, artificial organs, neurorobotics, and skin prosthetics.

Energy-Efficient III-V Tunnel FET-Based Synaptic Device with Enhanced Charge Trapping Ability Utilizing Both Hot Hole and Hot Electron Injections for Analog Neuromorphic Computing

A charge trap device based on field-effect transistors (FET) is a promising candidate for artificial synapses because of its high reliability and mature fabrication technology. However, conventional MOSFET-based charge trap synapses require a strong stimulus for synaptic update because of their inefficient hot-carrier injection into the charge trapping layer, consequently causing a slow speed operation and large power consumption. Here, we propose a highly efficient charge trap synapse using III-V materials-based tunnel field-effect transistor (TFET). Our synaptic TFETs present superior subthreshold swing and improved charge trapping ability utilizing both carriers as charge trapping sources: hot holes created by impact ionization in the narrow bandgap InGaAs after being provided from the p⁺-source, and band-to-band tunneling hot electrons (BBHEs) generated at the abrupt p⁺n junctions in the TFETs. Thanks to these advances, our devices achieved outstanding efficiency in synaptic characteristics with a 5750 times faster synaptic update speed and 51 times lower sub-fJ/um² energy consumption per single synaptic update in comparison to the MOSFET-based synapse. An artificial neural network (ANN) simulation also confirmed a high recognition accuracy of handwritten digits up to ∼90% in a multilayer perceptron neural network based on our synaptic devices.

R-STDP Spiking Neural Network Architecture for Motion Control on a Changing Friction Joint Robotic Arm

Neuromorphic computing is a recent class of brain-inspired high-performance computer platforms and algorithms involving biologically-inspired models adopting hardware implementation in integrated circuits. The neuromorphic computing applications have provoked the rise of highly connected neurons and synapses in analog circuit systems that can be used to solve today's challenging machine learning problems. In conjunction with biologically plausible learning rules, such as the Hebbian learning and memristive devices, biologically-inspired spiking neural networks are considered the next-generation neuromorphic hardware construction blocks that will enable the deployment of new analog in situ learning capable and energetic efficient brain-like devices. These features are envisioned for modern mobile robotic implementations, currently challenging to overcome the pervasive von Neumann computer architecture. This study proposes a new neural architecture using the spike-time-dependent plasticity learning method and step-forward encoding algorithm for a self tuning neural control of motion in a joint robotic arm subjected to dynamic modifications. Simulations were conducted to demonstrate the proposed neural architecture's feasibility as the network successfully compensates for changing dynamics at each simulation run.

A Scalable Approach to Modeling on Accelerated Neuromorphic Hardware

Neuromorphic systems open up opportunities to enlarge the explorative space for computational research. However, it is often challenging to unite efficiency and usability. This work presents the software aspects of this endeavor for the BrainScaleS-2 system, a hybrid accelerated neuromorphic hardware architecture based on physical modeling. We introduce key aspects of the BrainScaleS-2 Operating System: experiment workflow, API layering, software design, and platform operation. We present use cases to discuss and derive requirements for the software and showcase the implementation. The focus lies on novel system and software features such as multi-compartmental neurons, fast re-configuration for hardware-in-the-loop training, applications for the embedded processors, the non-spiking operation mode, interactive platform access, and sustainable hardware/software co-development. Finally, we discuss further developments in terms of hardware scale-up, system usability, and efficiency.

Stretchable Neuromorphic Transistor That Combines Multisensing and Information Processing for Epidermal Gesture Recognition

We fabricated a nanowire-channel intrinsically stretchable neuromorphic transistor (NISNT) that perceives both tactile and visual information and emulates neuromorphic processing capabilities. The device demonstrated excellent stretching endurance of 1000 stretch cycles while retaining stable electrical properties. The device was then applied as a multisensitive afferent nerve that processes information in parallel. Compatible with skin deformation, the devices are attached to fingers to serve as conformal strain sensors and neuromorphic information-processing units for gesture recognition. The excitatory postsynaptic current in each device represents shape changes and is then analyzed using softmax activation processing of the neural network to recognize gestures. A multistage neural network that uses NISNT was used to further confirm the gestures. This work demonstrated an idea toward multisensory artificial nerves and neuromorphic systems.

Three-Terminal Ovonic Threshold Switch (3T-OTS) with Tunable Threshold Voltage for Versatile Artificial Sensory Neurons

Inspired by information processing in biological systems, sensor-combined edge-computing systems attract attention requesting artificial sensory neurons as essential ingredients. Here, we introduce a simple and versatile structure of artificial sensory neurons based on a novel three-terminal Ovonic threshold switch (3T-OTS), which features an electrically controllable threshold voltage (V_th). Combined with a sensor driving an output voltage, this 3T-OTS generates spikes with a frequency depending on an external stimulus. As a proof of concept, we have built an artificial retinal ganglion cell (RGC) by combining a 3T-OTS and a photodiode. Furthermore, this artificial RGC is combined with the reservoir-computing technique to perform a classification of chest X-ray images for normal, viral pneumonia, and COVID-19 infections, releasing the recognition accuracy of about 86.5%. These results indicate that the 3T-OTS is highly promising for applications in neuromorphic sensory systems, providing a building block for energy-efficient in-sensor computing devices.

Skin-Inspired Flexible and Stretchable Electrospun Carbon Nanofiber Sensors for Neuromorphic Sensing

During the past few decades, a significant amount of research effort has been dedicated toward developing skin-inspired sensors for real-time human motion monitoring and next-generation robotic devices. Although several flexible and wearable sensors have been developed in the past, the need of the hour is developing accurate, reliable, sophisticated, facile yet inexpensive flexible sensors coupled with neuromorphic systems or spiking neural networks to encode tactile information without the need for complex digital architectures, thus achieving true skin-like sensing with limited resources. In this work, we propose an approach entailing carbon nanofiber-polydimethylsiloxane composite-based piezoresistive sensors, coupled with spiking neural networks, to mimic skin-like sensing. The strain and pressure sensors have been combined with appropriately designed neural networks to encode analog voltages to spikes to recreate bioinspired tactile sensing and proprioception. To further validate the proprioceptive capability of the system, a gesture tracking smart glove, combined with a spiking neural network, was demonstrated. Wearable and flexible sensors with accompanying neural networks such as the ones proposed in this work will pave the way for a future generation of skin-mimetic sensors for advanced prosthetic devices, apparel integrable smart sensors for human motion monitoring, and human-machine interfaces.

BrainFreeze: Expanding the Capabilities of Neuromorphic Systems Using Mixed-Signal Superconducting Electronics

Superconducting electronics (SCE) is uniquely suited to implement neuromorphic systems. As a result, SCE has the potential to enable a new generation of neuromorphic architectures that can simultaneously provide scalability, programmability, biological fidelity, on-line learning support, efficiency and speed. Supporting all of these capabilities simultaneously has thus far proven to be difficult using existing semiconductor technologies. However, as the fields of computational neuroscience and artificial intelligence (AI) continue to advance, the need for architectures that can provide combinations of these capabilities will grow. In this paper, we will explain how superconducting electronics could be used to address this need by combining analog and digital SCE circuits to build large scale neuromorphic systems. In particular, we will show through detailed analysis that the available SCE technology is suitable for near term neuromorphic demonstrations. Furthermore, this analysis will establish that neuromorphic architectures built using SCE will have the potential to be significantly faster and more efficient than current approaches, all while supporting capabilities such as biologically suggestive neuron models and on-line learning. In the future, SCE-based neuromorphic systems could serve as experimental platforms supporting investigations that are not feasible with current approaches. Ultimately, these systems and the experiments that they support would enable the advancement of neuroscience and the development of more sophisticated AI.