A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications

From Printed Devices to Vertically Stacked, 3D Flexible Hybrid Systems

The pursuit of miniaturized Si electronics has revolutionized computing and communication. During recent years, the value addition in electronics has also been achieved through printing, flexible and stretchable electronics form factors, and integration over areas larger than wafer size. Unlike Si semiconductor manufacturing which takes months from tape-out to wafer production, printed electronics offers greater flexibility and fast-prototyping capabilities with lesser resources and waste generation. While significant advances have been made with various types of printed sensors and other passive devices, printed circuits still lag behind Si-based electronics in terms of performance, integration density, and functionality. In this regard, recent advances using high-resolution printing coupled with the use of high mobility materials and device engineering, for both in-plane and out-of-plane integration, raise hopes. This paper focuses on the progress in printed electronics, highlighting emerging printing technologies and related aspects such as resource efficiency, environmental impact, integration scale, and the novel functionalities enabled by vertical integration of printed electronics. By highlighting these advances, this paper intends to reveal the future promise of printed electronics as a sustainable and resource-efficient route for realizing high-performance integrated circuits and systems.

Improving Reliability of 1 Selector-1 ReRAM Crossbar Arrays Through Hybrid Switching Methods

In this study, an innovative switching approach is explored to improve the reliability of 1 Selector-1 ReRAM (1S1R) devices, integrated into a 4K crossbar array (CBA). The key innovation is the use of DC sweeping for set operations and AC single-pulse resetting to minimize device stress and prevent breakdown. The selector, based on a GeSeTe ovonic threshold switching (OTS) element, demonstrated excellent endurance (>1012 cycles), fast switching (<100 ns), and high device-to-device uniformity (<5% variability). The ReRAM, constructed with Pt/LiNbOx/W, exhibited robust bipolar resistive switching, multi-bit capability, and endurance exceeding 1012 cycles. The integrated 1S1R CBA demonstrated reliable retention and low variability in operation, showing potential for high-performance, high-density memory applications.

Ion-Induced Phase Changes in 2D MoTe2 Films for Neuromorphic Synaptic Device Applications

Two-dimensional molybdenum ditelluride (2D MoTe2) is an interesting material for artificial synapses due to its unique electronic properties and phase tunability in different polymorphs 2H/1T'. However, the growth of stable and large-scale 2D MoTe2 on a CMOS-compatible Si/SiO2 substrate remains challenging because of the high growth temperature and impurity-involved transfer process. We developed a large-scale MoTe2 film on a Si/SiO2 wafer by simple sputtering followed by lithium-ion intercalation and applied it to artificial synaptic devices. The Al2O3 passivation layer allows us to develop a stable 1T'-MoTe2 phase by preventing Te segregation caused by the weak bonding between Mo and Te atoms during lithiation. The lithiated MoTe2 film exhibits excellent synaptic behavior such as long-term potentiation/depression, a high Ion/Ioff ratio (≈103) at lower sweep voltage, and long-term retention. The in situ Raman analysis along with a systematic microstructural analysis reveals that the intercalated Li ion can provide an efficient pathway for conducting filament formation.

Kinetics of Volatile and Nonvolatile Halide Perovskite Devices: The Conductance-Activated Quasi-Linear Memristor (CALM) Model

Memristors stand out as promising components in the landscape of memory and computing. Memristors are generally defined by a conductance mechanism containing a state variable that imparts a memory effect. The current-voltage cycling causes transitions of conductance, which are determined by different physical mechanisms, such as the formation of conducting filaments in an insulating surrounding. Here, we provide a unified description of the set and reset processes using a conductance-activated quasi-linear memristor (CALM) model with a unique voltage-dependent relaxation time of the memory variable. We focus on halide perovskite memristors and their intersection with neuroscience-inspired computing. We show that the modeling approach adeptly replicates the experimental traits of both volatile and nonvolatile memristors. Its versatility extends across various device materials and configurations, as W/SiGe/a-Si/Ag, Si/SiO2/Ag, and SrRuO3/Cr-SrZrO3/Au memristors, capturing nuanced behaviors such as scan rate and upper vertex dependence. The model also describes the response to sequences of voltage pulses that cause synaptic potentiation effects. This model is a potent tool for comprehending and probing the dynamical response of memristors by indicating the relaxation properties that control observable responses.

Two-Terminal Neuromorphic Devices for Spiking Neural Networks: Neurons, Synapses, and Array Integration

The ever-increasing volume of complex data poses significant challenges to conventional sequential global processing methods, highlighting their inherent limitations. This computational burden has catalyzed interest in neuromorphic computing, particularly within artificial neural networks (ANNs). In pursuit of advancing neuromorphic hardware, researchers are focusing on developing computation strategies and constructing high-density crossbar arrays utilizing history-dependent, multistate nonvolatile memories tailored for multiply-accumulate (MAC) operations. However, the real-time collection and processing of massive, dynamic data sets require an innovative computational paradigm akin to that of the human brain. Spiking neural networks (SNNs), representing the third generation of ANNs, are emerging as a promising solution for real-time spatiotemporal information processing due to their event-based spatiotemporal capabilities. The ideal hardware supporting SNN operations comprises artificial neurons, artificial synapses, and their integrated arrays. Currently, the structural complexity of SNNs and spike-based methodologies requires hardware components with biomimetic behaviors that are distinct from those of conventional memristors used in deep neural networks. These distinctive characteristics required for neuron and synapses devices pose significant challenges. Developing effective building blocks for SNNs, therefore, necessitates leveraging the intrinsic properties of the materials constituting each unit and overcoming the integration barriers. This review focuses on the progress toward memristor-based spiking neural network neuromorphic hardware, emphasizing the role of individual components such as memristor-based neurons, synapses, and array integration along with relevant biological insights. We aim to provide valuable perspectives to researchers working on the next generation of brain-like computing systems based on these foundational elements.

Data encryption/decryption and medical image reconstruction based on a sustainable biomemristor designed logic gate circuit

Memristors are considered one of the most promising new-generation memory technologies due to their high integration density, fast read/write speeds, and ultra-low power consumption. Natural biomaterials have attracted interest in integrated circuits and electronics because of their environmental friendliness, sustainability, low cost, and excellent biocompatibility. In this study, a sustainable biomemristor with Ag/mugwort:PVDF/ITO structure was prepared using spin-coating and magnetron sputtering methods, which exhibited excellent durability, significant resistance switching (RS) behavior and unidirectional conduction properties when three metals were used as top electrode. By studying the conductivity mechanism of the device, a charge conduction model was established by the combination of F-N tunneling, redox, and complexation reaction. Finally, the novel logic gate circuits were constructed using the as-prepared memristor, and further memristor based encryption circuit using 3-8 decoder was innovatively designed, which can realize uniform rule encryption and decryption of medical information for data and medical images. Therefore, this work realizes the integration of memristor with traditional electronic technology and expands the applications of sustainable biomemristors in digital circuits, data encryption, and medical image security.

Leveraging volatile memristors in neuromorphic computing: from materials to system implementation

Inspired by the functions of biological neural networks, volatile memristors are essential for implementing neuromorphic computing. These devices enable large-scale and energy-efficient data processing by emulating neural functionalities through dynamic resistance changes. The threshold switching characteristics of volatile memristors, which are driven by various mechanisms in materials ranging from oxides to chalcogenides, make them versatile and suitable for neuromorphic computing systems. Understanding these mechanisms and selecting appropriate devices for specific applications are crucial for optimizing the performance. However, the existing literature lacks a comprehensive review of switching mechanisms, their compatibility with different applications, and a deeper exploration of the spatiotemporal processing capabilities and inherent stochasticity of volatile memristors. This review begins with a detailed analysis of the operational principles and material characteristics of volatile memristors. Their diverse applications are then explored, emphasizing their role in crossbar arrays, artificial receptors, and neurons. Furthermore, the potential of volatile memristors in artificial inference systems and reservoir computing is discussed, due to their spatiotemporal processing capabilities. Hardware security applications and probabilistic computing are also examined, where the inherent stochasticity of the devices can improve the system robustness and adaptability. To conclude, the suitability of different switching mechanisms for various applications is evaluated, and future perspectives for the development and implementation of volatile memristors are presented. This review aims to fill the gaps in existing research and highlight the potential of volatile memristors to drive innovation in neuromorphic computing, paving the way for more efficient and powerful computational paradigms.

Reliable Low-Current and Multilevel Memristive Electrochemical Neuromorphic Devices with Semi-Metal Sb Filament

Memristors are used in artificial neural networks owing to their exceptional integration capabilities and scalability. However, traditional memristors are hampered by limited resistance states and randomness, which curtails their application. The migration of metal ions critically influences the number of conductance states and the linearity of weight updates. Semi-metal filaments can provide subquantum conductance changes to the memristors due to the smaller single-atom conductance, such as Sb (≈0.01 G0 = 7.69 × 10-7 S). Here, a memristor featuring an active electrode composed of semi-metal Sb is introduced for the first time. This memristor demonstrates precise conductance control, a large on/off ratio, consistent switching, and prolonged retention exceeding 105 s. Density functional theory (DFT) calculations and characterization methods reveal the formation of Sb filaments during a set process. The interaction between Sb and O within the dielectric layer facilitates the Sb filaments' ability to preserve their morphology in the absence of electric fields.

Natural Induction: Spontaneous Adaptive Organisation without Natural Selection

Evolution by natural selection is believed to be the only possible source of spontaneous adaptive organisation in the natural world. This places strict limits on the kinds of systems that can exhibit adaptation spontaneously, i.e., without design. Physical systems can show some properties relevant to adaptation without natural selection or design. (1) The relaxation, or local energy minimisation, of a physical system constitutes a natural form of optimisation insomuch as it finds locally optimal solutions to the frustrated forces acting on it or between its components. (2) When internal structure 'gives way' or accommodates a pattern of forcing on a system, this constitutes learning insomuch, as it can store, recall, and generalise past configurations. Both these effects are quite natural and general, but in themselves insufficient to constitute non-trivial adaptation. However, here we show that the recurrent interaction of physical optimisation and physical learning together results in significant spontaneous adaptive organisation. We call this adaptation by natural induction. The effect occurs in dynamical systems described by a network of viscoelastic connections subject to occasional disturbances. When the internal structure of such a system accommodates slowly across many disturbances and relaxations, it spontaneously learns to preferentially visit solutions of increasingly greater quality (exceptionally low energy). We show that adaptation by natural induction thus produces network organisations that improve problem-solving competency with experience (without supervised training or system-level reward). We note that the conditions for adaptation by natural induction, and its adaptive competency, are different from those of natural selection. We therefore suggest that natural selection is not the only possible source of spontaneous adaptive organisation in the natural world.

Unique Coexistence of Two Resistive Switching Modes in a Memristor Device Enables Multifunctional Neuromorphic Computing Properties

We report on hybrid memristor devices consisting of germanium dioxide nanoparticles (GeO2 NP) embedded within a poly(methyl methacrylate) (PMMA) thin film. Besides exhibiting forming-free resistive switching and an uncommon "ON" state in pristine conditions, the hybrid (nanocomposite) devices demonstrate a unique form of mixed-mode switching. The observed stopping voltage-dependent switching enables state-of-the-art bifunctional synaptic behavior with short-term (volatile/temporal) and long-term (nonvolatile/nontemporal) modes that are switchable depending on the stopping voltage applied. The short-term memory mode device is demonstrated to further emulate important synaptic functions such as short-term potentiation (STP), short-term depression (STD), paired-pulse facilitation (PPF), post-tetanic potentiation (PTP), spike-voltage-dependent plasticity (SVDP), spike-duration-dependent plasticity (SDDP), and, more importantly, the "learning-forgetting-rehearsal" behavior. The long-term memory mode gives additional long-term potentiation (LTP) and long-term depression (LTD) characteristics for long-term plasticity applications. The work shows a unique coexistence of the two resistive switching modes, providing greater flexibility in device design for future adaptive and reconfigurable neuromorphic computing systems at the hardware level.

A comprehensive review of advanced trends: from artificial synapses to neuromorphic systems with consideration of non-ideal effects

A neuromorphic system is composed of hardware-based artificial neurons and synaptic devices, designed to improve the efficiency of neural computations inspired by energy-efficient and parallel operations of the biological nervous system. A synaptic device-based array can compute vector-matrix multiplication (VMM) with given input voltage signals, as a non-volatile memory device stores the weight information of the neural network in the form of conductance or capacitance. However, unlike software-based neural networks, the neuromorphic system unavoidably exhibits non-ideal characteristics that can have an adverse impact on overall system performance. In this study, the characteristics required for synaptic devices and their importance are discussed, depending on the targeted application. We categorize synaptic devices into two types: conductance-based and capacitance-based, and thoroughly explore the operations and characteristics of each device. The array structure according to the device structure and the VMM operation mechanism of each structure are analyzed, including recent advances in array-level implementation of synaptic devices. Furthermore, we reviewed studies to minimize the effect of hardware non-idealities, which degrades the performance of hardware neural networks. These studies introduce techniques in hardware and signal engineering, as well as software-hardware co-optimization, to address these non-idealities through compensation approaches.

Technology and Integration Roadmap for Optoelectronic Memristor

Optoelectronic memristors (OMs) have emerged as a promising optoelectronic Neuromorphic computing paradigm, opening up new opportunities for neurosynaptic devices and optoelectronic systems. These OMs possess a range of desirable features including minimal crosstalk, high bandwidth, low power consumption, zero latency, and the ability to replicate crucial neurological functions such as vision and optical memory. By incorporating large-scale parallel synaptic structures, OMs are anticipated to greatly enhance high-performance and low-power in-memory computing, effectively overcoming the limitations of the von Neumann bottleneck. However, progress in this field necessitates a comprehensive understanding of suitable structures and techniques for integrating low-dimensional materials into optoelectronic integrated circuit platforms. This review aims to offer a comprehensive overview of the fundamental performance, mechanisms, design of structures, applications, and integration roadmap of optoelectronic synaptic memristors. By establishing connections between materials, multilayer optoelectronic memristor units, and monolithic optoelectronic integrated circuits, this review seeks to provide insights into emerging technologies and future prospects that are expected to drive innovation and widespread adoption in the near future.

Realizing avalanche criticality in neuromorphic networks on a 2D hBN platform

Networks and systems which exhibit brain-like behavior can analyze information from intrinsically noisy and unstructured data with very low power consumption. Such characteristics arise due to the critical nature and complex interconnectivity of the brain and its neuronal network. We demonstrate a system comprising of multilayer hexagonal boron nitride (hBN) films contacted with silver (Ag), which can uniquely host two different self-assembled networks, which are self-organized at criticality (SOC). This system shows bipolar resistive switching between the high resistance state (HRS) and the low resistance state (LRS). In the HRS, Ag clusters (nodes) intercalate in the van der Waals gaps of hBN forming a network of tunnel junctions, whereas the LRS contains a network of Ag filaments. The temporal avalanche dynamics in both these states exhibit power-law scaling, long-range temporal correlation, and SOC. These networks can be tuned from one to another with voltage as a control parameter. For the first time, two different neural networks are realized in a single CMOS compatible, 2D material platform.

Emerging memristive artificial neuron and synapse devices for the neuromorphic electronics era

Growth of data eases the way to access the world but requires increasing amounts of energy to store and process. Neuromorphic electronics has emerged in the last decade, inspired by biological neurons and synapses, with in-memory computing ability, extenuating the 'von Neumann bottleneck' between the memory and processor and offering a promising solution to reduce the efforts both in data storage and processing, thanks to their multi-bit non-volatility, biology-emulated characteristics, and silicon compatibility. This work reviews the recent advances in emerging memristive devices for artificial neuron and synapse applications, including memory and data-processing ability: the physics and characteristics are discussed first, i.e., valence changing, electrochemical metallization, phase changing, interfaced-controlling, charge-trapping, ferroelectric tunnelling, and spin-transfer torquing. Next, we propose a universal benchmark for the artificial synapse and neuron devices on spiking energy consumption, standby power consumption, and spike timing. Based on the benchmark, we address the challenges, suggest the guidelines for intra-device and inter-device design, and provide an outlook for the neuromorphic applications of resistive switching-based artificial neuron and synapse devices.

Graphene-based RRAM devices for neural computing

Resistive random access memory is very well known for its potential application in in-memory and neural computing. However, they often have different types of device-to-device and cycle-to-cycle variability. This makes it harder to build highly accurate crossbar arrays. Traditional RRAM designs make use of various filament-based oxide materials for creating a channel that is sandwiched between two electrodes to form a two-terminal structure. They are often subjected to mechanical and electrical stress over repeated read-and-write cycles. The behavior of these devices often varies in practice across wafer arrays over these stresses when fabricated. The use of emerging 2D materials is explored to improve electrical endurance, long retention time, high switching speed, and fewer power losses. This study provides an in-depth exploration of neuro-memristive computing and its potential applications, focusing specifically on the utilization of graphene and 2D materials in RRAM for neural computing. The study presents a comprehensive analysis of the structural and design aspects of graphene-based RRAM, along with a thorough examination of commercially available RRAM models and their fabrication techniques. Furthermore, the study investigates the diverse range of applications that can benefit from graphene-based RRAM devices.

Proton‐Conducting Hierarchical Composite Hydrogels Producing First Soft Memcapacitors with Switchable Memory

Perpetual exigency for environment friendly clean energy and powerful soft electronics has elevated the research on hydrogels in past two decades. Hydrogels are the amplifiers of material properties using manipulation in structure–property relationship via simple, economic yet effective routes. Herein, a set of composite and hybrid hydrogels are developed by hierarchical assembling of clay nanosheets and surfactant micelles those divulge the first example of memcapacitor gels and offer exceptional proton conductivity (1.66–4.34 × 10–2 S cm−1) as a gel material. Further, Congo red, Eosin Y, and Orange G are used to hybridize one of the composites to achieve three hybrid hydrogels. Such hybridization is found to regulate the memristive function selectively from the coupled effect of memcapacitance from the composite. The composite hydrogel highlights its volatile memory with encouraging robustness under environmental conditions, established through various current–voltage (I–V) experiments. The electrochemical behaviors including the high proton conductivity are realized from impedance measurements. Material characterizations, experimental results, and in silico optimized structures rationalize composite/hybrid network formation, capacitive/memristive responses, and enhanced proton conduction in the fabricated composite superstructures. Proposed structural models demonstrate two orthogonally oriented structural encryptions to be accountable for the expressed bifunctionality in the hierarchically designed superstructures.

Electrochemical-Memristor-Based Artificial Neurons and Synapses-Fundamentals, Applications, and Challenges

Artificial neurons and synapses are considered essential for the progress of the future brain-inspired computing, based on beyond von Neumann architectures. Here, a discussion on the common electrochemical fundamentals of biological and artificial cells is provided, focusing on their similarities with the redox-based memristive devices. The driving forces behind the functionalities and the ways to control them by an electrochemical-materials approach are presented. Factors such as the chemical symmetry of the electrodes, doping of the solid electrolyte, concentration gradients, and excess surface energy are discussed as essential to understand, predict, and design artificial neurons and synapses. A variety of two- and three-terminal memristive devices and memristive architectures are presented and their application for solving various problems is shown. The work provides an overview of the current understandings on the complex processes of neural signal generation and transmission in both biological and artificial cells and presents the state-of-the-art applications, including signal transmission between biological and artificial cells. This example is showcasing the possibility for creating bioelectronic interfaces and integrating artificial circuits in biological systems. Prospectives and challenges of the modern technology toward low-power, high-information-density circuits are highlighted.

Compute in-Memory with Non-Volatile Elements for Neural Networks: A Review from a Co-Design Perspective

Deep learning has become ubiquitous, touching daily lives across the globe. Today, traditional computer architectures are stressed to their limits in efficiently executing the growing complexity of data and models. Compute-in-memory (CIM) can potentially play an important role in developing efficient hardware solutions that reduce data movement from compute-unit to memory, known as the von Neumann bottleneck. At its heart is a cross-bar architecture with nodal non-volatile-memory elements that performs an analog multiply-and-accumulate operation, enabling the matrix-vector-multiplications repeatedly used in all neural network workloads. The memory materials can significantly influence final system-level characteristics and chip performance, including speed, power, and classification accuracy. With an over-arching co-design viewpoint, this review assesses the use of cross-bar based CIM for neural networks, connecting the material properties and the associated design constraints and demands to application, architecture, and performance. Both digital and analog memory are considered, assessing the status for training and inference, and providing metrics for the collective set of properties non-volatile memory materials will need to demonstrate for a successful CIM technology.

Model of Neuromorphic Odorant-Recognition Network

We propose a new model for a neuromorphic olfactory analyzer based on memristive synapses. The model comprises a layer of receptive neurons that perceive various odors and a layer of "decoder" neurons that recognize these odors. It is demonstrated that connecting these layers with memristive synapses enables the training of the "decoder" layer to recognize two types of odorants of varying concentrations. In the absence of such synapses, the layer of "decoder" neurons does not exhibit specificity in recognizing odorants. The recognition of the 'odorant' occurs through the neural activity of a group of decoder neurons that have acquired specificity for the odorant in the learning process. The proposed phenomenological model showcases the potential use of a memristive synapse in practical odorant recognition applications.

Highly Reliable Ovonic Threshold Switch with TiN/GeTe/TiN Structure

A new architecture has become necessary owing to the power consumption and latency problems of the von Neumann architecture. A neuromorphic memory system is a promising candidate for the new system as it has the potential to process large amounts of digital information. A crossbar array (CA), which consists of a selector and a resistor, is the basic building block for the new system. Despite the excellent prospects of crossbar arrays, the biggest obstacle for them is sneak current, which can cause a misreading between the adjacent memory cells, thus resulting in a misoperation in the arrays. The chalcogenide-based ovonic threshold switch (OTS) is a powerful selector with highly nonlinear I-V characteristics that can be used to address the sneak current problem. In this study, we evaluated the electrical characteristics of an OTS with a TiN/GeTe/TiN structure. This device shows nonlinear DC I-V characteristics, an excellent endurance of up to 10⁹ in the burst read measurement, and a stable threshold voltage below 15 mV/dec. In addition, at temperatures below 300 °C, the device exhibits good thermal stability and retains an amorphous structure, which is a strong indication of the aforementioned electrical characteristics.

Graph Analysis with Multifunctional Self-Rectifying Memristive Crossbar Array

Many big data have interconnected and dynamic graph structures growing over time. Analyzing these graphical data requires the hidden relationship between the nodes in the graphs to be identified, which has conventionally been achieved by finding the effective similarity. However, graphs are generally non-Euclidean, which does not allow finding it. In this study, the non-Euclidean graphs are mapped to a specific crossbar array (CBA) composed of self-rectifying memristors and metal cells at the diagonal positions. The sneak current, an intrinsic physical property in the CBA, allows for the identification of the similarity function. The sneak-current-based similarity function indicates the distance between the nodes, which can be used to predict the probability that unconnected nodes will be connected in the future, connectivity between communities, and neural connections in a brain. When all bit lines of the CBA are connected to the ground, the sneak current is suppressed, and the CBA can be used to search for adjacent nodes. This work demonstrates the physical calculation methods applied to various graphical problems using the CBA composed of the self-rectifying memristor based on the HfO₂ switching layer. Moreover, such applications suffer less from the memristors' inherent issues related to their stochastic nature.

Resistive Switching Crossbar Arrays Based on Layered Materials

Resistive switching (RS) devices are metal/insulator/metal cells that can change their electrical resistance when electrical stimuli are applied between the electrodes, and they can be used to store and compute data. Planar crossbar arrays of RS devices can offer a high integration density (>10⁸  devices mm^{- 2} ) and this can be further enhanced by stacking them three-dimensionally. The advantage of using layered materials (LMs) in RS devices compared to traditional phase-change materials and metal oxides is that their electrical properties can be adjusted with a higher precision. Here, the key figures-of-merit and procedures to implement LM-based RS devices are defined. LM-based RS devices fabricated using methods compatible with industry are identified and discussed. The focus is on small devices (size < 9 µm² ) arranged in crossbar structures, since larger devices may be affected by artifacts, such as grain boundaries and flake junctions. How to enhance device performance, so to accelerate the development of this technology, is also discussed.

Enhanced Short-Term Memory Plasticity of WOx-Based Memristors by Inserting AlOx Thin Layer

ITO/WO_x/TaN and ITO/WO_x/AlO_x/TaN memory cells were fabricated as a neuromorphic device that is compatible with CMOS. They are suitable for the information age, which requires a large amount of data as next-generation memory. The device with a thin AlO_x layer deposited by atomic layer deposition (ALD) has different electrical characteristics from the device without an AlO_x layer. The low current is achieved by inserting an ultra-thin AlO_x layer between the switching layer and the bottom electrode due to the tunneling barrier effect. Moreover, the short-term memory characteristics in bilayer devices are enhanced. The WO_x/AlO_x device returns to the HRS without a separate reset process or energy consumption. The amount of gradual current reduction could be controlled by interval time. In addition, it is possible to maintain LRS for a longer time by forming it to implement long-term memory.

Non-Volatile Memory and Synaptic Characteristics of TiN/CeOx/Pt RRAM Devices

In this study, we investigate the synaptic characteristics and the non-volatile memory characteristics of TiN/CeOx/Pt RRAM devices for a neuromorphic system. The thickness and chemical properties of the CeOx are confirmed through TEM, EDS, and XPS analysis. A lot of oxygen vacancies (ions) in CeOx film enhance resistive switching. The stable bipolar resistive switching characteristics, endurance cycling (>100 cycles), and non-volatile properties in the retention test (>10,000 s) are assessed through DC sweep. The filamentary switching model and Schottky emission-based conduction model are presented for TiN/CeOx/Pt RRAM devices in the LRS and HRS. The compliance current (1~5 mA) and reset stop voltage (−1.3~−2.2 V) are used in the set and reset processes, respectively, to implement multi-level cell (MLC) in DC sweep mode. Based on neural activity, a neuromorphic system is performed by electrical stimulation. Accordingly, the pulse responses achieve longer endurance cycling (>10,000 cycles), MLC (potentiation and depression), spike-timing dependent plasticity (STDP), and excitatory postsynaptic current (EPSC) to mimic synapse using TiN/CeOx/Pt RRAM devices.

Improved Performance of the Al2O3-Protected HfO2-TiO2 Base Layer with a Self-Assembled CH3NH3PbI3 Heterostructure for Extremely Low Operating Voltage and Stable Filament Formation in Nonvolatile Resistive Switching Memory

Herein, we report intriguing observations of an extremely stable nonvolatile bipolar resistive switching (NVBRS) memory device fabricated using HfO₂-TiO₂ topologically protected by Al₂O₃ as a stacked base layer for a CH₃NH₃PbI₃ (MAPI) electrolyte layer sandwiched between Ag and fluorine-doped tin oxide (FTO) electrodes. MAPI has been successfully synthesized by a rapid microwave-solvothermal (MW-ST) method within 10 min at 120 °C without requiring any inert gas atmosphere using low-cost precursors and solvents. Subsequently, MAPI powders are dissolved in aprotic solvents (DMF/DMSO = 8:2), and a spin-coated thin film is allowed to recrystallize upon annealing at 120 °C via a solution-based nanoscale self-assembly process. The fabricated memory device with the Ag/MAPI/Al₂O₃/TiO₂-HfO₂/FTO configuration shows an enhanced resistance ratio of 10⁵ for >10⁴ s at an extremely lower operating voltage (SET +0.2 V, RESET -0.2 V) when compared to that of the pristine MAPI device (±1 V, 10², 10⁴ s). We show that the memory device also exhibits a remarkable endurance of ≥3500 cycles due to the Al₂O₃ robust coating on the HfO₂-TiO₂ layer, facilitating prompt heterojunction formation. Thus, the adopted innovative strategies to prepare structurally and optically stable (∼1.5 years) MAPI under high-humid conditions could offer enhanced performance of NVBRS memory devices for medical, security, internet of things (IoT), and artificial intelligence (AI) applications.

Enhancement of Resistive and Synaptic Characteristics in Tantalum Oxide-Based RRAM by Nitrogen Doping

Resistive random-access memory (RRAM) for neuromorphic systems has received significant attention because of its advantages, such as low power consumption, high-density structure, and high-speed switching. However, variability occurs because of the stochastic nature of conductive filaments (CFs), producing inaccurate results in neuromorphic systems. In this article, we fabricated nitrogen-doped tantalum oxide (TaO_x:N)-based resistive switching (RS) memory. The TaO_x:N-based device significantly enhanced the RS characteristics compared with a TaO_x-based device in terms of resistance variability. It achieved lower device-to-device variability in both low-resistance state (LRS) and high-resistance state (HRS), 8.7% and 48.3% rather than undoped device of 35% and 60.7%. Furthermore, the N-doped device showed a centralized set distribution with a 9.4% variability, while the undoped device exhibited a wider distribution with a 17.2% variability. Concerning pulse endurance, nitrogen doping prevented durability from being degraded. Finally, for synaptic properties, the potentiation and depression of the TaO_x:N-based device exhibited a more stable cycle-to-cycle variability of 4.9%, compared with only 13.7% for the TaO_x-based device. The proposed nitrogen-doped device is more suitable for neuromorphic systems because, unlike the undoped device, uniformity of conductance can be obtained.

Room-Temperature Fabricated Multilevel Nonvolatile Lead-Free Cesium Halide Memristors for Reconfigurable In-Memory Computing

Recently, conductive-bridging memristors based on metal halides, such as halide perovskites, have been demonstrated as promising components for brain-inspired hardware-based neuromorphic computing. However, realizing devices that simultaneously fulfill all of the key merits (low operating voltage, high dynamic range, multilevel nonvolatile storage capability, and good endurance) remains a great challenge. Herein, we describe lead-free cesium halide memristors incorporating a MoO_X interfacial layer as a type of conductive-bridging memristor. With this design, we obtained highly uniform and reproducible memristors that exhibited all-around resistive switching characteristics: ultralow operating voltages (<0.18 V), low variations (<30 mV), long retention times (>10⁶ s), high endurance (>10⁵, full on/off cycles), record-high on/off ratios (>10¹⁰, smaller devices having areas <5 × 10^-4 mm²), fast switching (<200 ns), and multilevel programming abilities (>64 states). With these memristors, we successfully implemented stateful logic functions in a reconfigurable architecture and accomplished a high classification accuracy (ca. 90%) in the simulated hand-written-digits classification task, suggesting their versatility in future in-memory computing applications. In addition, we exploited the room-temperature fabrication of the devices to construct a fully functional three-dimensional stack of memristors, which demonstrates their potential of high-density integration desired for data-intensive neuromorphic computing. High-performance, environmentally friendly cesium halide memristors provide opportunities toward next-generation electronics beyond von Neumann architectures.

Review on the Basic Circuit Elements and Memristor Interpretation: Analysis, Technology and Applications

Circuit or electronic components are useful elements allowing the realization of different circuit functionalities. The resistor, capacitor and inductor represent the three commonly known basic passive circuit elements owing to their fundamental nature relating them to the four circuit variables, namely voltage, magnetic flux, current and electric charge. The memory resistor (or memristor) was claimed to be the fourth basic passive circuit element, complementing the resistor, capacitor and inductor. This paper presents a review on the four basic passive circuit elements. After a brief recall on the first three known basic passive circuit elements, a thorough description of the memristor follows. Memristor sparks interest in the scientific community due to its interesting features, for example nano-scalability, memory capability, conductance modulation, connection flexibility and compatibility with CMOS technology, etc. These features among many others are currently in high demand on an industrial scale. For this reason, thousands of memristor-based applications are reported. Hence, the paper presents an in-depth overview of the philosophical argumentations of memristor, technologies and applications.

A Learning-Rate Modulable and Reliable TiOx Memristor Array for Robust, Fast, and Accurate Neuromorphic Computing

Realization of memristor-based neuromorphic hardware system is important to achieve energy efficient bigdata processing and artificial intelligence in integrated device system-level. In this sense, uniform and reliable titanium oxide (TiO_x ) memristor array devices are fabricated to be utilized as constituent device element in hardware neural network, representing passive matrix array structure enabling vector-matrix multiplication process between multisignal and trained synaptic weight. In particular, in situ convolutional neural network hardware system is designed and implemented using a multiple 25 × 25 TiO_x memristor arrays and the memristor device parameters are developed to bring global constant voltage programming scheme for entire cells in crossbar array without any voltage tuning peripheral circuit such as transistor. Moreover, the learning rate modulation during in situ hardware training process is successfully achieved due to superior TiO_x memristor performance such as threshold uniformity (≈2.7%), device yield (> 99%), repetitive stability (≈3000 spikes), low asymmetry value of ≈1.43, ambient stability (6 months), and nonlinear pulse response. The learning rate modulable fast-converging in situ training based on direct memristor operation shows five times less training iterations and reduces training energy compared to the conventional hardware in situ training at ≈95.2% of classification accuracy.

Quasisynchronization of Memristive Neural Networks With Communication Delays via Event-Triggered Impulsive Control

This article considers the quasisynchronization of memristive neural networks (MNNs) with communication delays via event-triggered impulsive control (ETIC). In view of the limited communication and bandwidth, we adopt a novel switching event-triggered mechanism (ETM) that not only decreases the times of controller update and the amount of data sent out but also eliminates the Zeno behavior. By using an appropriate Lyapunov function, several algebraic conditions are given for quasisynchronization of MNNs with communication delays. More important, there is no restriction on the derivation of the Lyapunov function, even if it is an increasing function over a period of time. Then, we further propose a switching ETM depending on communication delays and aperiodic sampling, which is more economical and practical and can directly avoid Zeno behavior. Finally, two simulations are presented to validate the effectiveness of the proposed results.

Metaplastic and energy-efficient biocompatible graphene artificial synaptic transistors for enhanced accuracy neuromorphic computing

CMOS-based computing systems that employ the von Neumann architecture are relatively limited when it comes to parallel data storage and processing. In contrast, the human brain is a living computational signal processing unit that operates with extreme parallelism and energy efficiency. Although numerous neuromorphic electronic devices have emerged in the last decade, most of them are rigid or contain materials that are toxic to biological systems. In this work, we report on biocompatible bilayer graphene-based artificial synaptic transistors (BLAST) capable of mimicking synaptic behavior. The BLAST devices leverage a dry ion-selective membrane, enabling long-term potentiation, with ~50 aJ/µm2 switching energy efficiency, at least an order of magnitude lower than previous reports on two-dimensional material-based artificial synapses. The devices show unique metaplasticity, a useful feature for generalizable deep neural networks, and we demonstrate that metaplastic BLASTs outperform ideal linear synapses in classic image classification tasks. With switching energy well below the 1 fJ energy estimated per biological synapse, the proposed devices are powerful candidates for bio-interfaced online learning, bridging the gap between artificial and biological neural networks.

The Potential of SoC FPAAs for Emerging Ultra-Low-Power Machine Learning

Large-scale field-programmable analog arrays (FPAA) have the potential to handle machine inference and learning applications with significantly low energy requirements, potentially alleviating the high cost of these processes today, even in cloud-based systems. FPAA devices enable embedded machine learning, one form of physical mixed-signal computing, enabling machine learning and inference on low-power embedded platforms, particularly edge platforms. This discussion reviews the current capabilities of large-scale field-programmable analog arrays (FPAA), as well as considering the future potential of these SoC FPAA devices, including questions that enable ubiquitous use of FPAA devices similar to FPGA devices. Today’s FPAA devices include integrated analog and digital fabric, as well as specialized processors and infrastructure, becoming a platform of mixed-signal development and analog-enabled computing. We address and show that next-generation FPAAs can handle the required load of 10,000–10,000,000,000 PMAC, required for present and future large fielded applications, at orders of magnitude of lower energy levels than those expected by current technology, motivating the need to develop these new generations of FPAA devices.

CMOS-compatible compute-in-memory accelerators based on integrated ferroelectric synaptic arrays for convolution neural networks

Convolutional neural networks (CNNs) have gained much attention because they can provide superior complex image recognition through convolution operations. Convolution processes require repeated multiplication and accumulation operations, which are difficult tasks for conventional computing systems. Compute-in-memory (CIM) that uses parallel data processing is an ideal device structure for convolution operations. CIM based on two-terminal synaptic devices with a crossbar structure has been developed, but unwanted leakage current paths and the high-power consumption remain as the challenges. Here, we demonstrate integrated ferroelectric thin-film transistor (FeTFT) synaptic arrays that can provide efficient parallel programming and data processing for CNNs by the selective and accurate control of polarization in the ferroelectric layer. In addition, three-terminal FeTFTs can act as both nonvolatile memory and access device, which tackle issues from two-terminal devices. An integrated FeTFT synaptic array with parallel programming capabilities can perform convolution operations to extract image features with a high-recognition accuracy.

Atomic scale memristive photon source

Memristive devices are an emerging new type of devices operating at the scale of a few or even single atoms. They are currently used as storage elements and are investigated for performing in-memory and neuromorphic computing. Amongst these devices, Ag/amorphous-SiO_x/Pt memristors are among the most studied systems, with the electrically induced filament growth and dynamics being thoroughly investigated both theoretically and experimentally. In this paper, we report the observation of a novel feature in these devices: The appearance of new photoluminescent centers in SiO_x upon memristive switching, and photon emission correlated with the conductance changes. This observation might pave the way towards an intrinsically memristive atomic scale light source with applications in neural networks, optical interconnects, and quantum communication.

An artificial neural network chip based on two-dimensional semiconductor

Recently, research on two-dimensional (2D) semiconductors has begun to translate from the fundamental investigation into rudimentary functional circuits. In this work, we unveil the first functional MoS₂ artificial neural network (ANN) chip, including multiply-and-accumulate (MAC), memory and activation function circuits. Such MoS₂ ANN chip is realized through fabricating 818 field-effect transistors (FETs) on a wafer-scale and high-homogeneity MoS₂ film, with a gate-last process to realize top gate structured FETs. A 62-level simulation program with integrated circuit emphasis (SPICE) model is utilized to design and optimize our analog ANN circuits. To demonstrate a practical application, a tactile digit sensing recognition was demonstrated based on our ANN circuits. After training, the digit recognition rate exceeds 97%. Our work not only demonstrates the protentional of 2D semiconductors in wafer-scale integrated circuits, but also paves the way for its future application in AI computation.

Voltage Pulse Driven VO2 Volatile Resistive Transition Devices as Leaky Integrate-and-Fire Artificial Neurons

In a hardware-based neuromorphic computation system, using emerging nonvolatile memory devices as artificial synapses, which have an inelastic memory characteristic, has attracted considerable interest. In contrast, the elastic artificial neurons have received much less attention. An ideal material system that is suitable for mimicking biological neurons is the one with volatile (or mono-stable) resistive change property. Vanadium dioxide (VO2) is a well-known material that exhibits an abrupt and volatile insulator-to-metal transition property. In this work, we experimentally demonstrate that pulse-driven two-terminal VO2 devices behave in a leaky integrate-and-fire (LIF) manner, and they elastically relax back to their initial value after firing, thus, mimicking the behavior of biological neurons. The VO2 device with a channel length of 20 µm can be driven to fire by a single long-duration pulse (>83 µs) or multiple short-duration pulses. We further model the VO2 devices as resistive networks based on their granular domain structure, with resistivities corresponding to the insulator or metallic states. Simulation results confirm that the volatile resistive transition under voltage pulse driving is caused by the formation of a metallic filament in an avalanche-like process, while this volatile metallic filament will relax back to the insulating state at the end of driving pulses. The simulation offers a microscopic view of the dynamic and abrupt filament formation process to explain the experimentally observed LIF behavior. These results suggest that VO2 insulator–metal transition could be exploited for artificial neurons.

Memristive Devices Based on Two-Dimensional Transition Metal Chalcogenides for Neuromorphic Computing

Two-dimensional (2D) transition metal chalcogenides (TMC) and their heterostructures are appealing as building blocks in a wide range of electronic and optoelectronic devices, particularly futuristic memristive and synaptic devices for brain-inspired neuromorphic computing systems. The distinct properties such as high durability, electrical and optical tunability, clean surface, flexibility, and LEGO-staking capability enable simple fabrication with high integration density, energy-efficient operation, and high scalability. This review provides a thorough examination of high-performance memristors based on 2D TMCs for neuromorphic computing applications, including the promise of 2D TMC materials and heterostructures, as well as the state-of-the-art demonstration of memristive devices. The challenges and future prospects for the development of these emerging materials and devices are also discussed. The purpose of this review is to provide an outlook on the fabrication and characterization of neuromorphic memristors based on 2D TMCs.

Reliable multilevel memristive neuromorphic devices based on amorphous matrix via quasi-1D filament confinement and buffer layer

Conductive-bridging random access memory (CBRAM) has garnered attention as a building block of non-von Neumann architectures because of scalability and parallel processing on the crossbar array. To integrate CBRAM into the back-end-of-line (BEOL) process, amorphous switching materials have been investigated for practical usage. However, both the inherent randomness of filaments and disorders of amorphous material lead to poor reliability. In this study, a highly reliable nanoporous-defective bottom layer (NP-DBL) structure based on amorphous TiO₂ is demonstrated (Ag/a-TiO₂/a-TiO_x/p-Si). The stoichiometries of DBL and the pore size can be manipulated to achieve the analog conductance updates and multilevel conductance by 300 states with 1.3% variation, and 10 levels, respectively. Compared with nonporous TiO₂ CBRAM, endurance, retention, and uniformity can be improved by 10⁶ pulses, 28 days at 85°C, and 6.7 times, respectively. These results suggest even amorphous-based systems, elaborately tuned structural variables, can help design more reliable CBRAMs.

Dynamic Self-Rectifying Liquid Metal-Semiconductor Heterointerfaces: A Platform for Development of Bioinspired Afferent Systems

The assembly of geometrically complex and dynamically active liquid metal/semiconductor heterointerfaces has drawn extensive attention in multidimensional electronic systems. In this study the chemovoltaic driven reactions have enabled the microfluidity of hydrophobic galinstan into a three-dimensional (3D) semiconductor matrix. A dynamic heterointerface is developed between the atomically thin surface oxide of galinstan and the TiO₂-Ni interface. Upon the growth of Ga₂O₃ film at the Ga₂O₃-TiO₂ heterointerface, the partial reduction of the TiO₂ film was confirmed by material characterization techniques. The conductance imaging spectroscopy and electrical measurements are used to investigate the charge transfer at heterointerfaces. Concurrently, the dynamic conductance in artificial synaptic junctions is modulated to mimic the biofunctional communication characteristics of multipolar neurons, including slow and fast inhibitory and excitatory postsynaptic responses. The self-rectifying characteristics, femtojoule energy processing, tunable synaptic events, and notably the coordinated signal recognition are the main characteristics of this multisynaptic device. This novel 3D design of liquid metal-semiconductor structure opens up new opportunities for the development of bioinspired afferent systems. It further facilitates the realization of physical phenomena at liquid metal-semiconductor heterointerfaces.

Resistive Memory Devices Based on Reticular Materials for Electrical Information Storage

Recently, reticular materials, such as metal-organic frameworks and covalent organic frameworks, have been proposed as an active insulating layer in resistive switching memory systems through their chemically tunable porous structure. A resistive random access memory (RRAM) cell, a digital memristor, is one of the most outstanding emergent memory devices that achieves high-density electrical information storage with variable electrical resistance states between two terminals. The overall design of the RRAM devices comprises an insulating layer sandwiched between two metal electrodes (metal/insulator/metal). RRAM devices with fast switching speeds and enhanced storage density have the potential to be manufactured with excellent scalability owing to their relatively simple device architecture. In this review, recent progress on the development of reticular material-based RRAM devices and the study of their operational mechanisms are reviewed, and new challenges and future perspectives related to reticular material-based RRAM are discussed.

Statistical Analysis of Uniform Switching Characteristics of Ta2O5-Based Memristors by Embedding In-Situ Grown 2D-MoS2 Buffer Layers

A memristor based on emerging resistive random-access memory (RRAM) is a promising candidate for use as a next-generation neuromorphic computing device which overcomes the von Neumann bottleneck. Meanwhile, due to their unique properties, including atomically thin layers and surface smoothness, two-dimensional (2D) materials are being widely studied for implementation in the development of new information-processing electronic devices. However, inherent drawbacks concerning operational uniformities, such as device-to-device variability, device yield, and reliability, are huge challenges in the realization of concrete memristor hardware devices. In this study, we fabricated Ta₂O₅-based memristor devices, where a 2D-MoS₂ buffer layer was directly inserted between the Ta₂O₅ switching layer and the Ag metal electrode to improve uniform switching characteristics in terms of switching voltage, the distribution of resistance states, endurance, and retention. A 2D-MoS₂ layered buffer film with a 5 nm thickness was directly grown on the Ta₂O₅ switching layer by the atomic-pressure plasma-enhanced chemical vapor deposition (AP-PECVD) method, which is highly uniform and provided a superior yield of 2D-MoS₂ film. It was observed that the switching operation was dramatically stabilized via the introduction of the 2D-MoS₂ buffer layer compared to a pristine device without the buffer layer. It was assumed that the difference in mobility and reduction rates between Ta₂O₅ and MoS₂ caused the narrow localization of ion migration, inducing the formation of more stable conduction filament. In addition, an excellent yield of 98% was confirmed while showing cell-to-cell operation uniformity, and the extrinsic and intrinsic variabilities in operating the device were highly uniform. Thus, the introduction of a MoS₂ buffer layer could improve highly reliable memristor device switching operation.

4K-memristor analog-grade passive crossbar circuit

The superior density of passive analog-grade memristive crossbar circuits enables storing large neural network models directly on specialized neuromorphic chips to avoid costly off-chip communication. To ensure efficient use of such circuits in neuromorphic systems, memristor variations must be substantially lower than those of active memory devices. Here we report a 64 × 64 passive crossbar circuit with ~99% functional nonvolatile metal-oxide memristors. The fabrication technology is based on a foundry-compatible process with etch-down patterning and a low-temperature budget. The achieved <26% coefficient of variance in memristor switching voltages is sufficient for programming a 4K-pixel gray-scale pattern with a <4% relative tuning error on average. Analog properties are also successfully verified via experimental demonstration of a 64 × 10 vector-by-matrix multiplication with an average 1% relative conductance import accuracy to model the MNIST image classification by ex-situ trained single-layer perceptron, and modeling of a large-scale multilayer perceptron classifier based on more advanced conductance tuning algorithm.

The superior density of passive analog memristive devices can potentially enable efficient implementation of very large scale neural networks; however, device to device variability is currently too large to take advantage of this. Here, Kim et al demonstrate an impressive reduction in this variability, with a large passive memristive array.

Cointegration of single-transistor neurons and synapses by nanoscale CMOS fabrication for highly scalable neuromorphic hardware

Cointegration of multistate single-transistor neurons and synapses was demonstrated for highly scalable neuromorphic hardware, using nanoscale complementary metal-oxide semiconductor (CMOS) fabrication. The neurons and synapses were integrated on the same plane with the same process because they have the same structure of a metal-oxide semiconductor field-effect transistor with different functions such as homotype. By virtue of 100% CMOS compatibility, it was also realized to cointegrate the neurons and synapses with additional CMOS circuits. Such cointegration can enhance packing density, reduce chip cost, and simplify fabrication procedures. The multistate single-transistor neuron that can control neuronal inhibition and the firing threshold voltage was achieved for an energy-efficient and reliable neural network. Spatiotemporal neuronal functionalities are demonstrated with fabricated single-transistor neurons and synapses. Image processing for letter pattern recognition and face image recognition is performed using experimental-based neuromorphic simulation.

Self-rectifying resistive memory in passive crossbar arrays

Conventional computing architectures are poor suited to the unique workload demands of deep learning, which has led to a surge in interest in memory-centric computing. Herein, a trilayer (Hf0.8Si0.2O2/Al2O3/Hf0.5Si0.5O2)-based self-rectifying resistive memory cell (SRMC) that exhibits (i) large selectivity (ca. 104), (ii) two-bit operation, (iii) low read power (4 and 0.8 nW for low and high resistance states, respectively), (iv) read latency (<10 μs), (v) excellent non-volatility (data retention >104 s at 85 °C), and (vi) complementary metal-oxide-semiconductor compatibility (maximum supply voltage ≤5 V) is introduced, which outperforms previously reported SRMCs. These characteristics render the SRMC highly suitable for the main memory for memory-centric computing which can improve deep learning acceleration. Furthermore, the low programming power (ca. 18 nW), latency (100 μs), and endurance (>106) highlight the energy-efficiency and highly reliable random-access memory of our SRMC. The feasible operation of individual SRMCs in passive crossbar arrays of different sizes (30 × 30, 160 × 160, and 320 × 320) is attributed to the large asymmetry and nonlinearity in the current-voltage behavior of the proposed SRMC, verifying its potential for application in large-scale and high-density non-volatile memory for memory-centric computing.

Giant Ferroelectric Resistance Switching Controlled by a Modulatory Terminal for Low-Power Neuromorphic In-Memory Computing

Ferroelectrics have been demonstrated as excellent building blocks for high-performance nonvolatile memories, including memristors, which play critical roles in the hardware implementation of artificial synapses and in-memory computing. Here, it is reported that the emerging van der Waals ferroelectric α-In₂ Se₃ can be used to successfully implement heterosynaptic plasticity (a fundamental but rarely emulated synaptic form) and achieve a resistance-switching ratio of heterosynaptic memristors above 10³ , which is two orders of magnitude larger than that in other similar devices. The polarization change of ferroelectric α-In₂ Se₃ channel is responsible for the resistance switching at various paired terminals. The third terminal of α-In₂ Se₃ memristors exhibits nonvolatile control over channel current at a picoampere level, endowing the devices with picojoule read-energy consumption to emulate the associative heterosynaptic learning. The simulation proves that both supervised and unsupervised learning manners can be implemented in α-In₂ Se₃ neutral networks with high image recognition accuracy. Moreover, these heterosynaptic devices can naturally realize Boolean logic without an additional circuit component. The results suggest that van der Waals ferroelectrics hold great potential for applications in complex, energy-efficient, brain-inspired computing systems and logic-in-memory computers.

A Versatile, Voltage-Pulse Based Read and Programming Circuit for Multi-Level RRAM Cells

In this work, we present an integrated read and programming circuit for Resistive Random Access Memory (RRAM) cells. Since there are a lot of different RRAM technologies in research and the process variations of this new memory technology often spread over a wide range of electrical properties, the proposed circuit focuses on versatility in order to be adaptable to different cell properties. The circuit is suitable for both read and programming operations based on voltage pulses of flexible length and height. The implemented read method is based on evaluating the voltage drop over a measurement resistor and can distinguish up to eight different states, which are coded in binary, thereby realizing a digitization of the analog memory value. The circuit was fabricated in the 130 nm CMOS process line of IHP. The simulations were done using a physics-based, multi-level RRAM model. The measurement results prove the functionality of the read circuit and the programming system and demonstrate that the read system can distinguish up to eight different states with an overall resistance ratio of 7.9.

Recent Progress in Solution-Based Metal Oxide Resistive Switching Devices

Metal oxide resistive switching memories have been a crucial component for the requirements of the Internet of Things, which demands ultra-low power and high-density devices with new computing principles, exploiting low cost green products and technologies. Most of the reported resistive switching devices use conventional methods (physical and chemical vapor deposition), which are quite expensive due to their up-scale production. Solution-processing methods have been improved, being now a reliable technology that offers many advantages for resistive random-access memory (RRAM) such as high versatility, large area uniformity, transparency, low-cost and a simple fabrication of two-terminal structures. Solution-based metal oxide RRAM devices are emergent and promising non-volatile memories for future electronics. In this review, a brief history of non-volatile memories is highlighted as well as the present status of solution-based metal oxide resistive random-access memory (S-RRAM). Then, a focus on describing the solution synthesis parameters of S-RRAMs which induce a massive influence in the overall performance of these devices is discussed. Next, a precise analysis is performed on the metal oxide thin film and electrode interface and the recent advances on S-RRAM that will allow their large-area manufacturing. Finally, the figures of merit and the main challenges in S-RRAMs are discussed and future trends are proposed.