Research progress on solutions to the sneak path issue in memristor crossbar arrays

Improving ion uptake in artificial synapses through facilitated diffusion mechanisms

Several studies have explored ways to enhance the interaction between the channel layer and ions to realize artificial synapses using organic electrochemical transistors (OECTs). The attachment of glycol side chains can remarkably enhance the ion transport to improve nonvolatile properties via polar groups; however, a comprehensive and methodical evaluation of this phenomenon has yet to be conducted. In this study, we observed the reactivity toward ions and the doping mechanism that changes by glycol group substitution to the side chains of DPP polymers. The analysis revealed that in the presence of glycol chains, the doping mechanism changes to diffusion-dominated, which allows ions to penetrate the channel and interact with it more intensely, thereby enhancing synaptic performance. The fabricated devices successfully mimicked the behavior of biological synapses, such as good long-term synaptic plasticity (LTP), paired-pulse facilitation (PPF), and long-term potentiation/depression (LTP/D). Based on these properties, a high accuracy of 93.7% has been achieved in an artificial neural network for handwritten data recognition at the Modified national institute of standards and technology (MNIST). These findings provide new insights for the realization of artificial synapses and could inspire other research involving reactions with ions.

Low-Power Memristor for Neuromorphic Computing: From Materials to Applications

As an emerging memory device, memristor shows great potential in neuromorphic computing applications due to its advantage of low power consumption. This review paper focuses on the application of low-power-based memristors in various aspects. The concept and structure of memristor devices are introduced. The selection of functional materials for low-power memristors is discussed, including ion transport materials, phase change materials, magnetoresistive materials, and ferroelectric materials. Two common types of memristor arrays, 1T1R and 1S1R crossbar arrays are introduced, and physical diagrams of edge computing memristor chips are discussed in detail. Potential applications of low-power memristors in advanced multi-value storage, digital logic gates, and analogue neuromorphic computing are summarized. Furthermore, the future challenges and outlook of neuromorphic computing based on memristor are deeply discussed.

In-memory ferroelectric differentiator

Differential calculus is the cornerstone of many disciplines, spanning the breadth of modern mathematics, physics, computer science, and engineering. Its applications are fundamental to theoretical progress and practical solutions. However, the current state of digital differential technology often requires complex implementations, which struggle to meet the extensive demands of the ubiquitous edge computing in the intelligence age. To face these challenges, we propose an in-memory differential computation that capitalizes on the dynamic behavior of ferroelectric domain reversal to efficiently extract information differences. This strategy produces differential information directly within the memory itself, which considerably reduces the volume of data transmission and operational energy consumption. We successfully illustrate the effectiveness of this technique in a variety of tasks, including derivative function solving, the moving object extraction and image discrepancy identification, using an in-memory differentiator constructed with a crossbar array of 1600-unit ferroelectric polymer capacitors. Our research offers an efficient hardware analogue differential computing, which is crucial for accelerating mathematical processing and real-time visual feedback systems.

Vertical Memristive Crossbar Array for Multilayer Graph Embedding and Analysis

Graph data structures effectively represent objects and their relationships, enabling the modeling of complex connections in various fields. Recent work demonstrate that metal at diagonal crossbar arrays (m-CBA) can effectively represent planar graphs. However, they are unsuitable for representing multilayer graphs having multiple relationships across different layers. Using conventional software, embedding multilayer graphs in high-dimensional Euclidean spaces introduces significant mathematical complexity and computational burden, often resulting in information loss. This study proposes a unique graph embedding (mapping) method utilizing a fabricated vertical m-CBA (vm-CBA), where a custom-built measurement system thoroughly validated its functionality. This structure directly maps multilayer graphs into a 3D vm-CBA, accurately representing inter-layer and intra-layer connections. The practical link prediction and information scores across various real-world datasets demonstrated that vm-CBA achieved enhanced accuracy compared to conventional embeddings, even with a significantly decreased number of operations.

HfO2-based ferroelectric synaptic devices: challenges and engineering solutions

HfO2-based ferroelectric memories have garnered significant attention for their potential to serve as artificial synaptic devices owing to their scalability and CMOS compatibility. This review examines the key material properties and challenges associated with HfO2-based ferroelectric artificial synaptic devices as well as the recent advancements in engineering strategies to improve their synaptic performance. The fundamental physics and material properties of HfO2-based ferroelectrics are reviewed to understand the theoretical origin of the aforementioned technical issues in ferroelectric HfO2-based synaptic devices. Based on the understanding, strategies to resolve the various technical issues from the device to array level are discussed, along with reviewing important progresses in recent studies. Based on these recent technical advancements, new perspectives to achieve high performance and highly reliable HfO2-based ferroelectric synaptic devices and their array are provided.

Van der Waals Engineering of One-Transistor-One-Ferroelectric-Memristor Architecture for an Energy-Efficient Neuromorphic Array

Two-dimensional-material-based memristor arrays hold promise for data-centric applications such as artificial intelligence and big data. However, accessing individual memristor cells and effectively controlling sneak current paths remain challenging. Here, we propose a van der Waals engineering approach to create one-transistor-one-memristor (1T1M) cells by assembling the emerging two-dimensional ferroelectric CuCrP2S6 with MoS2 and h-BN. The memory cell exhibits high resistance tunability (106), low sneak current (120 fA), and low static power (12 fW). A neuromorphic array with greatly reduced crosstalk is experimentally demonstrated. The nonvolatile resistance switching is driven by electric-field-induced ferroelectric polarization reversal. This van der Waals engineering approach offers a universal solution for creating compact and energy-efficient 2D in-memory computation systems for next-generation artificial neural networks.

Improving Reliability of 1 Selector-1 ReRAM Crossbar Arrays Through Hybrid Switching Methods

In this study, an innovative switching approach is explored to improve the reliability of 1 Selector-1 ReRAM (1S1R) devices, integrated into a 4K crossbar array (CBA). The key innovation is the use of DC sweeping for set operations and AC single-pulse resetting to minimize device stress and prevent breakdown. The selector, based on a GeSeTe ovonic threshold switching (OTS) element, demonstrated excellent endurance (>1012 cycles), fast switching (<100 ns), and high device-to-device uniformity (<5% variability). The ReRAM, constructed with Pt/LiNbOx/W, exhibited robust bipolar resistive switching, multi-bit capability, and endurance exceeding 1012 cycles. The integrated 1S1R CBA demonstrated reliable retention and low variability in operation, showing potential for high-performance, high-density memory applications.

Two-Dimensional Materials for Brain-Inspired Computing Hardware

Recent breakthroughs in brain-inspired computing promise to address a wide range of problems from security to healthcare. However, the current strategy of implementing artificial intelligence algorithms using conventional silicon hardware is leading to unsustainable energy consumption. Neuromorphic hardware based on electronic devices mimicking biological systems is emerging as a low-energy alternative, although further progress requires materials that can mimic biological function while maintaining scalability and speed. As a result of their diverse unique properties, atomically thin two-dimensional (2D) materials are promising building blocks for next-generation electronics including nonvolatile memory, in-memory and neuromorphic computing, and flexible edge-computing systems. Furthermore, 2D materials achieve biorealistic synaptic and neuronal responses that extend beyond conventional logic and memory systems. Here, we provide a comprehensive review of the growth, fabrication, and integration of 2D materials and van der Waals heterojunctions for neuromorphic electronic and optoelectronic devices, circuits, and systems. For each case, the relationship between physical properties and device responses is emphasized followed by a critical comparison of technologies for different applications. We conclude with a forward-looking perspective on the key remaining challenges and opportunities for neuromorphic applications that leverage the fundamental properties of 2D materials and heterojunctions.

Influence of the TiN diffusion barrier on the leakage current and ferroelectricity in an Al-doped HfOx ferroelectric memristor and its application to neuromorphic computing

The HfOx-based ferroelectric memristor is in the spotlight due to its complementary metal-oxide-semiconductor compatibility and scaling compared to existing perovskite-based ferroelectric memory. However, ferroelectric properties vary depending on the coefficient of thermal expansion of the top electrode, which is caused by strain engineering. When tungsten (W) with a small coefficient of thermal expansion is used as an electrode, the ferroelectric properties are improved, although the reliability is poor due to the diffusion of W atoms. Here, TiN can be used to prevent the diffusion of W. This metal nitride successfully suppresses the leakage current and induces a larger remanent polarization of 19.7 μC cm-2, a smaller coercive voltage of 9.26 V, and a faster switching speed. W/TiN/HAO/n+ Si can also exhibit multi-level characteristics and achieve a 10% read margin in 320 × 320 arrays. Ferroelectrics can also be applied to neuromorphic computing by imitating synaptic properties such as potentiation, depression, paired-pulse facilitation, and excitatory postsynaptic current. Using short-term plasticity, successful implementation in reservoir computing is also realized, achieving 95% classification accuracy. This paper shows promise for the use of memristors in artificial neural networks.

Linear symmetric self-selecting 14-bit kinetic molecular memristors

Artificial Intelligence (AI) is the domain of large resource-intensive data centres that limit access to a small community of developers1,2. Neuromorphic hardware promises greatly improved space and energy efficiency for AI but is presently only capable of low-accuracy operations, such as inferencing in neural networks3-5. Core computing tasks of signal processing, neural network training and natural language processing demand far higher computing resolution, beyond that of individual neuromorphic circuit elements6-8. Here we introduce an analog molecular memristor based on a Ru-complex of an azo-aromatic ligand with 14-bit resolution. Precise kinetic control over a transition between two thermodynamically stable molecular electronic states facilitates 16,520 distinct analog conductance levels, which can be linearly and symmetrically updated or written individually in one time step, substantially simplifying the weight update procedure over existing neuromorphic platforms3. The circuit elements are unidirectional, facilitating a selector-less 64 × 64 crossbar-based dot-product engine that enables vector-matrix multiplication, including Fourier transform, in a single time step. We achieved more than 73 dB signal-to-noise-ratio, four orders of magnitude improvement over the state-of-the-art methods9-11, while consuming 460× less energy than digital computers12,13. Accelerators leveraging these molecular crossbars could transform neuromorphic computing, extending it beyond niche applications and augmenting the core of digital electronics from the cloud to the edge12,13.

Multimodal Artificial Synapses for Neuromorphic Application

The rapid development of neuromorphic computing has led to widespread investigation of artificial synapses. These synapses can perform parallel in-memory computing functions while transmitting signals, enabling low-energy and fast artificial intelligence. Robots are the most ideal endpoint for the application of artificial intelligence. In the human nervous system, there are different types of synapses for sensory input, allowing for signal preprocessing at the receiving end. Therefore, the development of anthropomorphic intelligent robots requires not only an artificial intelligence system as the brain but also the combination of multimodal artificial synapses for multisensory sensing, including visual, tactile, olfactory, auditory, and taste. This article reviews the working mechanisms of artificial synapses with different stimulation and response modalities, and presents their use in various neuromorphic tasks. We aim to provide researchers in this frontier field with a comprehensive understanding of multimodal artificial synapses.

A memristive-photoconductive transduction methodology for accurately nondestructive memory readout

Crossbar resistive memory architectures enable high-capacity storage and neuromorphic computing, accurate retrieval of the stored information is a prerequisite during read operation. However, conventional electrical readout normally suffer from complicated process, inaccurate and destructive reading due to crosstalk effect from sneak path current. Here we report a memristive-photoconductive transduction (MPT) methodology for precise and nondestructive readout in a memristive crossbar array. The individual devices present dynamic filament form/fuse for resistance modulation under electric stimulation, which leads to photogenerated carrier transport for tunable photoconductive response under subsequently light pulse stimuli. This coherent signal transduction can be used to directly detect the memorized on/off states stored in each cell, and a prototype 4 * 4 crossbar memories has been constructed and validated for the fidelity of crosstalk-free readout in recall process.

Electrical switching properties of Ag2S/Cu3P under light and heat excitation

In this paper, we prepared and investigated the electrical switching behaviors of Cu3P/Ag2S heterojunction in the absence/presence of light/heat excitation. The structure exhibited bipolar memristor characteristics. The resistive switching mechanism is due to the formation of Ag conductive filaments and phase transition in Cu3P. We found that the resistance ratio (ROFF/RON) increased by a factor of 1.4/1.8 after light/heat excitation. The underlying mechanism was due to the photoelectric effect/Seebeck effect. Our results are helpful for the understanding of the resistive switching performance of Cu3P/Ag2S junctions, providing valuable insights into the factors influencing resistive switching performance and a clue for the enhancement of the memristor performance.

Two-dimensional material-based memristive devices for alternative computing

Two-dimensional (2D) materials have emerged as promising building blocks for next generation memristive devices, owing to their unique electronic, mechanical, and thermal properties, resulting in effective switching mechanisms for charge transport. Memristors are key components in a wide range of applications including neuromorphic computing, which is becoming increasingly important in artificial intelligence applications. Crossbar arrays are an important component in the development of hardware-based neural networks composed of 2D materials. In this paper, we summarize the current state of research on 2D material-based memristive devices utilizing different switching mechanisms, along with the application of these devices in neuromorphic crossbar arrays. Additionally, we discuss the challenges and future directions for the field.

New-Generation Ferroelectric AlScN Materials

Ferroelectrics have great potential in the field of nonvolatile memory due to programmable polarization states by external electric field in nonvolatile manner. However, complementary metal oxide semiconductor compatibility and uniformity of ferroelectric performance after size scaling have always been two thorny issues hindering practical application of ferroelectric memory devices. The emerging ferroelectricity of wurtzite structure nitride offers opportunities to circumvent the dilemma. This review covers the mechanism of ferroelectricity and domain dynamics in ferroelectric AlScN films. The performance optimization of AlScN films grown by different techniques is summarized and their applications for memories and emerging in-memory computing are illustrated. Finally, the challenges and perspectives regarding the commercial avenue of ferroelectric AlScN are discussed.

Memristor-Based Neuromorphic Chips

In the era of information, characterized by an exponential growth in data volume and an escalating level of data abstraction, there has been a substantial focus on brain-like chips, which are known for their robust processing power and energy-efficient operation. Memristors are widely acknowledged as the optimal electronic devices for the realization of neuromorphic computing, due to their innate ability to emulate the interconnection and information transfer processes witnessed among neurons. This review paper focuses on memristor-based neuromorphic chips, which provide an extensive description of the working principle and characteristic features of memristors, along with their applications in the realm of neuromorphic chips. Subsequently, a thorough discussion of the memristor array, which serves as the pivotal component of the neuromorphic chip, as well as an examination of the present mainstream neural networks, is delved. Furthermore, the design of the neuromorphic chip is categorized into three crucial sections, including synapse-neuron cores, networks on chip (NoC), and neural network design. Finally, the key performance metrics of the chip is highlighted, as well as the key metrics related to the memristor devices are employed to realize both the synaptic and neuronal components.

Unveiling the Role of Side Chain for Improving Nonvolatile Characteristics of Conjugated Polymers-Based Artificial Synapse

Interest has grown in services that consume a significant amount of energy, such as large language models (LLMs), and research is being conducted worldwide on synaptic devices for neuromorphic hardware. However, various complex processes are problematic for the implementation of synaptic properties. Here, synaptic characteristics are implemented through a novel method, namely side chain control of conjugated polymers. The developed devices exhibit the characteristics of the biological brain, especially spike-timing-dependent plasticity (STDP), high-pass filtering, and long-term potentiation/depression (LTP/D). Moreover, the fabricated synaptic devices show enhanced nonvolatile characteristics, such as long retention time (≈102 s), high ratio of Gmax/Gmin, high linearity, and reliable cyclic endurance (≈103 pulses). This study presents a new pathway for next-generation neuromorphic computing by modulating conjugated polymers with side chain control, thereby achieving high-performance synaptic properties.

High-Reliability and Self-Rectifying Alkali Ion Memristor through Bottom Electrode Design and Dopant Incorporation

Ionic memristor devices are crucial for efficient artificial neural network computations in neuromorphic hardware. They excel in multi-bit implementation but face challenges like device reliability and sneak currents in crossbar array architecture (CAA). Interface-type ionic memristors offer low variation, self-rectification, and no forming process, making them suitable for CAA. However, they suffer from slow weight updates and poor retention and endurance. To address these issues, the study demonstrated an alkali ion self-rectifying memristor with an alkali metal reservoir formed by a bottom electrode design. By adopting Li metal as the adhesion layer of the bottom electrode, an alkali ion reservoir was formed at the bottom of the memristor layer by diffusion occurring during the atomic layer deposition process for the Na:TiO2 memristor layer. In addition, Al dopant was used to improve the retention characteristics by suppressing the diffusion of alkali cations. In the memristor device with optimized Al doping, retention characteristics of more than 20 h at 125 °C, endurance characteristics of more than 5.5 × 105, and high linearity/symmetry of weight update characteristics were achieved. In reliability tests on 100 randomly selected devices from a 32 × 32 CAA device, device-to-device and cycle-to-cycle variations showed low variation values within 81% and 8%, respectively.

Interfacial Resistive Switching of Niobium-Titanium Anodic Memristors with Self-Rectifying Capabilities

A broad compositional range of Nb-Ti anodic memristors with volatile and self-rectifying behaviour was studied using a combinatorial screening approach. A Nb-Ti thin-film combinatorial library was co-deposited by sputtering, serving as the bottom electrode for the memristive devices. The library, with a compositional spread ranging between 22 and 64 at.% Ti was anodically oxidised, the mixed oxide being the active layer in MIM-type structures completed by Pt discreet top electrode patterning. By studying I-U sweeps, memristors with self-rectifying and volatile behaviour were identified. Moreover, all the analysed memristors demonstrated multilevel properties. The best-performing memristors showed HRS/LRS (high resistive state/low resistive state) ratios between 4 and 6 × 105 and very good retention up to 106 successive readings. The anodic memristors grown along the compositional spread showed very good endurance up to 106 switching cycles, excluding those grown from alloys containing between 31 and 39 at.% Ti, which withstood only 10 switching cycles. Taking into consideration all the parameters studied, the Nb-46 at.% Ti composition was screened as the parent metal alloy composition, leading to the best-performing anodic memristor in this alloy system. The results obtained suggest that memristive behaviour is based on an interfacial non-filamentary type of resistive switching, which is consistent with the performed cross-sectional TEM structural and chemical characterisation.

Adapted MLP-Mixer network based on crossbar arrays of fast and multilevel switching (Co-Fe-B)x(LiNbO3)100-x nanocomposite memristors

MLP-Mixer based on multilayer perceptrons (MLPs) is a novel architecture of a neuromorphic computing system (NCS) introduced for image classification tasks without convolutional layers. Its software realization demonstrates high classification accuracy, although the number of trainable weights is relatively low. One more promising way of improving the NCS performance, especially in terms of power consumption, is its hardware realization using memristors. Therefore, in this work, we proposed an NCS with an adapted MLP-Mixer architecture and memristive weights. For this purpose, we used a passive crossbar array of (Co-Fe-B)x(LiNbO3)100-x memristors. Firstly, we studied the characteristics of such memristors, including their minimal resistive switching time, which was extrapolated to be in the picosecond range. Secondly, we created a fully hardware NCS with memristive weights that are capable of classification of simple 4-bit vectors. The system was shown to be robust to noise introduction in the input patterns. Finally, we used experimental memristive characteristics to simulate an adapted MLP-Mixer architecture that demonstrated a classification accuracy of (94.7 ± 0.3)% on the Modified National Institute of Standards and Technology (MNIST) dataset. The obtained results are the first steps toward the realization of memristive NCS with a promising MLP-Mixer architecture.

Implementation of Convolutional Neural Networks in Memristor Crossbar Arrays with Binary Activation and Weight Quantization

We propose a hardware-friendly architecture of a convolutional neural network using a 32 × 32 memristor crossbar array having an overshoot suppression layer. The gradual switching characteristics in both set and reset operations enable the implementation of a 3-bit multilevel operation in a whole array that can be utilized as 16 kernels. Moreover, a binary activation function mapped to the read voltage and ground is introduced to evaluate the result of training with a boundary of 0.5 and its estimated gradient. Additionally, we adopt a fixed kernel method, where inputs are sequentially applied to a crossbar array with a differential memristor pair scheme, reducing unused cell waste. The binary activation has robust characteristics against device state variations, and a neuron circuit is experimentally demonstrated on a customized breadboard. Thanks to the analogue switching characteristics of the memristor device, the accurate vector-matrix multiplication (VMM) operations can be experimentally demonstrated by combining sequential inputs and the weights obtained through tuning operations in the crossbar array. In addition, the feature images extracted by VMM during the hardware inference operations on 100 test samples are classified, and the classification performance by off-chip training is compared with the software results. Finally, inference results depending on the tolerance are statistically verified through several tuning cycles.

Filament-free memristors for computing

Memristors have attracted increasing attention due to their tremendous potential to accelerate data-centric computing systems. The dynamic reconfiguration of memristive devices in response to external electrical stimuli can provide highly desirable novel functionalities for computing applications when compared with conventional complementary-metal-oxide-semiconductor (CMOS)-based devices. Those most intensively studied and extensively reviewed memristors in the literature so far have been filamentary type memristors, which typically exhibit a relatively large variability from device to device and from switching cycle to cycle. On the other hand, filament-free switching memristors have shown a better uniformity and attractive dynamical properties, which can enable a variety of new computing paradigms but have rarely been reviewed. In this article, a wide range of filament-free switching memristors and their corresponding computing applications are reviewed. Various junction structures, switching properties, and switching principles of filament-free memristors are surveyed and discussed. Furthermore, we introduce recent advances in different computing schemes and their demonstrations based on non-filamentary memristors. This Review aims to present valuable insights and guidelines regarding the key computational primitives and implementations enabled by these filament-free switching memristors.

Porous crystalline materials for memories and neuromorphic computing systems

Porous crystalline materials usually include metal-organic frameworks (MOFs), covalent organic frameworks (COFs), hydrogen-bonded organic frameworks (HOFs) and zeolites, which exhibit exceptional porosity and structural/composition designability, promoting the increasing attention in memory and neuromorphic computing systems in the last decade. From both the perspective of materials and devices, it is crucial to provide a comprehensive and timely summary of the applications of porous crystalline materials in memory and neuromorphic computing systems to guide future research endeavors. Moreover, the utilization of porous crystalline materials in electronics necessitates a shift from powder synthesis to high-quality film preparation to ensure high device performance. This review highlights the strategies for preparing porous crystalline materials films and discusses their advancements in memory and neuromorphic electronics. It also provides a detailed comparative analysis and presents the existing challenges and future research directions, which can attract the experts from various fields (e.g., materials scientists, chemists, and engineers) with the aim of promoting the applications of porous crystalline materials in memory and neuromorphic computing systems.

Two-Terminal MoS2 Memristor and the Homogeneous Integration with a MoS2 Transistor for Neural Networks

Memristors are promising candidates for constructing neural networks. However, their dissimilar working mechanism to that of the addressing transistors can result in a scaling mismatch, which may hinder efficient integration. Here, we demonstrate two-terminal MoS₂ memristors that work with a charge-based mechanism similar to that in transistors, which enables the homogeneous integration with MoS₂ transistors to realize one-transistor-one-memristor addressable cells for assembling programmable networks. The homogenously integrated cells are implemented in a 2 × 2 network array to demonstrate the enabled addressability and programmability. The potential for assembling a scalable network is evaluated in a simulated neural network using obtained realistic device parameters, which achieves over 91% pattern recognition accuracy. This study also reveals a generic mechanism and strategy that can be applied to other semiconducting devices for the engineering and homogeneous integration of memristive systems.

Ultralow-power in-memory computing based on ferroelectric memcapacitor network

Analog storage through synaptic weights using conductance in resistive neuromorphic systems and devices inevitably generates harmful heat dissipation. This thermal issue not only limits the energy efficiency but also hampers the very-large-scale and highly complicated hardware integration as in the human brain. Here we demonstrate that the synaptic weights can be simulated by reconfigurable non-volatile capacitances of a ferroelectric-based memcapacitor with ultralow-power consumption. The as-designed metal/ferroelectric/metal/insulator/semiconductor memcapacitor shows distinct 3-bit capacitance states controlled by the ferroelectric domain dynamics. These robust memcapacitive states exhibit uniform maintenance of more than 104 s and well endurance of 109 cycles. In a wired memcapacitor crossbar network hardware, analog vector-matrix multiplication is successfully implemented to classify 9-pixel images by collecting the sum of displacement currents (I = C × dV/dt) in each column, which intrinsically consumes zero energy in memcapacitors themselves. Our work sheds light on an ultralow-power neural hardware based on ferroelectric memcapacitors.

Recent progress in bio-voltage memristors working with ultralow voltage of biological amplitude

Neuromorphic systems built from memristors that emulate bioelectrical information processing in the brain may overcome the limitations of traditional computing architectures. However, functional emulation alone may still not attain all the merits of bio-computation, which uses action potentials of 50-120 mV at least 10 times lower than signal amplitude in conventional electronics to achieve extraordinary power efficiency and effective functional integration. Reducing the functional voltage in memristors to this biological amplitude can thus advance neuromorphic engineering and bio-emulated integration. This review aims to provide a timely update on the effort and progress in this burgeoning research direction, covering the aspects of device material composition, performance, working mechanism, and potential application.

Highly Reliable Ovonic Threshold Switch with TiN/GeTe/TiN Structure

A new architecture has become necessary owing to the power consumption and latency problems of the von Neumann architecture. A neuromorphic memory system is a promising candidate for the new system as it has the potential to process large amounts of digital information. A crossbar array (CA), which consists of a selector and a resistor, is the basic building block for the new system. Despite the excellent prospects of crossbar arrays, the biggest obstacle for them is sneak current, which can cause a misreading between the adjacent memory cells, thus resulting in a misoperation in the arrays. The chalcogenide-based ovonic threshold switch (OTS) is a powerful selector with highly nonlinear I-V characteristics that can be used to address the sneak current problem. In this study, we evaluated the electrical characteristics of an OTS with a TiN/GeTe/TiN structure. This device shows nonlinear DC I-V characteristics, an excellent endurance of up to 10⁹ in the burst read measurement, and a stable threshold voltage below 15 mV/dec. In addition, at temperatures below 300 °C, the device exhibits good thermal stability and retains an amorphous structure, which is a strong indication of the aforementioned electrical characteristics.

Laser printed microelectronics

Printed organic and inorganic electronics continue to be of large interest for sensors, bioelectronics, and security applications. Many printing techniques have been investigated, albeit often with typical minimum feature sizes in the tens of micrometer range and requiring post-processing procedures at elevated temperatures to enhance the performance of functional materials. Herein, we introduce laser printing with three different inks, for the semiconductor ZnO and the metals Pt and Ag, as a facile process for fabricating printed functional electronic devices with minimum feature sizes below 1 µm. The ZnO printing is based on laser-induced hydrothermal synthesis. Importantly, no sintering of any sort needs to be performed after laser printing for any of the three materials. To demonstrate the versatility of our approach, we show functional diodes, memristors, and a physically unclonable function based on a 6 × 6 memristor crossbar architecture. In addition, we realize functional transistors by combining laser printing and inkjet printing.

Highly-scaled and fully-integrated 3-dimensional ferroelectric transistor array for hardware implementation of neural networks

Hardware-based neural networks (NNs) can provide a significant breakthrough in artificial intelligence applications due to their ability to extract features from unstructured data and learn from them. However, realizing complex NN models remains challenging because different tasks, such as feature extraction and classification, should be performed at different memory elements and arrays. This further increases the required number of memory arrays and chip size. Here, we propose a three-dimensional ferroelectric NAND (3D FeNAND) array for the area-efficient hardware implementation of NNs. Vector-matrix multiplication is successfully demonstrated using the integrated 3D FeNAND arrays, and excellent pattern classification is achieved. By allocating each array of vertical layers in 3D FeNAND as the hidden layer of NN, each layer can be used to perform different tasks, and the classification of color-mixed patterns is achieved. This work provides a practical strategy to realize high-performance and highly efficient NN systems by stacking computation components vertically.

An Effective Sneak-Path Solution Based on a Transient-Relaxation Device

An efficient strategy for addressing individual devices is required to unveil the full potential of memristors for high-density memory and computing applications. Existing strategies using two-terminal selectors that are preferable for compact integration have trade-offs in reduced generality or functional window. A strategy that applies to broad memristors and maintains their full-range functional window is proposed. This strategy uses a type of unipolar switch featuring a transient relaxation or retention as the selector. The unidirectional current flow in the switch suppresses the sneak-path current, whereas the transient-relaxation window is exploited for bidirectional programming. A unipolar volatile memristor with ultralow switching voltage (e.g., <100 mV), constructed from a protein nanowire dielectric harvested from Geobacter sulfurreducens, is specifically employed as the example switch to highlight the advantages and scalability in the strategy for array integration.

Uniform self-rectifying resistive random-access memory based on an MXene-TiO2 Schottky junction

For filamentary resistive random-access memory (RRAM) devices, the switching behavior between different resistance states usually occurs abruptly, while the random formation of conductive filaments usually results in large fluctuations in resistance states, leading to poor uniformity. Schottky barrier modulation enables resistive switching through charge trapping/de-trapping at the top-electrode/oxide interface, which is effective for improving the uniformity of RRAM devices. Here, we report a uniform RRAM device based on a MXene-TiO2 Schottky junction. The defect traps within the MXene formed during its fabricating process can trap and release the charges at the MXene-TiO2 interface to modulate the Schottky barrier for the resistive switching behavior. Our devices exhibit excellent current on-off ratio uniformity, device-to-device reproducibility, long-term retention, and endurance reliability. Due to the different carrier-blocking abilities of the MXene-TiO2 and TiO2-Si interface barriers, a self-rectifying behavior can be obtained with a rectifying ratio of 103, which offers great potential for large-scale RRAM applications based on MXene materials.

A Bioinspired Artificial Injury Response System Based on a Robust Polymer Memristor to Mimic a Sense of Pain, Sign of Injury, and Healing

Flexible electronic skin with features that include sensing, processing, and responding to stimuli have transformed human-robot interactions. However, more advanced capabilities, such as human-like self-protection modalities with a sense of pain, sign of injury, and healing, are more challenging. Herein, a novel, flexible, and robust diffusive memristor based on a copolymer of chlorotrifluoroethylene and vinylidene fluoride (FK-800) as an artificial nociceptor (pain sensor) is reported. Devices composed of Ag/FK-800/Pt have outstanding switching endurance >106  cycles, orders of magnitude higher than any other two-terminal polymer/organic memristors in literature (typically 102 -103 cycles). In situ conductive atomic force microscopy is employed to dynamically switch individual filaments, which demonstrates that conductive filaments correlate with polymer grain boundaries and FK-800 has superior morphological stability under repeated switching cycles. It is hypothesized that the high thermal stability and high elasticity of FK-800 contribute to the stability under local Joule heating associated with electrical switching. To mimic biological nociceptors, four signature nociceptive characteristics are demonstrated: threshold triggering, no adaptation, relaxation, and sensitization. Lastly, by integrating a triboelectric generator (artificial mechanoreceptor), memristor (artificial nociceptor), and light emitting diode (artificial bruise), the first bioinspired injury response system capable of sensing pain, showing signs of injury, and healing, is demonstrated.

CMOS-compatible compute-in-memory accelerators based on integrated ferroelectric synaptic arrays for convolution neural networks

Convolutional neural networks (CNNs) have gained much attention because they can provide superior complex image recognition through convolution operations. Convolution processes require repeated multiplication and accumulation operations, which are difficult tasks for conventional computing systems. Compute-in-memory (CIM) that uses parallel data processing is an ideal device structure for convolution operations. CIM based on two-terminal synaptic devices with a crossbar structure has been developed, but unwanted leakage current paths and the high-power consumption remain as the challenges. Here, we demonstrate integrated ferroelectric thin-film transistor (FeTFT) synaptic arrays that can provide efficient parallel programming and data processing for CNNs by the selective and accurate control of polarization in the ferroelectric layer. In addition, three-terminal FeTFTs can act as both nonvolatile memory and access device, which tackle issues from two-terminal devices. An integrated FeTFT synaptic array with parallel programming capabilities can perform convolution operations to extract image features with a high-recognition accuracy.

Ferroelectric photosensor network: an advanced hardware solution to real-time machine vision

Nowadays the development of machine vision is oriented toward real-time applications such as autonomous driving. This demands a hardware solution with low latency, high energy efficiency, and good reliability. Here, we demonstrate a robust and self-powered in-sensor computing paradigm with a ferroelectric photosensor network (FE-PS-NET). The FE-PS-NET, constituted by ferroelectric photosensors (FE-PSs) with tunable photoresponsivities, is capable of simultaneously capturing and processing images. In each FE-PS, self-powered photovoltaic responses, modulated by remanent polarization of an epitaxial ferroelectric Pb(Zr0.2Ti0.8)O3 layer, show not only multiple nonvolatile levels but also sign reversibility, enabling the representation of a signed weight in a single device and hence reducing the hardware overhead for network construction. With multiple FE-PSs wired together, the FE-PS-NET acts on its own as an artificial neural network. In situ multiply-accumulate operation between an input image and a stored photoresponsivity matrix is demonstrated in the FE-PS-NET. Moreover, the FE-PS-NET is faultlessly competent for real-time image processing functionalities, including binary classification between 'X' and 'T' patterns with 100% accuracy and edge detection for an arrow sign with an F-Measure of 1 (under 365 nm ultraviolet light). This study highlights the great potential of ferroelectric photovoltaics as the hardware basis of real-time machine vision.

Manipulation of current rectification in van der Waals ferroionic CuInP2S6

Developing a single-phase self-rectifying memristor with the continuously tunable feature is structurally desirable and functionally adaptive to dynamic environmental stimuli variations, which is the pursuit of further smart memristors and neuromorphic computing. Herein, we report a van der Waals ferroelectric CuInP2S6 as a single memristor with superior continuous modulation of current and self-rectifying to different bias stimuli (sweeping speed, direction, amplitude, etc.) and external mechanical load. The synergetic contribution of controllable Cu+ ions migration and interfacial Schottky barrier is proposed to dynamically control the current flow and device performance. These outstanding sensitive features make this material possible for being superior candidate for future smart memristors with bidirectional operation mode and strong recognition to input faults and variations.

Retinomorphic optoelectronic devices for intelligent machine vision

Biological visual system can efficiently handle optical information within the retina and visual cortex of the brain, which suggests an alternative approach for the upgrading of the current low-intelligence, large energy consumption, and complex circuitry of the artificial vision system for high-performance edge computing applications. In recent years, retinomorphic machine vision based on the integration of optoelectronic image sensors and processors has been regarded as a promising candidate to improve this phenomenon. This novel intelligent machine vision technology can perform information preprocessing near or even within the sensor in the front end, thereby reducing the transmission of redundant raw data and improving the efficiency of the back-end processor for high-level computing tasks. In this contribution, we try to present a comprehensive review on the recent progress achieved in this emergent field.

Dynamic Self-Rectifying Liquid Metal-Semiconductor Heterointerfaces: A Platform for Development of Bioinspired Afferent Systems

The assembly of geometrically complex and dynamically active liquid metal/semiconductor heterointerfaces has drawn extensive attention in multidimensional electronic systems. In this study the chemovoltaic driven reactions have enabled the microfluidity of hydrophobic galinstan into a three-dimensional (3D) semiconductor matrix. A dynamic heterointerface is developed between the atomically thin surface oxide of galinstan and the TiO₂-Ni interface. Upon the growth of Ga₂O₃ film at the Ga₂O₃-TiO₂ heterointerface, the partial reduction of the TiO₂ film was confirmed by material characterization techniques. The conductance imaging spectroscopy and electrical measurements are used to investigate the charge transfer at heterointerfaces. Concurrently, the dynamic conductance in artificial synaptic junctions is modulated to mimic the biofunctional communication characteristics of multipolar neurons, including slow and fast inhibitory and excitatory postsynaptic responses. The self-rectifying characteristics, femtojoule energy processing, tunable synaptic events, and notably the coordinated signal recognition are the main characteristics of this multisynaptic device. This novel 3D design of liquid metal-semiconductor structure opens up new opportunities for the development of bioinspired afferent systems. It further facilitates the realization of physical phenomena at liquid metal-semiconductor heterointerfaces.

A Neural Network Approach towards Generalized Resistive Switching Modelling

Resistive switching behaviour has been demonstrated to be a common characteristic to many materials. In this regard, research teams to date have produced a plethora of different devices exhibiting diverse behaviour, but when system design is considered, finding a 'one-model-fits-all' solution can be quite difficult, or even impossible. However, it is in the interest of the community to achieve more general modelling tools for design that allows a quick model update as devices evolve. Laying the grounds with such a principle, this paper presents an artificial neural network learning approach to resistive switching modelling. The efficacy of the method is demonstrated firstly with two simulated devices and secondly with a 4 μm2 amorphous IGZO device. For the amorphous IGZO device, a normalized root-mean-squared error (NRMSE) of 5.66 × 10-3 is achieved with a [2, 50,50 ,1] network structure, representing a good balance between model complexity and accuracy. A brief study on the number of hidden layers and neurons and its effect on network performance is also conducted with the best NRMSE reported at 4.63 × 10-3. The low error rate achieved in both simulated and real-world devices is a good indicator that the presented approach is flexible and can suit multiple device types.

Induced Complementary Resistive Switching in Forming-Free TiOx/TiO2/TiOx Memristors

The undesirable sneak current path is one of the key challenges in high-density memory integration for the emerging cross-bar memristor arrays. This work demonstrates a new heterojunction design of oxide multilayer stacking with different oxygen vacancy contents to manipulate the oxidation state. We show that the bipolar resistive switching (BRS) behavior of the Pt/TiO_x/Pt cross-bar structure can be changed to complementary resistive switching (CRS) by introducing a thin TiO₂ layer in the middle of the TiO_x layer to obtain a Pt/TiO_x/TiO₂/TiO_x/Pt device architecture with a double-junction active matrix. In contrast to the BRS in a single-layer TiO_x matrix, the device with a double-junction matrix remains in a high-resistance state in the voltage range below the SET voltage, which makes it an efficient structure to overcome the sneak path constraints of undesired half-selected cells that lead to incorrect output reading. This architecture is capable of eliminating these half-selected cells between the nearby cross-bar cells in a smaller programming voltage range. A simplified model for the switching mechanism can be used to account for the observed high-quality switching performance with excellent endurance and current retention properties.

Energy-Efficient Non-Von Neumann Computing Architecture Supporting Multiple Computing Paradigms for Logic and Binarized Neural Networks

Different in-memory computing paradigms enabled by emerging non-volatile memory technologies are promising solutions for the development of ultra-low-power hardware for edge computing. Among these, SIMPLY, a smart logic-in-memory architecture, provides high reconfigurability and enables the in-memory computation of both logic operations and binarized neural networks (BNNs) inference. However, operation-specific hardware accelerators can result in better performance for a particular task, such as the analog computation of the multiply and accumulate operation for BNN inference, but lack reconfigurability. Nonetheless, a solution providing the flexibility of SIMPLY while also achieving the high performance of BNN-specific analog hardware accelerators is missing. In this work, we propose a novel in-memory architecture based on 1T1R crossbar arrays, which enables the coexistence on the same crossbar array of both SIMPLY computing paradigm and the analog acceleration of the multiply and accumulate operation for BNN inference. We also highlight the main design tradeoffs and opportunities enabled by different emerging non-volatile memory technologies. Finally, by using a physics-based Resistive Random Access Memory (RRAM) compact model calibrated on data from the literature, we show that the proposed architecture improves the energy delay product by >103 times when performing a BNN inference task with respect to a SIMPLY implementation.

Reversible Barrier Switching of ZnO/RuO2 Schottky Diodes

The current-voltage characteristics of ZnO/RuO2 Schottky diodes prepared by magnetron sputtering are shown to exhibit a reversible hysteresis behavior, which corresponds to a variation of the Schottky barrier height between 0.9 and 1.3 eV upon voltage cycling. The changes in the barrier height are attributed to trapping and de-trapping of electrons in oxygen vacancies.

Design of a Memristor-Based Digital to Analog Converter (DAC)

A memristor element has been highlighted in recent years and has been applied to several applications. In this work, a memristor-based digital to analog converter (DAC) was proposed due to the fact that a memristor has low area, low power, and a low threshold voltage. The proposed memristor DAC depends on the basic DAC cell, consisting of two memristors connected in opposite directions. This basic DAC cell was used to build and simulate both a 4 bit and an 8 bit DAC. Moreover, a sneak path issue was illustrated and its solution was provided. The proposed design reduced the area by 40%. The 8 bit memristor DAC has been designed and used in a successive approximation register analog to digital converter (SAR-ADC) instead of in a capacitor DAC (which would require a large area and consume more switching power). The SAR-ADC with a memristor-based DAC achieves a signal to noise and distortion ratio (SNDR) of 49.3 dB and a spurious free dynamic range (SFDR) of 61 dB with a power supply of 1.2 V and a consumption of 21 µW. The figure of merit (FoM) of the proposed SAR-ADC is 87.9 fj/Conv.-step. The proposed designs were simulated with optimized parameters using a voltage threshold adaptive memristor (VTEAM) model.