Nonvolatile Ferroelectric Memory Circuit Using Black Phosphorus Nanosheet-Based Field-Effect Transistors with P(VDF-TrFE) Polymer

Small Feature-Size Transistors Based on Low-Dimensional Materials: From Structure Design to Nanofabrication Techniques

For several decades after Moore's Law is proposed, there is a continuous effort to reduce the feature-size of transistors. However, as the size of transistors continues to decrease, numerous challenges and obstacles including severe short channel effects (SCEs) are emerging. Recently, low-dimensional materials have provided new opportunities for constructing small feature-size transistors due to their superior electrical properties compared to silicon. Here, state-of-the-art low-dimensional materials-based transistors with small feature-sizes are reviewed. Different from other works that mainly focus on material characteristics of a specific device structure, the discussed topics are utilizing device structure design including vertical structure and nano-gate structure, and nanofabrication techniques to achieve small feature-sizes of transistors. A comprehensive summary of these small feature-size transistors is presented by illustrating their operation mechanism, relevant fabrication processes, and corresponding performance parameters. Besides, the role of small feature-size transistors based on low-dimensional materials in further reducing the small footprint is also clarified and their cutting-edge applications are highlighted. Finally, a comparison and analysis between state-of-art transistors is made, as well as a glimpse into the future research trajectory of low dimensional materials-based small feature-size transistors is briefly outlined.

Emerging 2D Ferroelectric Devices for In-Sensor and In-Memory Computing

The quantity of sensor nodes within current computing systems is rapidly increasing in tandem with the sensing data. The presence of a bottleneck in data transmission between the sensors, computing, and memory units obstructs the system's efficiency and speed. To minimize the latency of data transmission between units, novel in-memory and in-sensor computing architectures are proposed as alternatives to the conventional von Neumann architecture, aiming for data-intensive sensing and computing applications. The integration of 2D materials and 2D ferroelectric materials has been expected to build these novel sensing and computing architectures due to the dangling-bond-free surface, ultra-fast polarization flipping, and ultra-low power consumption of the 2D ferroelectrics. Here, the recent progress of 2D ferroelectric devices for in-sensing and in-memory neuromorphic computing is reviewed. Experimental and theoretical progresses on 2D ferroelectric devices, including passive ferroelectrics-integrated 2D devices and active ferroelectrics-integrated 2D devices, are reviewed followed by the integration of perception, memory, and computing application. Notably, 2D ferroelectric devices have been used to simulate synaptic weights, neuronal model functions, and neural networks for image processing. As an emerging device configuration, 2D ferroelectric devices have the potential to expand into the sensor-memory and computing integration application field, leading to new possibilities for modern electronics.

Solution-processable low-voltage carbon nanotube field-effect transistors with high-krelaxor ferroelectric polymer gate insulator

Achieving energy-efficient and high-performance field-effect transistors (FETs) is one of the most important goals for future electronic devices. This paper reports semiconducting single-walled carbon nanotube FETs (s-SWNT-FETs) with an optimized high-krelaxor ferroelectric insulator P(VDF-TrFE-CFE) thickness for low-voltage operation. The s-SWNT-FETs with an optimized thickness (∼800 nm) of the high-kinsulator exhibited the highest average mobility of 14.4 cm2V-1s-1at the drain voltage (ID) of 1 V, with a high current on/off ratio (Ion/off>105). The optimized device performance resulted from the suppressed gate leakage current (IG) and a sufficiently large capacitance (>50 nF cm-2) of the insulating layer. Despite the extremely high capacitance (>100 nF cm-2) of the insulating layer, an insufficient thickness (<450 nm) induces a highIG, leading to reducedIDand mobility of s-SWNT-FETs. Conversely, an overly thick insulator (>1200 nm) cannot introduce sufficient capacitance, resulting in limited device performance. The large capacitance and sufficient breakdown voltage of the insulating layer with an appropriate thickness significantly improved p-type performance. However, a reduced n-type performance was observed owing to the increased electron trap density caused by fluorine proportional to the insulator thickness. Hence, precise control of the insulator thickness is crucial for achieving low-voltage operation with enhanced s-SWNT-FET performance.

Recent progress in emerging two-dimensional organic-inorganic van der Waals heterojunctions

Two-dimensional (2D) materials have attracted significant attention in recent decades due to their exceptional optoelectronic properties. Among them, to meet the growing demand for multifunctional applications, 2D organic-inorganic van der Waals (vdW) heterojunctions have become increasingly popular in the development of optoelectronic devices. These heterojunctions demonstrate impressive capability to synergistically combine the favourable characteristics of organic and inorganic materials, thereby offering a wide range of advantages. Also, they enable the creation of innovative device structures and introduce novel functionalities in existing 2D materials, avoiding the need for lattice matching in different material systems. Presently, researchers are actively working on improving the performance of devices based on 2D organic-inorganic vdW heterojunctions by focusing on enhancing the quality of 2D materials, precise stacking methods, energy band regulation, and material selection. Therefore, this review presents a thorough examination of the emerging 2D organic-inorganic vdW heterojunctions, including their classification, fabrication, and corresponding devices. Additionally, this review offers profound and comprehensive insight into the challenges in this field to inspire future research directions. It is expected to propel researchers to harness the extraordinary capabilities of 2D organic-inorganic vdW heterojunctions for a wider range of applications by further advancing the understanding of their fundamental properties, expanding the range of available materials, and exploring novel device architectures. The ongoing research and development in this field hold potential to unlock captivating advancements and foster practical applications across diverse industries.

Rational Design of Stimuli-Responsive Inorganic 2D Materials via Molecular Engineering: Toward Molecule-Programmable Nanoelectronics

The ability of electronic devices to act as switches makes digital information processing possible. Succeeding graphene, emerging inorganic 2D materials (i2DMs) have been identified as alternative 2D materials to harbor a variety of active molecular components to move the current silicon-based semiconductor technology forward to a post-Moore era focused on molecule-based information processing components. In this regard, i2DMs benefits are not only for their prominent physiochemical properties (e.g., the existence of bandgap), but also for their high surface-to-volume ratio rich in reactive sites. Nonetheless, since this field is still in an early stage, having knowledge of both i) the different strategies for molecularly functionalizing the current library of i2DMs, and ii) the different types of active molecular components is a sine qua non condition for a rational design of stimuli-responsive i2DMs capable of performing logical operations at the molecular level. Consequently, this Review provides a comprehensive tutorial for covalently anchoring ad hoc molecular components-as active units triggered by different external inputs-onto pivotal i2DMs to assess their role in the expanding field of molecule-programmable nanoelectronics for electrically monitoring bistable molecular switches. Limitations, challenges, and future perspectives of this emerging field which crosses materials chemistry with computation are critically discussed.

A review on advanced band-structure engineering with dynamic control for nonvolatile memory based 2D transistors

With advancements in information technology, an enormous amount of data is being generated that must be quickly accessible. However, conventional Si memory cells are approaching their physical limits and will be unable to meet the requirements of intense applications in the future. Notably, 2D atomically thin materials have demonstrated multiple novel physical and chemical properties that can be used to investigate next-generation electronic devices and breakthrough physical limits to continue Moore's law. Band structure is an important semiconductor parameter that determines their electrical and optical properties. In particular, 2D materials have highly tunable bandgaps and Fermi levels that can be achieved through band structure engineering methods such as heterostructure, substrate engineering, chemical doping, intercalation, and electrostatic doping. In particular, dynamic control of band structure engineering can be used in recent advancements in 2D devices to realize nonvolatile storage performance. This study examines recent advancements in 2D memory devices that utilize band structure engineering. The operational mechanisms and memory characteristics are described for each band structure engineering method. Band structure engineering provides a platform for developing new structures and realizing superior performance with respect to nonvolatile memory.

Polarization-tunable interfacial properties in monolayer-MoS2 transistors integrated with ferroelectric BiAlO3(0001) polar surfaces

With the explosion of data-centric applications, new in-memory computing technologies, based on nonvolatile memory devices, have become competitive due to their merged logic-memory functionalities. Herein, employing first-principles quantum transport simulation, we theoretically investigate for the first time the electronic and contact properties of two types of monolayer (ML)-MoS2 ferroelectric field-effect transistors (FeFETs) integrated with ferroelectric BiAlO3(0001) (BAO(0001)) polar surfaces. Our study finds that the interfacial properties of the investigated partial FeFET devices are highly tunable by switching the electric polarization of the ferroelectric BAO(0001) dielectric. Specifically, the transition from quasi-Ohmic to the Schottky contact, as well as opposite contact polarity of respective n-type and p-type Schottky contact under two polarization states can be obtained, suggesting their superior performance metrics in terms of nonvolatile information storage. In addition, due to the feature of (quasi-)Ohmic contact in some polarization states, the explored FeFET devices, even when operating in the regular field-effect transistor (FET) mode, can be extremely significant in realizing a desirable low threshold voltage and interfacial contact resistance. In conjunction with the formed van der Waals (vdW) interfaces in ML-MoS2/ferroelectric systems with an interlayer, the proposed FeFETs are expected to provide excellent device performance with regard to cycling endurance and memory density.

Scalable CMOS back-end-of-line-compatible AlScN/two-dimensional channel ferroelectric field-effect transistors

Three-dimensional monolithic integration of memory devices with logic transistors is a frontier challenge in computer hardware. This integration is essential for augmenting computational power concurrent with enhanced energy efficiency in big data applications such as artificial intelligence. Despite decades of efforts, there remains an urgent need for reliable, compact, fast, energy-efficient and scalable memory devices. Ferroelectric field-effect transistors (FE-FETs) are a promising candidate, but requisite scalability and performance in a back-end-of-line process have proven challenging. Here we present back-end-of-line-compatible FE-FETs using two-dimensional MoS2 channels and AlScN ferroelectric materials, all grown via wafer-scalable processes. A large array of FE-FETs with memory windows larger than 7.8 V, ON/OFF ratios greater than 107 and ON-current density greater than 250 μA um-1, all at ~80 nm channel length are demonstrated. The FE-FETs show stable retention up to 10 years by extension, and endurance greater than 104 cycles in addition to 4-bit pulse-programmable memory features, thereby opening a path towards the three-dimensional heterointegration of a two-dimensional semiconductor memory with silicon complementary metal-oxide-semiconductor logic.

Modulating the Function of GeAs/ReS2 van der Waals Heterojunction with its Potential Application for Short-Wave Infrared and Polarization-Sensitive Photodetection

Van der Waals heterojunction (vdWs) of 2D materials with integrated or extended superior characteristics, opening up new opportunities in functional electronic and optoelectric device applications. Exploring methods to achieve multifunctional vdWs heterojunction devices is one of the most promising prospects in this area. Herein, a diverse function of forward rectifying diode, Zener tunneling diode, and backward rectifying diodes are realized in GeAs/ReS2 heterojunction by modulating the doping level of GeAs. The tunneling diode presents an interesting trend forward negative differential resistance (NDR) behavior which may facilitate the application of multi-value logic. More importantly, the GeAs/ReS2 forward rectifying diode exhibits highly sensitive photodetection in the wide-spectrum range up to 1550 nm corresponding to a short-wave infrared (SWIR) region. In addition, as two strong anisotropic 2D materials of GeAs and ReS2 , the heterojunction exhibits strong polarization-sensitive photodetection behavior with a dichroic photocurrent ratio of 1.7. This work provides an effective strategy to achieve multifunctional 2D vdW heterojunction devices and develops more possibilities to broaden their functionalities and applications.

Reconfigurable Logic-in-Memory Computing Based on a Polarity-Controllable Two-Dimensional Transistor

Logic-in-memory architecture holds great promise to meet the high-performance and energy-efficient requirements of data-intensive scenarios. Two-dimensional compacted transistors embedded with logic functions are expected to extend Moore's law toward advanced nodes. Here we demonstrate that a WSe₂/h-BN/graphene based middle-floating-gate field-effect transistor can perform under diverse current levels due to the controllable polarity by the control gate, floating gate, and drain voltages. Such electrical tunable characteristics are employed for logic-in-memory architectures and can behave as reconfigurable logic functions of AND/XNOR within a single device. Compared to the conventional devices like floating-gate field-effect transistors, our design can greatly decrease the consumption of transistors. For AND/NAND, it can save 75% transistors by reducing the transistor number from 4 to 1; for XNOR/XOR, it is even up to 87.5% with the number being reduced from 8 to 1.

High-Performance C60 Coupled Ferroelectric Enhanced MoS2 Nonvolatile Memory

Nonvolatile memory (NVM) devices based on two-dimensional (2D) materials have recently attracted widespread attention due to their high-density integration potential and the ability to be applied in computing-in-memory systems in the post-Moore era. Considering the high current on/off ratio, programmable threshold voltage, nonvolatile multilevel memory state, and extended logic functions, plenty of breakthroughs related to ferroelectric field-effect transistors (FeFETs), one of the most important NVM devices, have been made in the past decade. Among them, FETs coupled with organic ferroelectric films such as P(VDF-TrFE) displayed properties of remarkable robustness, easy preparation, and low cost. However, the dipoles of the P(VDF-TrFE) film cannot be flipped smoothly at low voltage, impeding the further application of organic FeFET. In this paper, we proposed a high-performance FeFET based on monolayer MoS₂ coupled with C₆₀ doped ferroelectric copolymer P(VDF-TrFE). The inserted C₆₀ molecules enhanced the alignment of the dipoles effectively at low voltage, allowing the modified device to demonstrate a large memory window (∼16 V), high current on/off ratio (>10⁶), long retention time (>10 000 s), and remarkable endurance under the reduced operating voltage. In addition, the in situ logic application can be realized by constructing facile device interconnection without building complex complementary semiconductor circuits. Our results are expected to pave the way for future low-consumption computing-in-memory applications based on high-quality 2D FeFETs.

Recent Advances in Ferroelectric-Enhanced Low-Dimensional Optoelectronic Devices

Ferroelectric (FE) materials, including BiFeO₃ , P(VDF-TrFE), and CuInP₂ S₆ , are a type of dielectric material with a unique, spontaneous electric polarization that can be reversed by applying an external electric field. The combination of FE and low-dimensional materials produces synergies, sparking significant research interest in solar cells, photodetectors (PDs), nonvolatile memory, and so on. The fundamental aspects of FE materials, including the origin of FE polarization, extrinsic FE materials, and FE polarization quantification are first discussed. Next, the state-of-the-art of FE-based optoelectronic devices is focused. How FE materials affect the energy band of channel materials and how device structures influence PD performance are also summarized. Finally, the future directions of this rapidly growing field are discussed.

Combination of Polymer Gate Dielectric and Two-Dimensional Semiconductor for Emerging Field-Effect Transistors

Two-dimensional (2D) materials are considered attractive semiconducting layers for emerging field-effect transistors owing to their unique electronic and optoelectronic properties. Polymers have been utilized in combination with 2D semiconductors as gate dielectric layers in field-effect transistors (FETs). Despite their distinctive advantages, the applicability of polymer gate dielectric materials for 2D semiconductor FETs has rarely been discussed in a comprehensive manner. Therefore, this paper reviews recent progress relating to 2D semiconductor FETs based on a wide range of polymeric gate dielectric materials, including (1) solution-based polymer dielectrics, (2) vacuum-deposited polymer dielectrics, (3) ferroelectric polymers, and (4) ion gels. Exploiting appropriate materials and corresponding processes, polymer gate dielectrics have enhanced the performance of 2D semiconductor FETs and enabled the development of versatile device structures in energy-efficient ways. Furthermore, FET-based functional electronic devices, such as flash memory devices, photodetectors, ferroelectric memory devices, and flexible electronics, are highlighted in this review. This paper also outlines challenges and opportunities in order to help develop high-performance FETs based on 2D semiconductors and polymer gate dielectrics and realize their practical applications.

Optically Controllable Organic Logic-in-Memory: An Innovative Approach toward Ternary Data Processing and Storage

Logic-in-memory (LIM) has emerged as an energy-efficient computing technology, as it integrates logic and memory operations in a single device architecture. Herein, a concept of ternary LIM is established. First, a p-type 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C8-BTBT) transistor is combined with an n-type PhC₂H₄-benzo[de]isoquinolino[1,8-gh]quinolone diimide (PhC2-BQQDI) transistor to obtain a binary memory inverter, in which a zinc phthalocyanine-cored polystyrene (ZnPc-PS₄) layer serves as a floating gate. The contrasting photoresponse of the transistors toward visible and ultraviolet light and the efficient hole-trapping ability of ZnPc-PS₄ enable us to achieve an optically controllable memory operation with a high memory window of 18 V. Then, a ternary memory inverter is developed using an anti-ambipolar transistor to achieve a three-level data processing and storage system for more advanced LIM applications. Finally, low-voltage operation of the devices is achieved by employing a high-k dielectric layer, which highlights the potential of the developed LIM units for next-generation low-power electronics.

Progress and Challenges for Memtransistors in Neuromorphic Circuits and Systems

Due to the increasing importance of artificial intelligence (AI), significant recent effort has been devoted to the development of neuromorphic circuits that seek to emulate the energy-efficient information processing of the brain. While non-volatile memory (NVM) based on resistive switches, phase-change memory, and magnetic tunnel junctions has shown potential for implementing neural networks, additional multi-terminal device concepts are required for more sophisticated bio-realistic functions. Of particular interest are memtransistors based on low-dimensional nanomaterials, which are capable of electrostatically tuning memory and learning behavior at the device level. Herein, a conceptual overview of the memtransistor is provided in the context of neuromorphic circuits. Recent progress is surveyed for memtransistors and related multi-terminal NVM devices including dual-gated floating-gate memories, dual-gated ferroelectric transistors, and dual-gated van der Waals heterojunctions. The different materials systems and device architectures are classified based on the degree of control and relative tunability of synaptic behavior, with an emphasis on device concepts that harness the reduced dimensionality, weak electrostatic screening, and phase-changes properties of nanomaterials. Finally, strategies for achieving wafer-scale integration of memtransistors and multi-terminal NVM devices are delineated, with specific attention given to the materials challenges for practical neuromorphic circuits.

The Road for 2D Semiconductors in the Silicon Age

Continued reduction in transistor size can improve the performance of silicon integrated circuits (ICs). However, as Moore's law approaches physical limits, high-performance growth in silicon ICs becomes unsustainable, due to challenges of scaling, energy efficiency, and memory limitations. The ultrathin layers, diverse band structures, unique electronic properties, and silicon-compatible processes of 2D materials create the potential to consistently drive advanced performance in ICs. Here, the potential of fusing 2D materials with silicon ICs to minimize the challenges in silicon ICs, and to create technologies beyond the von Neumann architecture, is presented, and the killer applications for 2D materials in logic and memory devices to ease scaling, energy efficiency bottlenecks, and memory dilemmas encountered in silicon ICs are discussed. The fusion of 2D materials allows the creation of all-in-one perception, memory, and computation technologies beyond the von Neumann architecture to enhance system efficiency and remove computing power bottlenecks. Progress on the 2D ICs demonstration is summarized, as well as the technical hurdles it faces in terms of wafer-scale heterostructure growth, transfer, and compatible integration with silicon ICs. Finally, the promising pathways and obstacles to the technological advances in ICs due to the integration of 2D materials with silicon are presented.

Ferroelectrics-Integrated Two-Dimensional Devices toward Next-Generation Electronics

Ferroelectric materials play an important role in a wide spectrum of semiconductor technologies and device applications. Two-dimensional (2D) van der Waals (vdW) ferroelectrics with surface-insensitive ferroelectricity that is significantly different from their traditional bulk counterparts have further inspired intensive interest. Integration of ferroelectrics into 2D-layered-material-based devices is expected to offer intriguing working principles and add desired functionalities for next-generation electronics. Herein, fundamental properties of ferroelectric materials that are compatible with 2D devices are introduced, followed by a critical review of recent advances on the integration of ferroelectrics into 2D devices. Representative device architectures and corresponding working mechanisms are discussed, such as ferroelectrics/2D semiconductor heterostructures, 2D ferroelectric tunnel junctions, and 2D ferroelectric diodes. By leveraging the favorable properties of ferroelectrics, a variety of functional 2D devices including ferroelectric-gated negative capacitance field-effect transistors, programmable devices, nonvolatile memories, and neuromorphic devices are highlighted, where the application of 2D vdW ferroelectrics is particularly emphasized. This review provides a comprehensive understanding of ferroelectrics-integrated 2D devices and discusses the challenges of applying them into commercial electronic circuits.

Asymmetric Ferroelectric-Gated Two-Dimensional Transistor Integrating Self-Rectifying Photoelectric Memory and Artificial Synapse

Ferroelectric field-effect transistors (Fe-FET) are promising candidates for future information devices. However, they suffer from low endurance and short retention time, which retards the application of processing memory in the same physical processes. Here, inspired by the ferroelectric proximity effects, we design a reconfigurable two-dimensional (2D) MoS₂ transistor featuring with asymmetric ferroelectric gate, exhibiting high memory and logic ability with a program/erase ratio of over 10⁶ and a self-rectifying ratio of 10³. Interestingly, the robust electric and optic cycling are obtained with a large switching ratio of 10⁶ and nine distinct resistance states upon optical excitation with excellent nonvolatile characteristics. Meanwhile, the operation of memory mimics the synapse behavior in response to light spikes with different intensity and number. This design realizes an integration of robust processing memory in one single device, which demonstrates a considerable potential of an asymmetric ferroelectric gate in the development of Fe-FETs for logic processing and nonvolatile memory applications.

Stability and passivation of 2D group VA elemental materials: black phosphorus and beyond

Since the successful isolation of graphene in 2004, two-dimensional (2D) materials have become one of the focuses in material science owing to their extraordinary physical and chemical properties. In particular, 2D group VA elemental materials exhibit fascinating thickness-dependent band structures. Unfortunately, the well-known instability issue hinders their fundamental researches and practical applications. In this review, we first discuss the degradation mechanism of black phosphorus (BP), a most studied group VA material. Next, we summarize the methods to enhance BP stability with the focus of multifunctional passivation. Finally, we briefly discuss the protection strategies of other emerging group VA materials in recent years. This review provides insight for the degradation mechanism and protecting strategy for 2D group VA elements materials, which will promote their potential applications in electronics, optoelectronics, and biomedicine.

Dual-Ferroelectric-Coupling-Engineered Two-Dimensional Transistors for Multifunctional In-Memory Computing

In-memory computing featuring a radical departure from the von Neumann architecture is promising to substantially reduce the energy and time consumption for data-intensive computation. With the increasing challenges facing silicon complementary metal-oxide-semiconductor (CMOS) technology, developing in-memory computing hardware would require a different platform to deliver significantly enhanced functionalities at the material and device level. Here, we explore a dual-gate two-dimensional ferroelectric field-effect transistor (2D FeFET) as a basic device to form both nonvolatile logic gates and artificial synapses, addressing in-memory computing simultaneously in digital and analog spaces. Through diversifying the electrostatic behaviors in 2D transistors with the dual-ferroelectric-coupling effect, rich logic functionalities including linear (AND, OR) and nonlinear (XNOR) gates were obtained in unipolar (MoS₂) and ambipolar (MoTe₂) FeFETs. Combining both types of 2D FeFETs in a heterogeneous platform, an important computation circuit, i.e., a half-adder, was successfully constructed with an area-efficient two-transistor structure. Furthermore, with the same device structure, several key synaptic functions are shown at the device level, and an artificial neural network is simulated at the system level, manifesting its potential for neuromorphic computing. These findings highlight the prospects of dual-gate 2D FeFETs for the development of multifunctional in-memory computing hardware capable of both digital and analog computation.

Solid-Ionic Memory in a van der Waals Heterostructure

Defect states dominate the performance of low-dimensional nanoelectronics, which deteriorate the serviceability of devices in most cases. But in recent years, some intriguing functionalities are discovered by defect engineering. In this work, we demonstrate a bifunctional memory device of a MoS₂/BiFeO₃/SrTiO₃ van der Waals heterostructure, which can be programmed and erased by solely one kind of external stimuli (light or electrical-gate pulse) via engineering of oxygen-vacancy-based solid-ionic gating. The device shows multibit electrical memory capability (>22 bits) with a large linearly tunable dynamic range of 7.1 × 10⁶ (137 dB). Furthermore, the device can be programmed by green- and red-light illuminations and then erased by UV light pulses. Besides, the photoresponse under red-light illumination reaches a high photoresponsivity (6.7 × 10⁴ A/W) and photodetectivity (2.12 × 10¹³ Jones). These results highlighted solid-ionic memory for building up multifunctional electronic and optoelectronic devices.

Molecular Approach to Engineer Two-Dimensional Devices for CMOS and beyond-CMOS Applications

Two-dimensional materials (2DMs) have attracted tremendous research interest over the last two decades. Their unique optical, electronic, thermal, and mechanical properties make 2DMs key building blocks for the fabrication of novel complementary metal-oxide-semiconductor (CMOS) and beyond-CMOS devices. Major advances in device functionality and performance have been made by the covalent or noncovalent functionalization of 2DMs with molecules: while the molecular coating of metal electrodes and dielectrics allows for more efficient charge injection and transport through the 2DMs, the combination of dynamic molecular systems, capable to respond to external stimuli, with 2DMs makes it possible to generate hybrid systems possessing new properties by realizing stimuli-responsive functional devices and thereby enabling functional diversification in More-than-Moore technologies. In this review, we first introduce emerging 2DMs, various classes of (macro)molecules, and molecular switches and discuss their relevant properties. We then turn to 2DM/molecule hybrid systems and the various physical and chemical strategies used to synthesize them. Next, we discuss the use of molecules and assemblies thereof to boost the performance of 2D transistors for CMOS applications and to impart diverse functionalities in beyond-CMOS devices. Finally, we present the challenges, opportunities, and long-term perspectives in this technologically promising field.

Contribution of Polymers to Electronic Memory Devices and Applications

Electronic memory devices, such as memristors, charge trap memory, and floating-gate memory, have been developed over the last decade. The use of polymers in electronic memory devices enables new opportunities, including easy-to-fabricate processes, mechanical flexibility, and neuromorphic applications. This review revisits recent efforts on polymer-based electronic memory developments. The versatile contributions of polymers for emerging memory devices are classified, providing a timely overview of such unconventional functionalities with a strong emphasis on the merits of polymer utilization. Furthermore, this review discusses the opportunities and challenges of polymer-based memory devices with respect to their device performance and stability for practical applications.

Black Phosphorus/Polymers: Status and Challenges

As a newly emerged mono-elemental nanomaterial, black phosphorus (BP) has been widely investigated for its fascinating physical properties, including layer-dependent tunable band gap (0.3-1.5 eV), high ON/OFF ratio (10⁴ ), high carrier mobility (10³ cm² V^-1 s^-1 ), excellent mechanical resistance, as well as special in-plane anisotropic optical, thermal, and vibrational characteristics. However, the instability caused by chemical degradation of its surface has posed a severe challenge for its further applications. A focused BP/polymer strategy has more recently been developed and implemented to hurdle this issue, so at present BP/polymers have been developed that exhibit enhanced stability, as well as outstanding optical, thermal, mechanical, and electrical properties. This has promoted researchers to further explore the potential applications of black phosphorous. In this review, the preparation processes and the key properties of BP/polymers are reviewed, followed by a detailed account of their diversified applications, including areas like optoelectronics, bio-medicine, and energy storage. Finally, in accordance with the current progress, the prospective challenges and future directions are highlighted and discussed.

Hybrid System Combining Two-Dimensional Materials and Ferroelectrics and Its Application in Photodetection

Photodetectors are one of the most important components for a future "Internet-of-Things" information society. Compared to the mainstream semiconductor-based photodetectors, emerging devices based on two-dimensional (2D) materials and ferroelectrics as well as their hybrid systems have been extensively studied in recent decades due to their outstanding performances and related interesting physical, electrical, and optoelectronic phenomena. In this paper, we review the photodetection based on 2D materials and ferroelectric hybrid systems. The fundamentals of 2D and ferroelectric materials as well as the interaction in the hybrid system will be introduced. Ferroelectricity modulated optoelectronic properties in the hybrid system will be discussed in detail. After the basics and figures of merit of photodetectors are summarized, the 2D-ferroelectrics devices with different structures including p-n diodes, Schottky diodes, and field-effect transistors will be reviewed and compared. The polarization of ferroelectrics offers the possibility of the modulation and enhancement of the photodetection in the hybrid detectors, which will be discussed in depth. Finally, the challenges and perspectives of the photodetectors based on 2D ferroelectrics will be proposed. This Review outlines the important aspects of the recent development of the hybrid system of 2D and ferroelectric materials, which could interact with each other and thus lead to photodetectors with higher performances. Such a Review will be helpful for the research of emerging physical phenomena and for the design of multifunctional nanoscale electronic and optoelectronic devices.

Emerging 2D Memory Devices for In-Memory Computing

It is predicted that the conventional von Neumann computing architecture cannot meet the demands of future data-intensive computing applications due to the bottleneck between the processing and memory units. To try to solve this problem, in-memory computing technology, where calculations are carried out in situ within each nonvolatile memory unit, has been intensively studied. Among various candidate materials, 2D layered materials have recently demonstrated many new features that have been uniquely exploited to build next-generation electronics. Here, the recent progress of 2D memory devices is reviewed for in-memory computing. For each memory configuration, their operation mechanisms and memory characteristics are described, and their pros and cons are weighed. Subsequently, their versatile applications for in-memory computing technology, including logic operations, electronic synapses, and random number generation are presented. Finally, the current challenges and potential strategies for future 2D in-memory computing systems are also discussed at the material, device, circuit, and architecture levels. It is hoped that this manuscript could give a comprehensive review of 2D memory devices and their applications in in-memory computing, and be helpful for this exciting research area.

Assembly of Close-Packed Ferroelectric Polymer Nanowires via Interface-Epitaxy with ReS2

The flexible, transparent, and low-weight nature of ferroelectric polymers makes them promising for wearable electronic and optical applications. To reach the full potential of the polarization-enabled device functionalities, large-scale fabrication of polymer thin films with well-controlled polar directions is called for, which remains a central challenge. The widely exploited Langmuir-Blodgett, spin-coating, and electrospinning methods only yield polymorphous or polycrystalline films, where the net polarization is compromised. Here, an easily scalable approach is reported to achieve poly(vinylidene fluoride-trifluoroethylene) P(VDF-TrFE) thin films composed of close-packed crystalline nanowires via interface-epitaxy with 1T'-ReS₂ . Upon controlled thermal treatment, uniform P(VDF-TrFE) films restructure into about 10 and 35 nm-wide (010)-oriented nanowires that are crystallographically aligned with the underlying ReS₂ , as revealed by high-resolution transmission electron microscopy. Piezoresponse force microscopy studies confirm the out-of-plane polar axis of the nanowire films and reveal coercive voltages as low as 0.1 V. Reversing the polarization can induce a conductance switching ratio of >10⁸ in bilayer ReS₂ , over six orders of magnitude higher than that achieved by an untreated polymer gate. This study points to a cost-effective route to large-scale processing of high-performance ferroelectric polymer thin films for flexible energy-efficient nanoelectronics.

Asymmetric Dressing of WSe2 with (Macro)molecular Switches: Fabrication of Quaternary-Responsive Transistors

The forthcoming saturation of Moore's law has led to a strong demand for integrating analogue functionalities within semiconductor-based devices. As a step toward this goal, we fabricate quaternary-responsive WSe₂-based field-effect transistors (FETs) whose output current can be remotely and reversibly controlled by light, heat, and electric field. A photochromic silane-terminated spiropyran (SP) is chemisorbed on SiO₂ forming a self-assembled monolayer (SAM) that can switch from the SP to the merocyanine (MC) form in response to UV illumination and switch back by either heat or visible illumination. Such a SAM is incorporated at the dielectric-semiconductor interface in WSe₂-based FETs. Upon UV irradiation, a drastic decrease in the output current of 82% is observed and ascribed to the zwitterionic MC isomer acting as charge scattering site. To provide an additional functionality, the WSe₂ top surface is coated with a ferroelectric co-polymer layer based on poly(vinylidene fluoride-co-trifluoroethylene). Because of its switchable inherent electrical polarization, it can promote either the accumulation or depletion of charge carriers in the WSe₂ channel, thereby inducing a current modulation with 99% efficiency. Thanks to the efficient tuning induced by the two components and their synergistic effects, the device polarity could be modulated from n-type to p-type. Such a control over the carrier concentration and device polarity is key to develop 2D advanced electronics. Moreover, the integration strategy of multiple stimuli-responsive elements into a single FET allows us to greatly enrich its functionality, thereby promoting the development for More-than-Moore technology.

Investigation of charge trapping mechanism in MoS2field effect transistor by incorporating Al into host La2O3as gate dielectric

The charge trapping effect plays a key role in multi-bit memory devices and brain-like neuron devices. Herein, MoS₂field effect transistors are fabricated, incorporating Al into host La₂O₃as the gate dielectric, which exhibit excellent electrical properties with an on-off ratio in the memory window of ∼10⁶and a memory window ratio of ∼40%. Furthermore, the charge trapping and de-trapping processes were systematically studied, and the time constants are obtained from time-domain characteristics. Making use of the charge trapping effect, the threshold voltage of the device can be continuously adjusted. The oxide layer trap density and the interface state trap density are extracted using the charge separation method. These theoretical studies provide a deeper understanding of ways to control the charge trapping process, benefitting the commercialization of two-dimensional electronic devices and the development of new charge trapping devices.

Artificial Neuron and Synapse Devices Based on 2D Materials

Neuromorphic systems, which emulate neural functionalities of a human brain, are considered to be an attractive next-generation computing approach, with advantages of high energy efficiency and fast computing speed. After these neuromorphic systems are proposed, it is demonstrated that artificial synapses and neurons can mimic neural functions of biological synapses and neurons. However, since the neuromorphic functionalities are highly related to the surface properties of materials, bulk material-based neuromorphic devices suffer from uncontrollable defects at surfaces and strong scattering caused by dangling bonds. Therefore, 2D materials which have dangling-bond-free surfaces and excellent crystallinity have emerged as promising candidates for neuromorphic computing hardware. First, the fundamental synaptic behavior is reviewed, such as synaptic plasticity and learning rule, and requirements of artificial synapses to emulate biological synapses. In addition, an overview of recent advances on 2D materials-based synaptic devices is summarized by categorizing these into various working principles of artificial synapses. Second, the compulsory behavior and requirements of artificial neurons such as the all-or-nothing law and refractory periods to simulate a spike neural network are described, and the implementation of 2D materials-based artificial neurons to date is reviewed. Finally, future challenges and outlooks of 2D materials-based neuromorphic devices are discussed.

Emerging Opportunities for 2D Semiconductor/Ferroelectric Transistor-Structure Devices

Semiconductor technology, which is rapidly evolving, is poised to enter a new era for which revolutionary innovations are needed to address fundamental limitations on material and working principle level. 2D semiconductors inherently holding novel properties at the atomic limit show great promise to tackle challenges imposed by traditional bulk semiconductor materials. Synergistic combination of 2D semiconductors with functional ferroelectrics further offers new working principles, and is expected to deliver massively enhanced device performance for existing complementary metal-oxide-semiconductor (CMOS) technologies and add unprecedented applications for next-generation electronics. Herein, recent demonstrations of novel device concepts based on 2D semiconductor/ferroelectric heterostructures are critically reviewed covering their working mechanisms, device construction, applications, and challenges. In particular, emerging opportunities of CMOS-process-compatible 2D semiconductor/ferroelectric transistor structure devices for the development of a rich variety of applications are discussed, including beyond-Boltzmann transistors, nonvolatile memories, neuromorphic devices, and reconfigurable nanodevices such as p-n homojunctions and self-powered photodetectors. It is concluded that 2D semiconductor/ferroelectric heterostructures, as an emergent heterogeneous platform, could drive many more exciting innovations for modern electronics, beyond the capability of ubiquitous silicon systems.

2D Polarized Materials: Ferromagnetic, Ferrovalley, Ferroelectric Materials, and Related Heterostructures

The emergence of 2D polarized materials, including ferromagnetic, ferrovalley, and ferroelectric materials, has demonstrated unique quantum behaviors at atomic scales. These polarization behaviors are tightly bonded to the new degrees of freedom (DOFs) for next generation information storage and processing, which have been dramatically developed in the past few years. Here, the basic 2D polarized materials system and related devices' application in spintronics, valleytronics, and electronics are reviewed. Specifically, the underlying physical mechanism accompanied with symmetry broken theory and the modulation process through heterostructure engineering are highlighted. These summarized works focusing on the 2D polarization would continue to enrich the cognition of 2D quantum system and promising practical applications.

Controlled polymer crystal/two-dimensional material heterostructures for high-performance photoelectronic applications

The control of atomically thin two-dimensional (2D) crystal-based heterostructures wherein the interfaces of 2D nanomaterials are vertically stacked with other thin functional materials via van der Waals interactions is highly important for not only optimizing the excellent properties of 2D nanomaterials, but also for utilizing the functionality of the contact materials. In particular, when 2D nanomaterials are combined with soft polymeric components, the resulting photoelectronic devices are potentially scalable and mechanically flexible, allowing the development of a variety of prototype soft-electronic devices, such as solar cells, displays, photodetectors, and non-volatile memory devices. Diverse polymer/2D heterostructures are frequently employed, but the performance of the devices with heterostructures is limited, mainly because of the difficulty in controlling the molecular structures of the polymers on the 2D surface. Thus, understanding the crystal interactions of polymers on atomically flat and dangling-bond-free surfaces of 2D materials is essential for ensuring high performance. In this study, the recent progress made in the development of thin polymer films fabricated on the surfaces of various 2D nanomaterials for high-performance photoelectronic devices is comprehensively reviewed, with an emphasis on the control of the molecular and crystalline structures of the polymers on the 2D surface.

Two-Dimensional Pnictogen for Field-Effect Transistors

Two-dimensional (2D) layered materials hold great promise for various future electronic and optoelectronic devices that traditional semiconductors cannot afford. 2D pnictogen, group-VA atomic sheet (including phosphorene, arsenene, antimonene, and bismuthene) is believed to be a competitive candidate for next-generation logic devices. This is due to their intriguing physical and chemical properties, such as tunable midrange bandgap and controllable stability. Since the first black phosphorus field-effect transistor (FET) demo in 2014, there has been abundant exciting research advancement on the fundamental properties, preparation methods, and related electronic applications of 2D pnictogen. Herein, we review the recent progress in both material and device aspects of 2D pnictogen FETs. This includes a brief survey on the crystal structure, electronic properties and synthesis, or growth experiments. With more device orientation, this review emphasizes experimental fabrication, performance enhancing approaches, and configuration engineering of 2D pnictogen FETs. At the end, this review outlines current challenges and prospects for 2D pnictogen FETs as a potential platform for novel nanoelectronics.

Reliable Nonvolatile Memory Black Phosphorus Ferroelectric Field-Effect Transistors with van der Waals Buffer

Two-dimensional material-based ferroelectric field-effect transistors (2D-FeFETs) hold great promise in information storage and processing. However, an often-observed and hard-to-control anti-hysteresis response of 2D-FeFETs, for example, hysteretic switching of the resistance states of the devices opposite to that of the actual polarization of the ferroelectric dielectric, represents a major issue in the industrial applications of such devices. Here, we demonstrate a van der Waals buffer technique that eliminates anti-hysteresis in black phosphorus (BP) 2D-FeFETs and restores their intrinsic hysteretic behavior. Our modified BP 2D-FeFETs showed outstanding performance including high room-temperature carrier mobility, robust bistable states with fast response to a gate, a large on/off ratio at zero gate voltage, a large and considerably more stable memory window, and a long retention time. During repeated gate operation, the memory window of the buffered device is ∼7000 times more stable than the unbuffered device. Such a method could be crucial in future information technological applications that utilize the intrinsic properties of 2D-FeFETs.

Solution-processed black phosphorus nanoflakes for integrating nonvolatile resistive random access memory and the mechanism unveiled

In this study, we demonstrated the integration of black phosphorus (BP) nanoflakes in a resistive random access memory (RRAM) with a facile and complementary metal-oxide-semiconductor-compatible process. The solution-processed BP nanoflakes embedded in polystyrene (PS) as an active layer were sandwiched between aluminum electrodes (Al/BP:PS/Al). The device shows a figure of merit with typical bipolar behavior and forming-free characteristics as well as excellent memory performances such as nonvolatile, low operation voltage (1.75 V) and high ON/OFF ratio (>10²) as well as the long retention time (>1500 s). The improved device performances were attributed to the formation of effective trap sites from the hybrid structure of the active layer (BP:PS), especially the BP nanoflakes and the partly oxidized species (P _x O _y ). Moreover, the extrinsic aluminum oxide layer was observed after the device operation. The mechanism of switching behavior was further unveiled through the carrier transport models, which confirms the conductive mechanisms of space-charge-limited current and Ohmic conductance at high resistance state (HRS) and low resistance state, respectively. Additionally, in the high electric field at HRS, the transfer curve was well fitted with the Poole-Frenkel emission model, which could be attributed to the formation of the aluminum oxide layer. Accordingly, both the trapping/de-trapping of carriers and the formation/rupture of conductive filaments were introduced as transport mechanisms in our devices. Although the partial P _x O _y species on BP were inevitable during the liquid phase exfoliation process, which was regarded as the disadvantages for various applications, it turns to a key point for improving performances in memory devices. The proposed approach to integrating BP nanoflakes in the active layer of the RRAM device could pave the way for next-generation memory devices.

A non-volatile AND gate based on Al2O3/HfO2/Al2O3 charge-trap stack for in-situ storage applications

The emergence of two-dimensional (2D) materials has inspired academia in microelectronics to find a novel device structure to offer a potential technological route for increasing energy efficiency and processing speed for data storage and computing at transistor level. Devices based on 2D materials include logic gates and memories, each with their own unique features. However, integrating logic function and memory into a single device has barely been studied. Here, we report a non-volatile AND gate based on Al₂O₃/HfO₂/Al₂O₃ charge-trap stack. The device can store charges after completing logic operation. The ratio of high and low current states during logic operations can exceed 10⁵. The output current states during the logic and memory operations still have a two orders of magnitude distinction after 800 s, indicating that this device possesses the non-volatile characteristic. The device has potential applications for in-situ memory applications, which makes it a possible candidate to break the "memory wall" at transistor level.

Enhancement of Dielectric Permittivity of Ti3C2Tx MXene/Polymer Composites by Controlling Flake Size and Surface Termination

We report a strong effect of the MXene flake size and surface termination on the dielectric permittivity of MXene polymer composites. Specifically, poly(vinylidene fluoride-trifluoro-ethylene-chlorofluoroehylene) or P(VDF-TrFE-CFE) polymer embedded with large (ca. 4.5 μm) Ti₃C₂T_x flakes achieves a dielectric permittivity as high as 10⁵ near the percolation limit of 15.3 wt % MXene loading. In comparison, the dielectric permittivity of MXene/P(VDF-TrFE-CFE) using small (ca. 1.5 μm) Ti₃C₂T_x flakes (S-MXene) achieves a dielectric permittivity of 10⁴ near the percolation limit of 16.8 wt %. Meanwhile, increasing the concentration of surface functional groups on the MXene surface (-O, -F, and -OH) by extending the etching time gives a dielectric constant of 2204 near the percolation limit of 15.7 wt %. The ratio of permittivity to the loss factor of our large flake composite is superior to that of the small flake composite, and to all previously reported carbon-based fillers in P(VDF-TrFE-CFE). We show that the dielectric permittivity enhancement is strongly related to the charge accumulation at the surfaces between the two dimensional (2D) MXene flakes and the polymer matrix under an external applied electric field.

Gate-Tunable and Programmable n-InGaAs/Black Phosphorus Heterojunction Diodes

Semiconductor heterostructures have enabled numerous applications in diodes, photodetectors, junction field-effect transistors, and memory devices. Two-dimensional (2D) materials and III-V compound semiconductors are two representative materials providing excellent heterojunction platforms for the fabrication of heterostructure devices. The marriage between these semiconductors with completely different crystal structures may enable a new heterojunction with unprecedented physical properties. In this study, we demonstrate a multifunctional heterostructure device based on 2D black phosphorus and n-InGaAs nanomembrane semiconductors that exhibit gate-tunable, photoresponsive, and programmable diode characteristics. The device exhibits clear rectification with a large gate-tunable forward current, which displays rectification and switching with a maximum rectification ratio of 4600 and an on/off ratio exceeding 10⁵, respectively. The device also offers nonvolatile memory properties, including large hysteresis and stable retention of storage charges. By combining the memory and gate-tunable rectifying properties, the rectification ratio of the device can be controlled and memorized from 0.06 to 400. Moreover, the device can generate three different electrical signals by combining a photoresponsivity of 0.704 A/W with the gate-tunable property, offering potential applications, for example, multiple logic operator. This work presents a heterostructure design based on 2D and III-V compound semiconductors, showing unique physical properties for the development of multifunctional heterostructure devices.

Accurate Threshold Voltage Reliability Evaluation of Thin Al2O3 Top-Gated Dielectric Black Phosphorous FETs Using Ultrafast Measurement Pulses

Few-layer black phosphorus (BP) has attracted significant interest in recent years due to electrical and photonic properties that are far superior to those of other two-dimensional layered semiconductors. The study of long term electrical stability and reliability of black phosphorus field effect transistors (BP-FETs) with technologically relevant thin, and device-selective, gate dielectrics, stressed under realistic (closer to operation) bias and measured using state-of-the-art ultrafast reliability characterization techniques, is essential for their qualification and use in different applications. In this work, air-stable BP-FETs with a thin top-gated dielectric (15 nm Al₂O₃, SiO₂ equivalent thickness of 5 nm) were fabricated and comprehensively characterized for threshold voltage ( V_th) instability under negative gate bias stress at various measurement delays ( t_m), stress biases ( V_GSTR), temperatures ( T), and stress times ( t_str) for the first time. Thin top-gated oxide enables low V_GSTR that is closer to the operating condition and ultrafast V_th measurements with low delay ( t_m = 10 μs, due to high drain current) that ensure minimal recovery. The resultant time kinetics of V_th degradation (Δ V_th) shows fast saturation at longer stress times and low-temperature activation energy. V_th instability in these top-gated devices is suggested to be dominated by hole trapping, which is modeled using first-order equations at different V_GSTR and T. It is shown that measurements using larger t_m show lower degradation magnitude that do not saturate due to recovery artifacts and give inaccurate estimation of hole trap densities. Conventional, thick, and global back-gated oxide BP-FETs were also fabricated and characterized for varying t_m (1 ms being the lowest due to a low drain current level for thick oxide), V_GSTR, and T to benchmark our top-gated results. Nonsaturating Δ V_th in the back-gated devices is shown to result from recovery artifacts due to the large t_m (1 ms and greater) values. Finally, using a V_GSTR and T-dependent first-order model, we show that the top-gated Al₂O₃ BP-FETs with scaled gate oxide thickness can match state-of-the-art Si reliability specifications at operating voltage and room/elevated temperature.

Room-temperature Operation of Low-voltage, Non-volatile, Compound-semiconductor Memory Cells

Whilst the different forms of conventional (charge-based) memories are well suited to their individual roles in computers and other electronic devices, flaws in their properties mean that intensive research into alternative, or emerging, memories continues. In particular, the goal of simultaneously achieving the contradictory requirements of non-volatility and fast, low-voltage (low-energy) switching has proved challenging. Here, we report an oxide-free, floating-gate memory cell based on III-V semiconductor heterostructures with a junctionless channel and non-destructive read of the stored data. Non-volatile data retention of at least 10⁴ s in combination with switching at ≤2.6 V is achieved by use of the extraordinary 2.1 eV conduction band offsets of InAs/AlSb and a triple-barrier resonant tunnelling structure. The combination of low-voltage operation and small capacitance implies intrinsic switching energy per unit area that is 100 and 1000 times smaller than dynamic random access memory and Flash respectively. The device may thus be considered as a new emerging memory with considerable potential.

Symmetric Ultrafast Writing and Erasing Speeds in Quasi-Nonvolatile Memory via van der Waals Heterostructures

Due to the large gap in timescale between volatile memory and nonvolatile memory technologies, quasi-nonvolatile memory based on 2D materials has become a viable technology for filling the gap. By exploiting the elaborate energy band structure of 2D materials, a quasi-nonvolatile memory with symmetric ultrafast write-1 and erase-0 speeds and long refresh time is reported. Featuring the 2D semifloating gate architecture, an extrinsic p-n junction is used to charge or discharge the floating gate. Owing to the direct injection or recombination of charges from the floating gate electrode, the erasing speed is greatly enhanced to nanosecond timescale. Combined with the ultrafast write-1 speed, symmetric ultrafast operations on the nanosecond timescale are achieved, which are ≈10⁶ times faster than other memories based on 2D materials. In addition, the refresh time after a write-1 operation is 219 times longer than that of dynamic random access memory. This performance suggests that quasi-nonvolatile memory has great potential to decrease power consumption originating from frequent refresh operations, and usher in the next generation of high-speed and low-power memory technology.

Nonvolatile Memories Based on Graphene and Related 2D Materials

The pervasiveness of information technologies is generating an impressive amount of data, which need to be accessed very quickly. Nonvolatile memories (NVMs) are making inroads into high-capacity storage to replace hard disk drives, fuelling the expansion of the global storage memory market. As silicon-based flash memories are approaching their fundamental limit, vertical stacking of multiple memory cell layers, innovative device concepts, and novel materials are being investigated. In this context, emerging 2D materials, such as graphene, transition metal dichalcogenides, and black phosphorous, offer a host of physical and chemical properties, which could both improve existing memory technologies and enable the next generation of low-cost, flexible, and wearable storage devices. Herein, an overview of graphene and related 2D materials (GRMs) in different types of NVM cells is provided, including resistive random-access, flash, magnetic and phase-change memories. The physical and chemical mechanisms underlying the switching of GRM-based memory devices studied in the last decade are discussed. Although at this stage most of the proof-of-concept devices investigated do not compete with state-of-the-art devices, a number of promising technological advancements have emerged. Here, the most relevant material properties and device structures are analyzed, emphasizing opportunities and challenges toward the realization of practical NVM devices.

Doping engineering and functionalization of two-dimensional metal chalcogenides

Two-dimensional (2D) layered metal chalcogenides (MXs) have significant potential for use in flexible transistors, optoelectronics, sensing and memory devices beyond the state-of-the-art technology. To pursue ultimate performance, precisely controlled doping engineering of 2D MXs is desired for tailoring their physical and chemical properties in functional devices. In this review, we highlight the recent progress in the doping engineering of 2D MXs, covering that enabled by substitution, exterior charge transfer, intercalation and the electrostatic doping mechanism. A variety of novel doping engineering examples leading to Janus structures, defect curing effects, zero-valent intercalation and deliberately devised floating gate modulation will be discussed together with their intriguing application prospects. The choice of doping strategies and sources for functionalizing MXs will be provided to facilitate ongoing research in this field toward multifunctional applications.

Two-dimensional black phosphorus: its fabrication, functionalization and applications

Phosphorus, one of the most abundant elements in the Earth (∼0.1%), has attracted much attention in the last five years since the rediscovery of two-dimensional (2D) black phosphorus (BP) in 2014. The successful scaling down of BP endows this 'old material' with new vitality, resulting from the intriguing semiconducting properties in the atomic scale limit, i.e. layer-dependent bandgap that covers from the visible light to mid-infrared light spectrum as well as hole-dominated ambipolar transport characteristics. Intensive research effort has been devoted to the fabrication, characterization, functionalization and application of BP and other phosphorus allotropes. In this review article, we summarize the fundamental properties and fabrication techniques of BP, with particular emphasis on the recent progress in molecular beam epitaxy growth of 2D phosphorus. Subsequently, we highlight recent progress in BP (opto)electronic device applications achieved via customized manipulation methods, such as interface, defect and bandgap engineering as well as forming Lego-like stacked heterostructures.

A semi-floating gate memory based on van der Waals heterostructures for quasi-non-volatile applications

As conventional circuits based on field-effect transistors are approaching their physical limits due to quantum phenomena, semi-floating gate transistors have emerged as an alternative ultrafast and silicon-compatible technology. Here, we show a quasi-non-volatile memory featuring a semi-floating gate architecture with band-engineered van der Waals heterostructures. This two-dimensional semi-floating gate memory demonstrates 156 times longer refresh time with respect to that of dynamic random access memory and ultrahigh-speed writing operations on nanosecond timescales. The semi-floating gate architecture greatly enhances the writing operation performance and is approximately 10⁶ times faster than other memories based on two-dimensional materials. The demonstrated characteristics suggest that the quasi-non-volatile memory has the potential to bridge the gap between volatile and non-volatile memory technologies and decrease the power consumption required for frequent refresh operations, enabling a high-speed and low-power random access memory.